program baudrate for 4800 buad @ 1MHz and update uart capture testbench

Cortex-M0/soclabs_demo/software/common/bootloader/bootloader.c

@@ -44,8 +44,10 @@
 
 void UartStdOutInit(void)
 {
-  CMSDK_UART2->BAUDDIV = 16;
-  CMSDK_UART2->CTRL    = 0x41; // High speed test mode, TX only
+//  CMSDK_UART2->BAUDDIV = 16;
+//  CMSDK_UART2->CTRL    = 0x41; // High speed test mode, TX only
+  CMSDK_UART2->BAUDDIV = 208; //(1MHz/9600)
+  CMSDK_UART2->CTRL    = 0x01; //TX only, standard UART
   CMSDK_GPIO1->ALTFUNCSET = (1<<5);
   return;
 }
@@ -117,8 +119,8 @@ int main (void)
   // UART init
   UartStdOutInit();
 
-  UartPuts("\nCMSDK Boot Loader\n");
-  UartPuts("- load flash\n");
+  UartPuts("\nGTRI-soclabs: ARM Cortex-M0 SDK\n"); // CMSDK boot loader\n");
+  UartPuts(" - load flash\n\n");
   FlashLoader();
   return 0;
 }

Cortex-M0/soclabs_demo/software/common/retarget/uart_stdout.c

@@ -45,8 +45,10 @@
 
 void UartStdOutInit(void)
 {
-  CMSDK_UART2->BAUDDIV = 16;
-  CMSDK_UART2->CTRL    = 0x41; // High speed test mode, TX only
+//  CMSDK_UART2->BAUDDIV = 16;
+//  CMSDK_UART2->CTRL    = 0x41; // High speed test mode, TX only
+  CMSDK_UART2->BAUDDIV = 208; //(1MHz/9600)
+  CMSDK_UART2->CTRL    = 0x01; //TX only, standard UART
   CMSDK_GPIO1->ALTFUNCSET = (1<<5);
   return;
 }

Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/cmsdk_mcu.v

@@ -36,7 +36,7 @@
 //-----------------------------------------------------------------------------
 //
 
-// `define SYNTHBOOT 1
+`define SYNTHBOOT 1
 
 `include "cmsdk_mcu_defs.v"
 
@@ -775,8 +775,8 @@ cmsdk_ahb_rom
 //----------------------------------------
 // Only use if BOOT_MEM_TYPE is not zero
 `ifdef SYNTHBOOTROM
-//ahb_bootrom
-ahb_bootrom__mangled
+ahb_bootrom
+//ahb_bootrom__mangled
 //  #(.AW(10)  ) // 1K bytes ROM
    u_ahb_bootloader (
     .HCLK             (HCLKSYS),

Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/tb_cmsdk_mcu.v

@@ -291,11 +291,67 @@ SROM_Ax32
   assign PCLK = XTAL1;
 `endif
 
+ // --------------------------------------------------------------------------------
+ // external UART phase lock to (known) baud rate
+
+// seem unable to use the following (due to generate instance naming?)
+//  wire baudx16_clk = u_cmsdk_mcu.u_cmsdk_mcu_system.u_apb_subsystem.u_apb_uart_2.BAUDTICK;
+
+// 2000000/208 = 9615 baud (+0.16%)
+// 208 / 16
+`define BAUDPROG 13
+
+ reg [3:0] bauddiv;
+ wire    baudclken = (bauddiv == 4'b0000);
+
+  always @(negedge NRST or posedge PCLK)
+    if (!NRST)
+      bauddiv <=0;
+    else
+      bauddiv <= (baudclken) ? (`BAUDPROG-1) : (bauddiv -1) ;   // count down of 13
+
+  wire baudx16_clk = bauddiv[3];
+
+  wire UARTXD =  P1[5];
+  reg  UARTXD_del;
+  always @(negedge NRST or posedge baudx16_clk)
+    if (!NRST)
+      UARTXD_del <= 1'b0;
+    else
+      UARTXD_del <= UARTXD; // delay one BAUD_TICK-time
+
+  wire UARTXD_edge = UARTXD_del ^ UARTXD; // edge detect
+
+  reg [3:0] pllq;
+  always @(negedge NRST or posedge baudx16_clk)
+    if (!NRST)
+      pllq[3:0] <= 4'b0000; // phase lock ready for Q[3] to go high
+    else
+      if (UARTXD_edge)
+        pllq[3:0] <= 4'b0110; // sync to mid bit-time
+      else
+        pllq[3:0] <= pllq[3:0] - 1; // count down divide-by-16
+
+  wire baud_clk = pllq[3];
+
+reg baud_clk_del;
+  always @(negedge NRST or posedge PCLK)
+    if (!NRST)
+      baud_clk_del <= 1'b1;
+    else
+      baud_clk_del <= baud_clk;
+
+ // --------------------------------------------------------------------------------
+ // set FASTMODE true if UART simulation mode is programmed
+  wire FASTMODE = 1'b0;
+  wire uart_clk = (FASTMODE) ? PCLK : baud_clk; //(baud_clk & !baud_clk_del);
+
+
   cmsdk_uart_capture  #(.LOGFILENAME("uart2.log"))
     u_cmsdk_uart_capture(
     .RESETn               (NRST),
-    .CLK                  (PCLK),
-    .RXD                  (P1[5]), // UART 2 use for StdOut
+    .CLK                  (uart_clk), //PCLK),
+    .RXD                  (UARTXD), // UART 2 use for StdOut
     .DEBUG_TESTER_ENABLE  (debug_test_en),
     .SIMULATIONEND        (),      // This signal set to 1 at the end of simulation.
     .AUXCTRL              ()
@@ -305,6 +361,10 @@ SROM_Ax32
   assign P1[0] = P1[3];  // UART 0 RXD = UART 1 TXD
   assign P1[2] = P1[1];  // UART 1 RXD = UART 0 TXD
 
+ // --------------------------------------------------------------------------------
+ // Tracking CPU with Tarmac trace support
+ // --------------------------------------------------------------------------------
+
 
 `ifdef CORTEX_M0
 `ifdef USE_TARMAC