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SoCLabs
AHB QSPI
Commits
a9d81a4a
Commit
a9d81a4a
authored
7 months ago
by
dwn1c21
Browse files
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v1.0 fix Idle transfers when cache is valid
parent
87e4b961
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2 changed files
logical/ahb_qspi_interface/logical/ahb_qspi_interface.v
+4
-2
4 additions, 2 deletions
logical/ahb_qspi_interface/logical/ahb_qspi_interface.v
verif/cocotb/ahb_qspi_tests.py
+14
-7
14 additions, 7 deletions
verif/cocotb/ahb_qspi_tests.py
with
18 additions
and
9 deletions
logical/ahb_qspi_interface/logical/ahb_qspi_interface.v
+
4
−
2
View file @
a9d81a4a
...
@@ -60,7 +60,7 @@ reg [1:0] last_HTRANS;
...
@@ -60,7 +60,7 @@ reg [1:0] last_HTRANS;
reg
qspi_ready
;
reg
qspi_ready
;
reg
qspi_started
;
reg
qspi_started
;
assign
HREADYOUT
=
qspi_ready
;
//(current_state==IDLE)? 1'b1 : qspi_ready;
assign
HREADYOUT
=
(
current_state
==
IDLE
&&
last_HTRANS
==
2'b00
)
?
1'b1
:
qspi_ready
;
//(current_state==IDLE)? 1'b1 : qspi_ready;
always
@
(
posedge
HCLK
or
negedge
HRESETn
)
begin
always
@
(
posedge
HCLK
or
negedge
HRESETn
)
begin
if
(
~
HRESETn
)
begin
if
(
~
HRESETn
)
begin
...
@@ -83,7 +83,9 @@ end
...
@@ -83,7 +83,9 @@ end
always
@
(
*
)
begin
always
@
(
*
)
begin
next_state
=
IDLE
;
next_state
=
IDLE
;
case
(
current_state
)
case
(
current_state
)
IDLE:
if
(
HSELx
&
HWRITE
&
~
qspi_ready
)
IDLE:
if
(
HTRANS
==
2'b00
)
next_state
=
IDLE
;
else
if
(
HSELx
&
HWRITE
&
~
qspi_ready
)
next_state
=
WAIT_WRITE
;
next_state
=
WAIT_WRITE
;
else
if
(
HSELx
&
~
qspi_ready
)
else
if
(
HSELx
&
~
qspi_ready
)
next_state
=
WAIT_READ
;
next_state
=
WAIT_READ
;
...
...
This diff is collapsed.
Click to expand it.
verif/cocotb/ahb_qspi_tests.py
+
14
−
7
View file @
a9d81a4a
...
@@ -346,7 +346,7 @@ async def QSPI_READ_TESTS(dut):
...
@@ -346,7 +346,7 @@ async def QSPI_READ_TESTS(dut):
QSPI_CTRL_REG
=
QSPI_CTRL_REG
|
(
1
<<
25
)
QSPI_CTRL_REG
=
QSPI_CTRL_REG
|
(
1
<<
25
)
await
tb
.
config_ahb_master
.
write
(
0x00
,
QSPI_CTRL_REG
)
await
tb
.
config_ahb_master
.
write
(
0x00
,
QSPI_CTRL_REG
)
n_reads
=
64
n_reads
=
512
start_time
=
cocotb
.
utils
.
get_sim_time
(
units
=
'
ns
'
)
start_time
=
cocotb
.
utils
.
get_sim_time
(
units
=
'
ns
'
)
for
i
in
range
(
0
,
n_reads
):
for
i
in
range
(
0
,
n_reads
):
...
@@ -367,10 +367,12 @@ async def QSPI_READ_TESTS(dut):
...
@@ -367,10 +367,12 @@ async def QSPI_READ_TESTS(dut):
CACHE_STATUS_tmp
=
await
tb
.
config_ahb_master
.
read
(
CACHE_CONFIG_ADDR
+
0x04
,
4
)
CACHE_STATUS_tmp
=
await
tb
.
config_ahb_master
.
read
(
CACHE_CONFIG_ADDR
+
0x04
,
4
)
CACHE_STATUS
=
int
(
CACHE_STATUS_tmp
[
0
][
'
data
'
],
16
)
CACHE_STATUS
=
int
(
CACHE_STATUS_tmp
[
0
][
'
data
'
],
16
)
while
((
CACHE_STATUS
&
(
0x3
))
==
0
):
while
((
CACHE_STATUS
&
(
0x3
))
!=
2
):
CACHE_STATUS_tmp
=
await
tb
.
config_ahb_master
.
read
(
CACHE_CONFIG_ADDR
+
0x00
,
4
)
CACHE_STATUS_tmp
=
await
tb
.
config_ahb_master
.
read
(
CACHE_CONFIG_ADDR
+
0x04
,
4
)
CACHE_STATUS_tmp
=
await
tb
.
config_ahb_master
.
read
(
CACHE_CONFIG_ADDR
+
0x04
,
4
)
CACHE_STATUS
=
int
(
CACHE_STATUS_tmp
[
0
][
'
data
'
],
16
)
CACHE_STATUS
=
int
(
CACHE_STATUS_tmp
[
0
][
'
data
'
],
16
)
await
Timer
(
time
=
10
,
units
=
'
us
'
)
await
Timer
(
time
=
10
,
units
=
'
us
'
)
print
(
CACHE_STATUS
)
print
(
CACHE_STATUS
)
print
(
CACHE_STATUS
)
...
@@ -381,7 +383,7 @@ async def QSPI_READ_TESTS(dut):
...
@@ -381,7 +383,7 @@ async def QSPI_READ_TESTS(dut):
data
=
await
tb
.
data_ahb_master
.
read
(
i
*
4
,
4
)
data
=
await
tb
.
data_ahb_master
.
read
(
i
*
4
,
4
)
end_time_uncached
=
cocotb
.
utils
.
get_sim_time
(
units
=
'
ns
'
)
end_time_uncached
=
cocotb
.
utils
.
get_sim_time
(
units
=
'
ns
'
)
dt_uncached
=
end_time_uncached
-
start_time_uncached
dt_uncached
=
end_time_uncached
-
start_time_uncached
await
Timer
(
time
=
10
,
units
=
'
us
'
)
start_time_cached
=
cocotb
.
utils
.
get_sim_time
(
units
=
'
ns
'
)
start_time_cached
=
cocotb
.
utils
.
get_sim_time
(
units
=
'
ns
'
)
for
i
in
range
(
0
,
n_reads
):
for
i
in
range
(
0
,
n_reads
):
data
=
await
tb
.
data_ahb_master
.
read
(
i
*
4
,
4
)
data
=
await
tb
.
data_ahb_master
.
read
(
i
*
4
,
4
)
...
@@ -396,11 +398,16 @@ async def QSPI_READ_TESTS(dut):
...
@@ -396,11 +398,16 @@ async def QSPI_READ_TESTS(dut):
await
tb
.
config_ahb_master
.
write
(
0x08
,
0x0FF
)
await
tb
.
config_ahb_master
.
write
(
0x08
,
0x0FF
)
await
tb
.
config_ahb_master
.
write
(
0x08
,
0x1FF
)
await
tb
.
config_ahb_master
.
write
(
0x08
,
0x1FF
)
tb
.
log
.
info
(
"
Time taken = %f
"
,
dt
)
tb
.
log
.
info
(
"
Time taken = %f
"
,
dt
)
BW
=
n_reads
*
4
*
32
/
(
8
*
dt
*
1e-3
)
BW
=
n_reads
*
4
/
(
dt
*
1e-3
)
BW_uncached
=
n_reads
*
4
*
32
/
(
8
*
dt_uncached
*
1e-3
)
BW_uncached
=
n_reads
*
4
/
(
dt_uncached
*
1e-3
)
BW_cached
=
n_reads
*
4
*
32
/
(
8
*
dt_cached
*
1e-3
)
BW_cached
=
n_reads
*
4
/
(
dt_cached
*
1e-3
)
tb
.
log
.
info
(
"
dt APB: %f ns
"
,
dt
)
tb
.
log
.
info
(
"
dt caching: %f ns
"
,
dt_uncached
)
tb
.
log
.
info
(
"
dt cached: %f ns
"
,
dt_cached
)
tb
.
log
.
info
(
"
Bandwidth: %f MB/s
"
,
BW
)
tb
.
log
.
info
(
"
Bandwidth
APB
: %f MB/s
"
,
BW
)
tb
.
log
.
info
(
"
Bandwidth caching: %f MB/s
"
,
BW_uncached
)
tb
.
log
.
info
(
"
Bandwidth caching: %f MB/s
"
,
BW_uncached
)
tb
.
log
.
info
(
"
Bandwidth cached: %f MB/s
"
,
BW_cached
)
tb
.
log
.
info
(
"
Bandwidth cached: %f MB/s
"
,
BW_cached
)
...
...
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Click to expand it.
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