SOC1-164: Modified stimulus generation location

flist/wrapper_ip.flist

@@ -25,6 +25,6 @@ $(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_packet_deconstructor.sv
 $(ACC_WRAPPER_DIR)/hdl/src/wrapper_addr_calc.sv
 $(ACC_WRAPPER_DIR)/hdl/src/wrapper_data_req.sv
 $(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_reg_interface.sv
-$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_vr_interface.sv
+// $(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_vr_interface.sv
 $(ACC_WRAPPER_DIR)/hdl/src/wrapper_packet_construct.sv
 $(ACC_WRAPPER_DIR)/hdl/src/wrapper_packet_deconstruct.sv

flow/stimgen.py

@@ -205,6 +205,6 @@ if __name__ == "__main__":
     accelerator_input_size = 0x0000_0800
     accelerator_output_address = 0x6001_0800
     accelerator_output_size = 0x0000_0800
-    stim_file = os.environ["ACC_ENGINE_DIR"] + "/simulate/stimulus/system/" + "input_data_32bit_stim.csv"
-    ref_file = os.environ["ACC_ENGINE_DIR"] + "/simulate/stimulus/system/" + "output_hash_32bit_ref.csv"
+    stim_file = os.environ["SOC_TOP_DIR"] + "/wrapper/stimulus/" + "input_block_32bit_stim.csv"
+    ref_file = os.environ["SOC_TOP_DIR"] + "/wrapper/stimulus/" + "output_hash_32bit_ref.csv"
     stimulus_generation(stim_file, ref_file, accelerator_input_address, accelerator_input_size, accelerator_output_address, accelerator_output_size)
\ No newline at end of file

hdl/src/wrapper_addr_calc.sv

@@ -11,7 +11,10 @@
 module wrapper_addr_calc #(
   //parameter for address width
   parameter   ADDRWIDTH=11,
-  parameter   PACKETWIDTH=256
+  parameter   PACKETWIDTH=256,
+  localparam  PACKETBYTES      = (PACKETWIDTH+7)/8,         // Number of Bytes in Packet
+  localparam  PACKETBYTEWIDTH  = $clog2(PACKETBYTES),       // Number of Bits to represent Bytes in Packet
+  localparam  PACKETSPACEWIDTH = ADDRWIDTH-PACKETBYTEWIDTH  // Number of Bits to represent all Packets in Address Space
 )(
   // Number of Packets in Current Block
   input logic [PACKETSPACEWIDTH:0]   block_packet_count,
@@ -20,9 +23,7 @@ module wrapper_addr_calc #(
   output logic [ADDRWIDTH-1:0]       block_addr
 );
 
- localparam PACKETBYTES      = (PACKETWIDTH+7)/8;         // Number of Bytes in Packet
- localparam PACKETBYTEWIDTH  = $clog2(PACKETBYTES);       // Number of Bits to represent Bytes in Packet
- localparam PACKETSPACEWIDTH = ADDRWIDTH-PACKETBYTEWIDTH; // Number of Bits to represent all Packets in Address Space
+
  
  logic [ADDRWIDTH-1:0] block_byte_count;   // Number of Bytes taken up by Block
  logic [ADDRWIDTH:0] end_word_addr;        // First Address at start of next region

hdl/src/wrapper_ahb_packet_deconstructor.sv

@@ -11,7 +11,9 @@
 module wrapper_ahb_packet_deconstructor #(
   //parameter for address width
   parameter   ADDRWIDTH=11,
-  parameter   PACKETWIDTH=256
+  parameter   PACKETWIDTH=256,
+  localparam  PACKETBYTEWIDTH  = $clog2(PACKETWIDTH/8),     // Number of Bytes in Packet
+  localparam  PACKETSPACEWIDTH = ADDRWIDTH-PACKETBYTEWIDTH  // Number of Bits to represent all Packets in Address Space
 )(
   input  logic                  hclk,       // clock
   input  logic                  hresetn,    // reset
@@ -43,8 +45,7 @@ module wrapper_ahb_packet_deconstructor #(
   output logic [ADDRWIDTH-1:0]  block_read_addr
  );
 
- localparam PACKETBYTEWIDTH  = $clog2(PACKETWIDTH/8);     // Number of Bytes in Packet
- localparam PACKETSPACEWIDTH = ADDRWIDTH-PACKETBYTEWIDTH; // Number of Bits to represent all Packets in Address Space
+
 
  // Register Interface Connections
  logic [ADDRWIDTH-1:0]  addr;

hdl/src/wrapper_packet_construct.sv

@@ -106,11 +106,11 @@ always_ff @(posedge hclk or negedge hresetn) begin
                 // - Check that previous address isn't 0 (just out of reset and no packet actually in buffer)
                 if (packet_addr != prev_packet_addr && (prev_wr_addr != {ADDRWIDTH{1'b0}})) begin
                     // Produce Data Output 
-                    packet_data       <= const_buffer; // Write out Previous value of construction buffer
-                    // Calculate Last Flag on previous address 
-                    packet_data_last  <= prev_packet_addr_last;
-                    // Take Valid High
-                    packet_data_valid <= 1'b1;
+                    // packet_data       <= const_buffer; // Write out Previous value of construction buffer
+                    // // Calculate Last Flag on previous address 
+                    // packet_data_last  <= prev_packet_addr_last;
+                    // // Take Valid High
+                    // packet_data_valid <= 1'b1;
                     // Clear Construction Buffer
                     const_buffer <= {PACKETWIDTH{1'b0}};
                 end

hdl/src/wrapper_packet_deconstruct.sv

@@ -11,7 +11,9 @@
 //-----------------------------------------------------------------------------
 module  wrapper_packet_deconstruct #(
   parameter   ADDRWIDTH=11,
-  parameter   PACKETWIDTH=256
+  parameter   PACKETWIDTH=256,
+  localparam  PACKETBYTEWIDTH  = $clog2(PACKETWIDTH/8),     // Number of Bytes in Packet
+  localparam  PACKETSPACEWIDTH = ADDRWIDTH-PACKETBYTEWIDTH // Number of Bits to represent all Packets in Address Space
 )(
   input  logic                  hclk,       // clock
   input  logic                  hresetn,    // reset
@@ -39,8 +41,7 @@ module  wrapper_packet_deconstruct #(
   output logic                        deconstructor_ready
 );
 
-localparam PACKETBYTEWIDTH  = $clog2(PACKETWIDTH/8);     // Number of Bytes in Packet
-localparam PACKETSPACEWIDTH = ADDRWIDTH-PACKETBYTEWIDTH; // Number of Bits to represent all Packets in Address Space
+
 
 // Create Deconstruction Buffer
 logic [(PACKETWIDTH/32)-1:0][31:0] deconst_buf;