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09e374da78a9329588fdf14d44baaf032e904448
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QSPI-map
feat_dmax4
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nanosoc_accel-2023
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Created with Raphaël 2.2.0
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update and simplify zcu104 extio validation to 40MHz
update the FPGA top level for extio controller
update the FPGA IP components for extio controller
zcu104 target extio testbench
fix up QuickStart testbench for extio validation
fix up QuickStart extio flist
fix up QuickStart tb fileist
exclude uart tests while getting extio validated
exclude uart tests while getting extio validated
merge extio8x4 interface and testbenches
update zcu104 fpga target pre extio integration
Update .gitmodules
Initial update for 65nm and 28nm flows and addition of Synopsys SLM
Update .gitmodules
Update projbranch
feat_dmax4
feat_dmax4
Update .gitmodules
feat_dmax4 branch support for DMA0 + DMA1/2/3 busmatrix
Move nanosoc.config to top level project
Update nanosoc configuration method
Update regression_nanosoc.sh
Add support for ADP program load in simulation
Add Fast loader to nanosoc testbench
Update README.md
remove ASIC_TEST_PORTS dependence at chip level
fix reset-bypass on APB reset
Revert makefile and update apb tests
update QS testbench for 38K4 uart tests
enhance getc from FT1248/UART to support adp test
testbench and code updated for 38K4 UART2 @240MHz
fix ADP Upload command count reporting
fixed tb damaged index on debug port connection mapping
modify debug tests and testbench harness for 8-bit GPIO0 chips (44-pin for example)
Fix software and interrupt for 3 channel dma350
Re-add default irq and drq on acc_ss
split out chip_cfg module file and update nanosoc ip flist
Add 3rd DMA350 channel
Fix QS flist
Split ASIC flow for 28 44 and 60 pin
test/diagnostic pad configuration prototype added and testbenches updated
updated nanosoc testbench ready for test mode support
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