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Commit fb3ffc00 authored by dam1n19's avatar dam1n19
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Merge branch accelerator-project:main into main

parents 8d14dbe3 98e6d7ad
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...@@ -67,7 +67,7 @@ build-job-Z2: # This job runs in the build stage, which runs first. ...@@ -67,7 +67,7 @@ build-job-Z2: # This job runs in the build stage, which runs first.
- git submodule foreach --recursive git submodule init - git submodule foreach --recursive git submodule init
- git fetch --recurse-submodules - git fetch --recurse-submodules
- source set_env.sh - source set_env.sh
- cd $SOCLABS_NANOSOC_TECH_DIR/fpga/ - cd $SOCLABS_NANOSOC_TECH_DIR
- make build_fpga FPGA=z2 - make build_fpga FPGA=z2
- FILE=$SOCLABS_DESIGN_ROOT/imp/fpga/output/pynq_z2/overlays/nanosoc_design.bit - FILE=$SOCLABS_DESIGN_ROOT/imp/fpga/output/pynq_z2/overlays/nanosoc_design.bit
- if test -f "$FILE"; then - if test -f "$FILE"; then
...@@ -91,7 +91,7 @@ build-job-ZCU104: # This job runs in the build stage, which runs first. ...@@ -91,7 +91,7 @@ build-job-ZCU104: # This job runs in the build stage, which runs first.
- git submodule foreach --recursive git submodule init - git submodule foreach --recursive git submodule init
- git fetch --recurse-submodules - git fetch --recurse-submodules
- source set_env.sh - source set_env.sh
- cd $SOCLABS_NANOSOC_TECH_DIR/fpga - cd $SOCLABS_NANOSOC_TECH_DIR
- make build_fpga FPGA=zcu104 - make build_fpga FPGA=zcu104
- FILE=$SOCLABS_DESIGN_ROOT/imp/fpga/output/pynq_zcu104/overlays/nanosoc_design.bit - FILE=$SOCLABS_DESIGN_ROOT/imp/fpga/output/pynq_zcu104/overlays/nanosoc_design.bit
- if test -f "$FILE"; then - if test -f "$FILE"; then
......
Subproject commit b36f7041c7c96e7af7ed10647a667ee319f440ce Subproject commit 62f0b1fb749557469561c7aa52035077677aaf27
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