This repo is the top-level repository which contains accelerator and SoC Labs provided design IP in forms of git subrepositories.
This repo is the top-level repository which contains an example accelerator based on the secworks AES engine integrated in SoC Labs provided nanosoc chip design IP in forms of git subrepositories.
The SoC wiring is handled in this repository too, along with design and verification for accelerator wrappers.
## Creating own top-level
## Re-creating the top-level design
The first stage of putting your accelerator into a SoC is to build the accelerator in your own repository.
Once you have a custom design repository, you are able to fork the template System Top-level repository and make some changes.
After forking, you need to add your own repository as a submodule. The first thing to do is to clone your new forked top-level.
## Cloning
To clone this repository and its subrepository, use the following command:
`git clone --recusrive $REPO_NAME`
Once the repository and the subrepository has been cloned, the next stage is to initalise the environment variables and check out the sub repositories to a branch.
First navigate to the top of this cloned repository and run:
Set up the environment variables and paths for this prohect:
`source set_env.sh`
This sets the environment variables related to this project and creates visability to the scripts in the flow directory. Because of this, you scan now run:
`soc-init`
This checks out all the repositories to the `main` branch. You are then able to check out the sub repos to the desired branches.
## Adding Submodule
After setting up your workarea, you now need to add your accelerator design repository as a subrepo.
From `$SOCLABS_DESIGN_ROOT`, you are able to run:
This sets the environment variables related to this project and creates visability to the scripts in the flow directory.
`git submodule status`
## Running the simulation
This lists the sub repositories and their branches. Make sure these are all you are expecting other than your design repo and you can then use the
This design instantiates a custom (AMBA-AHB) wrapper around the AES core to implement a memory-mapped 128-bit AES encrypt/decrypt accelerator that can be used as a software-driven peripheral or a semi-autonomous DMA subystem when 128-bit keys and variable length data payloads can be set up as scatter/gather descriptor chains for background processing.
`git submodule add -b $BRANCH $REPOSITORY_URL`
To run the simulation the 'socsim' command executes the makefile in the 'nanosoc_tech' microcontroller framework. (Edit the simulator target in nanosoc_tech/system/makefile for the simulator EDA tool used). Then use the
to add the repo into this work area.
`socsim system_aes128 TESTNAME=aes128_tests`
You then need to push the .gitmodules file back to remote to save this configuration.
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This runs the integration test program on the Arm Cortex-M0 processor using the 'system_aes128.sh' script provided in the simulate/socsim directory and the logs are produced in the simulate/sim/system_aes128/logs directory.
