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Commit d189b1ab authored by dwf1m12's avatar dwf1m12
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exclude uart tests while getting extio validated

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Pipeline #11643 failed
Stage: compile
    Stage: simulate
      Stage: simulate_qs
        Stage: build
          Stage: deploy
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            nanosoc_tech @ 650ded6e
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            Subproject commit e37d54db3f0d30f0f8ba3175037d1749ef948bb4
            Subproject commit 650ded6eb60571582335ffc7e4bdbd5a21c540ac
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