update asic flow

.gitignore

@@ -10,6 +10,7 @@ system/src/bootrom/*
 system/src/defines/*
 system/html/*
 flist/tmp
+memories/*
 
 # Compile Test Code Removal
 /system/testcodes/*/*.elf
@@ -21,4 +22,5 @@ flist/tmp
 
 # Remove Implementation Files
 imp/fpga/*
+imp/ASIC/*
 html
\ No newline at end of file

.gitmodules

@@ -25,3 +25,7 @@
 [submodule "secworks-aes"]
 	path = secworks-aes
 	url = https://github.com/secworks/aes.git
+[submodule "asic_lib_tech"]
+	path = asic_lib_tech
+	url = https://git.soton.ac.uk/soclabs/asic_library_tech
+	branch = main

env/dependency_env.sh

@@ -38,6 +38,9 @@ export SOCLABS_PRIMITIVES_TECH_DIR="$SOCLABS_PROJECT_DIR/rtl_primitives_tech"
 # FPGA Libraries
 export SOCLABS_FPGA_LIB_TECH_DIR="$SOCLABS_PROJECT_DIR/fpga_lib_tech"
 
+# ASIC Libraries
+export SOCLABS_ASIC_LIB_TECH_DIR="$SOCLABS_PROJECT_DIR/asic_lib_tech"
+
 # Generic Libraries
 export SOCLABS_GENERIC_LIB_TECH_DIR="$SOCLABS_PROJECT_DIR/generic_lib_tech"
 

flist/project/top_ASIC.flist

@@ -25,8 +25,10 @@
 
 // =============    Arm-IP Specific Filelists      =========================
 // - NanoSoC Chip IP
--f $(SOCLABS_NANOSOC_TECH_DIR)/flist/nanosoc.flist
+-f $(SOCLABS_NANOSOC_TECH_DIR)/flist/nanosoc_ASIC.flist
 
 // - CMSDK IP
 -f $(SOCLABS_PROJECT_DIR)/flist/ahb/ahb_ip.flist
--f $(SOCLABS_PROJECT_DIR)/flist/apb/apb_ip.flist
\ No newline at end of file
+-f $(SOCLABS_PROJECT_DIR)/flist/apb/apb_ip.flist
+
+$(SOCLABS_PROJECT_DIR)/system/src/defines/gen_defines.v
\ No newline at end of file

nanosoc_tech @ a83e8c97

-Subproject commit 714bca67dcb1c6442d123dc48ad97c5d832c9c83
+Subproject commit a83e8c97ec6c79b4bea7ee8a1132dfd767ba5cbe

soctools_flow @ 7e49a11b

-Subproject commit fbbc1c2bf2a8fa1ee4731f5368aba37fce20d2f9
+Subproject commit 7e49a11b40b02c7879275a95c0b174cffa5f413d