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Commit 70d5df18 authored by Daniel Newbrook's avatar Daniel Newbrook
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Add 3rd DMA350 channel

parent b1bc32c1
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Pipeline #10727 passed
Subproject commit c03d8b0d858c5c1dcc1c5feae589ceef1741a098
Subproject commit 48919e6951c7420cee6343957ecd1f68270138ff
......@@ -38,32 +38,49 @@ module accelerator_subsystem #(
output wire [1:0] EXP_DRQ,
input wire [1:0] EXP_DLAST,
// DMAC Stream interfaces
`ifdef DMAC_1_DMA350
`ifdef DMAC_DMA350
`ifdef DMA350_STREAM_2
input wire EXP_STR_IN_0_TVALID,
output wire EXP_STR_IN_0_TREADY,
input wire [SYS_DATA_W-1:0] EXP_STR_IN_0_TDATA,
input wire [15:0] EXP_STR_IN_0_TSTRB,
input wire [3:0] EXP_STR_IN_0_TSTRB,
input wire EXP_STR_IN_0_TLAST,
output wire EXP_STR_OUT_0_TVALID,
input wire EXP_STR_OUT_0_TREADY,
output wire [SYS_DATA_W-1:0] EXP_STR_OUT_0_TDATA,
output wire [15:0] EXP_STR_OUT_0_TSTRB,
output wire [3:0] EXP_STR_OUT_0_TSTRB,
output wire EXP_STR_OUT_0_TLAST,
input wire EXP_STR_OUT_0_FLUSH,
input wire EXP_STR_IN_1_TVALID,
output wire EXP_STR_IN_1_TREADY,
input wire [SYS_DATA_W-1:0] EXP_STR_IN_1_TDATA,
input wire [15:0] EXP_STR_IN_1_TSTRB,
input wire [3:0] EXP_STR_IN_1_TSTRB,
input wire EXP_STR_IN_1_TLAST,
output wire EXP_STR_OUT_1_TVALID,
input wire EXP_STR_OUT_1_TREADY,
output wire [SYS_DATA_W-1:0] EXP_STR_OUT_1_TDATA,
output wire [15:0] EXP_STR_OUT_1_TSTRB,
output wire [3:0] EXP_STR_OUT_1_TSTRB,
output wire EXP_STR_OUT_1_TLAST,
input wire EXP_STR_OUT_1_FLUSH,
`endif
`ifdef DMA350_STREAM_3
input wire EXP_STR_IN_2_TVALID,
output wire EXP_STR_IN_2_TREADY,
input wire [SYS_DATA_W-1:0] EXP_STR_IN_2_TDATA,
input wire [3:0] EXP_STR_IN_2_TSTRB,
input wire EXP_STR_IN_2_TLAST,
output wire EXP_STR_OUT_2_TVALID,
input wire EXP_STR_OUT_2_TREADY,
output wire [SYS_DATA_W-1:0] EXP_STR_OUT_2_TDATA,
output wire [3:0] EXP_STR_OUT_2_TSTRB,
output wire EXP_STR_OUT_2_TLAST,
input wire EXP_STR_OUT_2_FLUSH,
`endif
`endif
// Interrupts
......@@ -73,6 +90,30 @@ module accelerator_subsystem #(
//-------------------------------------------
// Instantiate your accelerator/wrapper here
//-------------------------------------------
// Default DMA350 stream loopback
`ifdef DMAC_DMA350
`ifdef DMA350_STREAM_2
assign EXP_STR_OUT_0_TVALID = EXP_STR_IN_0_TVALID;
assign EXP_STR_IN_0_TREADY = EXP_STR_OUT_0_TREADY;
assign EXP_STR_OUT_0_TDATA = EXP_STR_IN_0_TDATA;
assign EXP_STR_OUT_0_TSTRB = EXP_STR_IN_0_TSTRB;
assign EXP_STR_OUT_0_TLAST = EXP_STR_IN_0_TLAST;
assign EXP_STR_OUT_1_TVALID = EXP_STR_IN_1_TVALID;
assign EXP_STR_IN_1_TREADY = EXP_STR_OUT_1_TREADY;
assign EXP_STR_OUT_1_TDATA = EXP_STR_IN_1_TDATA;
assign EXP_STR_OUT_1_TSTRB = EXP_STR_IN_1_TSTRB;
assign EXP_STR_OUT_1_TLAST = EXP_STR_IN_1_TLAST;
`endif
`ifdef DMA350_STREAM_3
assign EXP_STR_OUT_2_TVALID = EXP_STR_IN_2_TVALID;
assign EXP_STR_IN_2_TREADY = EXP_STR_OUT_2_TREADY;
assign EXP_STR_OUT_2_TDATA = EXP_STR_IN_2_TDATA;
assign EXP_STR_OUT_2_TSTRB = EXP_STR_IN_2_TSTRB;
assign EXP_STR_OUT_2_TLAST = EXP_STR_IN_2_TLAST;
`endif
`endif
endmodule
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