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3b39d7f9

Commit 3b39d7f9 authored 2 years ago by dam1n19

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changed format of generated values and read input data into testbench

parent 8ae53916

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Changes 8

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hdl/verif/tb_engine.sv 16 additions, 16 deletions

hdl/verif/tb_engine.sv
model/py/builder.py 3 additions, 9 deletions

model/py/builder.py
model/py/input_cfg_builder_stim.csv 9 additions, 10 deletions

model/py/input_cfg_builder_stim.csv
model/py/input_data_builder_stim.csv 9 additions, 10 deletions

model/py/input_data_builder_stim.csv
model/py/output_data_builder_stim.csv 9 additions, 10 deletions

model/py/output_data_builder_stim.csv
simulate/sim/input_cfg_builder_stim.csv 9 additions, 0 deletions

simulate/sim/input_cfg_builder_stim.csv
simulate/sim/input_data_builder_stim.csv 9 additions, 0 deletions

simulate/sim/input_data_builder_stim.csv
simulate/sim/output_data_builder_stim.csv 9 additions, 0 deletions

simulate/sim/output_data_builder_stim.csv

with 73 additions and 55 deletions

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