aes128_log_to_file.v

//-----------------------------------------------------------------------------
// AHB transaction logger, developed for DMA integration testing
// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
//
// Contributors
//
// David Flynn (d.w.flynn@soton.ac.uk)
//
// Copyright (C) 2023, SoC Labs (www.soclabs.org)
//-----------------------------------------------------------------------------

module aes128_log_to_file
  #(parameter FILENAME = "aes128.log",
    parameter TIMESTAMP = 1)
  (
  input  wire        ahb_hclk,      // Clock
  input  wire        ahb_hresetn,   // Reset
  input  wire        ahb_hsel,      // Device select
  input  wire [15:0] ahb_haddr16,   // Address for byte select
  input  wire  [1:0] ahb_htrans,    // Transfer control
  input  wire  [2:0] ahb_hsize,     // Transfer size
  input  wire  [3:0] ahb_hprot,     // Protection control
  input  wire        ahb_hwrite,    // Write control
  input  wire        ahb_hready,    // Transfer phase done
  input  wire [31:0] ahb_hwdata,    // Write data
  input  wire        ahb_hreadyout, // Device ready
  input  wire [31:0] ahb_hrdata,    // Read data output
  input  wire        ahb_hresp,     // Device response
// stream data
  input  wire        drq_ipdma128,  // (to) DMAC input burst request
  input  wire        dlast_ipdma128,// (from) DMAC input burst end (last transfer)
  input  wire        drq_opdma128,  // (to) DMAC output dma burst request
  input  wire        dlast_opdma128,// (from) DMAC output burst end (last transfer)
  input  wire        irq_key128,
  input  wire        irq_ip128,
  input  wire        irq_op128,
  input  wire        irq_error,
  input  wire        irq_merged     // combined interrrupt request (to CPU)
  );


// CORE ID
  localparam ADDR_CORE_NAME0  = 16'h0000;
  localparam ADDR_CORE_NAME1  = 16'h0004;
  localparam ADDR_CORE_VERSION= 16'h0008;
  localparam CORE_NAME0       = 32'h61657331; // "aes1"
  localparam CORE_NAME1       = 32'h32382020; // "28  "
  localparam CORE_VERSION     = 32'h302e3031; // "0.01"

// CTRL control register with bit-set/bit-clear options
  localparam ADDR_CTRL        = 16'h0010;
  localparam ADDR_CTRL_SET    = 16'h0014;
  localparam ADDR_CTRL_CLR    = 16'h0018;
  localparam CTRL_REG_WIDTH   = 8;
  localparam CTRL_BIT_MAX     = (CTRL_REG_WIDTH-1);
  localparam CTRL_KEY_REQ_BIT = 0;
  localparam CTRL_IP_REQ_BIT  = 1;
  localparam CTRL_OP_REQ_BIT  = 2;
  localparam CTRL_ERR_REQ_BIT = 3;
  localparam CTRL_KEYOK_BIT   = 4;
  localparam CTRL_VALID_BIT   = 5;
  localparam CTRL_BYPASS_BIT  = 6;
  localparam CTRL_ENCODE_BIT  = 7;
// STAT status regisyer 
  localparam ADDR_STAT        = 16'h001c;
  localparam STAT_REG_WIDTH   = 8;
  localparam STAT_BIT_MAX     = (STAT_REG_WIDTH-1);
  localparam STAT_KEYREQ_BIT  = 0;
  localparam STAT_INPREQ_BIT  = 1;
  localparam STAT_OUTREQ_BIT  = 2;