core.Adder: fix timing by using Z_{2^{32}} arithmetics

An addition is trivially synthesized to a ripple-carry adder. With
512b + 512b the carry chain is super long and delay becomes super
high. Although the results are same, now just use 16 32b ripple-
carry adders, which is also what the standards specify. Later a
faster adder may be considered.

src/main/scala/uk/ac/soton/ecs/can/core/Adder.scala

@@ -10,5 +10,10 @@ class Adder extends MultiIOModule {
   val rhs = IO(Input(UInt(512.W)))
   val out = IO(Output(UInt(512.W)))
 
-  out := lhs + rhs
+  private val _lhs = lhs.asTypeOf(Vec(16, UInt(32.W)))
+  private val _rhs = rhs.asTypeOf(Vec(16, UInt(32.W)))
+  private val _out = Wire(Vec(16, UInt(32.W)))
+  out := _out.asUInt()
+
+  _lhs.zip(_rhs).zip(_out).foreach { case ((l, r), o) => o := l + r }
 }