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Commit 253f08f9 authored by ks6n19's avatar ks6n19
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Merge branch 'master' of https://git.soton.ac.uk/ks6n19/arm_soc

# Conflicts:
#	behavioural/razzle.sv
parents 6d6e6fd6 52fff8ef
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// // Description:
// Razzle generates a simple fractal type color image on a VGA monitor // This code generates a VGA output for ARM SoC based on razzle code modified by Iain Mcnally
// //
// Jim Hamblen, Georgia Tech School of ECE // Maintainer: Karthik Sathyanarayanan <ks6n19@soton.ac.uk>
// Converted to SystemVerilog by Iain McNally // Revision : $Revision$
//
module razzle ( module razzle (
input logic CLOCK_50, input logic CLOCK_50,
input logic [3:0] KEY, input logic [3:0] KEY,
input logic [10:0] x1, x2, y1, y2, input logic [10:0] x1, x2, y1, y2,
output logic [7:0] VGA_R,VGA_G,VGA_B, output logic [7:0] VGA_R,VGA_G,VGA_B,
output logic VGA_HS,VGA_VS, VGA_CLK, VGA_BLANK_N); output logic VGA_HS,VGA_VS, VGA_CLK, VGA_BLANK_N);
// Video Display Signals // Video Display Signals
logic [10:0] H_count,V_count; logic [10:0] H_count,V_count;
...@@ -37,9 +36,6 @@ assign VGA_B = Blue ? 255 : 0; ...@@ -37,9 +36,6 @@ assign VGA_B = Blue ? 255 : 0;
assign VGA_CLK = clock_enable; assign VGA_CLK = clock_enable;
assign VGA_BLANK_N = video_on; assign VGA_BLANK_N = video_on;
// interchange values of x1, x2, y1 , y2 to get a square on black screen
// Colors for pixel data on video signal // Colors for pixel data on video signal
assign Red_Data = red_square ; assign Red_Data = red_square ;
...@@ -57,6 +53,7 @@ assign video_on = video_on_H && video_on_V; ...@@ -57,6 +53,7 @@ assign video_on = video_on_H && video_on_V;
// Red square calculation // Red square calculation
always @(posedge CLOCK_50, negedge nReset) always @(posedge CLOCK_50, negedge nReset)
<<<<<<< HEAD
if ( ! nReset) if ( ! nReset)
begin begin
red_square = 0; red_square = 0;
...@@ -78,22 +75,39 @@ always @(posedge CLOCK_50, negedge nReset) ...@@ -78,22 +75,39 @@ always @(posedge CLOCK_50, negedge nReset)
end end
end : FRACTAL_COMPUTE end : FRACTAL_COMPUTE
=======
if ( ! nReset)
begin
red_square = 0;
end
else
begin : FRACTAL_COMPUTE
if ( video_on )
begin
if ( y1 < V_count < y2 )
if ( x2 < H_count < x1 )
red_square = 0 ;
else
red_square = 1 ;
end
end : FRACTAL_COMPUTE
>>>>>>> 52fff8ef4ad788ad3296edfd3018c758821a3033
//Generate Horizontal and Vertical Timing Signals for Video Signal // Generate Horizontal and Vertical Timing Signals for Video Signal
//For details see Rapid Prototyping of Digital Systems Chapter 9
//VIDEO_DISPLAY //VIDEO_DISPLAY
always @(posedge CLOCK_50, negedge nReset) always @(posedge CLOCK_50, negedge nReset)
if ( ! nReset) if ( ! nReset)
begin begin
clock_enable = 0; clock_enable = 0;
H_count = 0; H_count = 0;
V_count = 0; V_count = 0;
video_on_H = 0; video_on_H = 0;
video_on_V = 0; video_on_V = 0;
end end
else
begin : VIDEO_DISPLAY else
begin : VIDEO_DISPLAY
// Clock enable used for a 24Mhz video clock rate // Clock enable used for a 24Mhz video clock rate
// 640 by 480 display mode needs close to a 25Mhz pixel clock // 640 by 480 display mode needs close to a 25Mhz pixel clock
// 24Mhz should work on most new monitors // 24Mhz should work on most new monitors
...@@ -107,53 +121,53 @@ always @(posedge CLOCK_50, negedge nReset) ...@@ -107,53 +121,53 @@ always @(posedge CLOCK_50, negedge nReset)
// 0 640 659 755 799 // 0 640 659 755 799
// //
if ( clock_enable ) if ( clock_enable )
begin begin
if (H_count >= 799) if (H_count >= 799)
H_count = 0; H_count = 0;
else else
H_count = H_count + 1; H_count = H_count + 1;
//Generate Horizontal Sync Signal // Generate Horizontal Sync Signal
if ((H_count <= 755) && (H_count >= 659)) if ((H_count <= 755) && (H_count >= 659))
VGA_HS = 0; VGA_HS = 0;
else else
VGA_HS = 1; VGA_HS = 1;
//V_count counts rows of pixels (480 + extra time for sync signals) // V_count counts rows of pixels (480 + extra time for sync signals)
// //
// <---- 480 Horizontal Syncs (pixel rows) --> ->V Sync<- // <---- 480 Horizontal Syncs (pixel rows) --> ->V Sync<-
// -----------------------------------------------_______------------ // -----------------------------------------------_______------------
// 0 480 493-494 524 // 0 480 493-494 524
// //
if ((V_count >= 524) && (H_count >= 699)) if ((V_count >= 524) && (H_count >= 699))
V_count = 0; V_count = 0;
else if (H_count == 699) else if (H_count == 699)
V_count = V_count + 1; V_count = V_count + 1;
// Generate Vertical Sync Signal // Generate Vertical Sync Signal
if ((V_count <= 494) && (V_count >= 493)) if ((V_count <= 494) && (V_count >= 493))
VGA_VS = 0; VGA_VS = 0;
else else
VGA_VS = 1; VGA_VS = 1;
// Generate Video on Screen Signals for Pixel Data // Generate Video on Screen Signals for Pixel Data
if (H_count <= 639) if (H_count <= 639)
video_on_H = 1; video_on_H = 1;
else else
video_on_H = 0; video_on_H = 0;
if (V_count <= 479) if (V_count <= 479)
video_on_V = 1; video_on_V = 1;
else else
video_on_V = 0; video_on_V = 0;
end end
end : VIDEO_DISPLAY end : VIDEO_DISPLAY
......
...@@ -106,10 +106,10 @@ void wait_for_any_switch_data(void) { ...@@ -106,10 +106,10 @@ void wait_for_any_switch_data(void) {
int main(void) { int main(void) {
while(1) { while(1) {
write_out_0( 0x000 ); //x1 write_out_0( 0xA ); //x1
write_out_1( 0x000 );//y1 write_out_1( 0x64 );//y1
write_out_2( 0x140 );//x2 write_out_2( 0xA );//x2
write_out_3( 0x140 );// y2 write_out_3( 0x64 );// y2
} }
......
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