DA_test.sv 726 B
module DA_test;
timeunit 1ns;
timeprecision 100ps;
logic signed [DA_LUT::BW-1:0] in [0:DA_LUT::N-1] = '{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16};
logic input_ready, ck, rst;
logic signed [(2*DA_LUT::N-1)+8:0] out;
logic output_ready;
const int input_frequency = 5000;
DA_MAC #(.BW(DA_LUT::BW), .N(DA_LUT::N)) DA (.*, .multiplication_coefficients(DA_LUT::multiplication_coefficients));
// clock generator
// generates a 1 MHz clock
initial
begin
ck = '0;
forever #500ns ck = ~ck;
end
// generate sample strobe at sample rate of 40kHz
always
begin
#24us input_ready = '1;
#1us input_ready = '0;
end
initial
begin
rst = '0;
#10ns rst = '1;
#10ns rst = '0;
end
endmodule