TideLink v1.0 — unified trunk (USE_CLKBUF 16/16 FPGA + TSMC ASIC/GDSII + guards + RTL fixes + folded test/lint/CI coverage). Signoff-clean (WNS +0.409 / WHS +0.051); HW-validated 100% deterministic 16/16 on bridge1. Submodule axi-chiplet-controller @ 2f602d1. Supersedes the stale rc1-era v1.0@3ac342a.