//----------------------------------------------------------------------------- // SHA-2 Accelerator Filelist // A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. // // Contributors // // David Mapstone (d.a.mapstone@soton.ac.uk) // // Copyright � 2021-3, SoC Labs (www.soclabs.org) //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- // Abstract : Verilog Command File for SHA-2 Accelerator example //----------------------------------------------------------------------------- // ============= Verilog library extensions =========== +libext+.v+.vlib // ============= Accelerator Module search path ============= -y ${ACC_ENGINE_DIR}/hdl/src/ +incdir+${ACC_ENGINE_DIR}/hdl/src/ ${ACC_ENGINE_DIR}/hdl/src/fifo_vr.sv ${ACC_ENGINE_DIR}/hdl/src/sha256_hash_compression.sv ${ACC_ENGINE_DIR}/hdl/src/sha256_hashing_stream.sv ${ACC_ENGINE_DIR}/hdl/src/sha256_message_build.sv // ${ACC_ENGINE_DIR}/hdl/src/sha256_1_3_arbitrator.sv // ${ACC_ENGINE_DIR}/hdl/src/sha256_config_sync.sv // ${ACC_ENGINE_DIR}/hdl/src/sha256_engine.sv // ${ACC_ENGINE_DIR}/hdl/src/sha256_id_buf.sv // ${ACC_ENGINE_DIR}/hdl/src/sha256_id_issue.sv // ${ACC_ENGINE_DIR}/hdl/src/sha256_id_validator.sv // ${ACC_ENGINE_DIR}/hdl/src/sha256_packet_manager.sv