diff --git a/.DS_Store b/.DS_Store
index 9062f120fff32c2a491399687c620e432d1f644b..b6fcc25b02128d8d68590a95cd6b43f435142f0c 100644
Binary files a/.DS_Store and b/.DS_Store differ
diff --git a/hdl/src/sha256_config_sync.sv b/hdl/src/sha256_config_sync.sv
index 3f0637b97fe3e7b34b30931b5c16aa7e28ef2613..3c4a1d7186e1380fe9deaca2ab508406f7bd2817 100644
--- a/hdl/src/sha256_config_sync.sv
+++ b/hdl/src/sha256_config_sync.sv
@@ -35,7 +35,13 @@ module sha256_config_sync (
output logic [5:0] cfg_out_id,
output logic cfg_out_last,
output logic cfg_out_valid,
- input logic cfg_out_ready
+ input logic cfg_out_ready,
+
+ // Status Out - Gets updated after every hash
+ // - outputs size and then clears size to 0
+ // - status regs are looking for non-zero size
+ output logic [63:0] status_size,
+ input logic status_clear
);
logic [1:0] state, next_state;
@@ -49,6 +55,8 @@ module sha256_config_sync (
logic next_cfg_out_last;
logic next_cfg_out_valid;
+ logic [63:0] next_status_size;
+
// State Machine Sequential Logic
always_ff @(posedge clk, negedge nrst) begin
if ((!nrst) | sync_rst) begin
@@ -60,6 +68,7 @@ module sha256_config_sync (
cfg_out_valid <= 1'b0;
cfg_in_ready <= 1'b0;
id_in_ready <= 1'b0;
+ status_size <= 64'd0;
end else if (en == 1'b1) begin
state <= next_state;
cfg_out_size <= next_cfg_out_size;
@@ -69,10 +78,12 @@ module sha256_config_sync (
cfg_out_valid <= next_cfg_out_valid;
cfg_in_ready <= next_cfg_in_ready;
id_in_ready <= next_id_in_ready;
+ status_size <= next_status_size;
end else begin
cfg_out_valid <= 1'b0;
cfg_in_ready <= 1'b0;
id_in_ready <= 1'b0;
+ status_size <= 64'd0;
end
end
@@ -86,6 +97,7 @@ module sha256_config_sync (
next_cfg_out_valid = cfg_out_valid;
next_cfg_in_ready = cfg_in_ready;
next_id_in_ready = id_in_ready;
+ next_status_size = status_size;
// Override
case (state)
@@ -96,6 +108,10 @@ module sha256_config_sync (
end
2'd1: begin
+ // Handle Status Signals
+ if (status_clear) begin
+ next_status_size = 64'd0;
+ end
// Check outputs can be written to
if (cfg_out_valid && !cfg_out_ready) begin
// If data out is valid and ready is low, there is already data waiting to be transferred
@@ -113,6 +129,7 @@ module sha256_config_sync (
next_cfg_out_last = cfg_in_last;
next_cfg_out_scheme = cfg_in_scheme;
next_cfg_out_size = cfg_in_size;
+ next_status_size = cfg_in_size;
next_cfg_in_ready = 1'b0;
next_state = 2'd2;
end
@@ -140,6 +157,10 @@ module sha256_config_sync (
end
2'd2: begin // Cfg already handshaked - wait for ID handshake
+ // Handle Status Signals
+ if (status_clear) begin
+ next_status_size = 64'd0;
+ end
// These can be overloaded later if data is written to the outputs
next_cfg_out_valid = 1'b0;
next_cfg_in_ready = 1'b0;
@@ -160,6 +181,10 @@ module sha256_config_sync (
end
2'd3: begin // ID already handshaked - wait for config handshake
+ // Handle Status Signals
+ if (status_clear) begin
+ next_status_size = 64'd0;
+ end
// These can be overloaded later if data is written to the outputs
next_cfg_out_valid = 1'b0;
next_cfg_in_ready = 1'b1;
@@ -170,6 +195,7 @@ module sha256_config_sync (
next_cfg_out_scheme = cfg_in_scheme;
next_cfg_out_size = cfg_in_size;
next_cfg_out_valid = 1'b1;
+ next_status_size = cfg_in_size;
if (cfg_out_ready) begin // Guaranteeded Handshake next clock cycle
next_cfg_in_ready = 1'b1;
next_id_in_ready = 1'b1;
diff --git a/hdl/src/sha256_id_buf.sv b/hdl/src/sha256_id_buf.sv
new file mode 100644
index 0000000000000000000000000000000000000000..77551faedbf8e1ef38fcfb9c45c253fb2ececa4e
--- /dev/null
+++ b/hdl/src/sha256_id_buf.sv
@@ -0,0 +1,55 @@
+//-----------------------------------------------------------------------------
+// SoC Labs Basic SHA-256 ID Buffer
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// David Mapstone (d.a.mapstone@soton.ac.uk)
+//
+// Copyright 2023, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
+module sha256_id_validator (
+ input logic clk,
+ input logic nrst,
+ input logic en,
+
+ // Synchronous, localised reset
+ input logic sync_rst,
+
+ // ID In
+ input logic [5:0] id_in,
+ input logic id_in_last,
+ input logic id_in_valid,
+ output logic id_in_ready,
+
+ // ID Out
+ output logic [5:0] id_out,
+ output logic id_out_last,
+ output logic id_out_valid,
+ input logic id_out_ready,
+
+ // Status Out
+ output logic [5:0] status_id
+);
+
+ fifo_vr #(8, // Depth
+ 6 // Data Width
+ ) id_buffer (
+ .clk (clk),
+ .nrst (nrst),
+ .en (en),
+ .sync_rst (sync_rst),
+ .data_in (id_in),
+ .data_in_last (id_in_last),
+ .data_in_valid (id_in_valid),
+ .data_in_ready (id_in_ready),
+ .data_out (id_out),
+ .data_out_last (id_out_last),
+ .data_out_valid (id_out_valid),
+ .data_out_ready (id_out_ready)
+ );
+
+ // Status Signal Logic
+ // - status ID is updated when id_out is updated
+ assign status_id = id_out;
+endmodule
\ No newline at end of file