diff --git a/flist/rtl_primitives_ip.flist b/flist/rtl_primitives_ip.flist new file mode 100644 index 0000000000000000000000000000000000000000..30a72728c4cc69eacfc2bb2c3ec7e9dbddfbdc8e --- /dev/null +++ b/flist/rtl_primitives_ip.flist @@ -0,0 +1,19 @@ +//----------------------------------------------------------------------------- +// Primitives Filelist +// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +// +// Contributors +// +// David Mapstone (d.a.mapstone@soton.ac.uk) +// +// Copyright � 2021-3, SoC Labs (www.soclabs.org) +//----------------------------------------------------------------------------- +//----------------------------------------------------------------------------- +// Abstract : Verilog Command File for RTL Primitives +//----------------------------------------------------------------------------- + +// ============= Verilog library extensions =========== ++libext+.v+.vlib + +// ============= RTL Primitives search path ============= +$(SOCLABS_PRIMITIVES_TECH_DIR)/src/sv/fifo_vr.sv