b0c18a617869b07e89338b6309f333af0cf15ba7 to d340eaff7c63c3b599f03b338c19dded1f612afc · SoCLabs / NanoSoC Tech

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nanosoc/nanosoc_system/verilog/nanosoc_system.v

+4 −2

Original line number	Original line	Diff line number	Diff line
	@@ -56,7 +56,7 @@ module nanosoc_system #(
	parameter INCLUDE_JTAG = 0, // Do not Include JTAG feature		parameter INCLUDE_JTAG = 0, // Do not Include JTAG feature

	// DMA Parameters		// DMA Parameters
	parameter DMAC_0_CHANNEL_NUM = 2, // DMAC 0 Number of DMA Channels		parameter DMAC_0_CHANNEL_NUM = 4, // DMAC 0 Number of DMA Channels : Add EXTDATA TX, RX
	parameter DMAC_1_CHANNEL_NUM = 2, // DMAC 1 Number of DMA Channels		parameter DMAC_1_CHANNEL_NUM = 2, // DMAC 1 Number of DMA Channels

	// SoCDebug Parameters		// SoCDebug Parameters
	@@ -907,7 +907,9 @@ wire EXT_DAT_TXD_TREADY ;
	// Expansion DRQ Wiring		// Expansion DRQ Wiring
	//--------------------------		//--------------------------
	assign EXP_DLAST [1:0] = 2'b00;		assign EXP_DLAST [1:0] = 2'b00;
	assign DMAC_0_DMA_REQ = EXP_DRQ;		assign DMAC_0_DMA_REQ[1:0] = EXP_DRQ;
			assign DMAC_0_DMA_REQ[2] = EXT_DAT_RXD_TREADY & SYS_P1_OUT[2];
			assign DMAC_0_DMA_REQ[3] = EXT_DAT_TXD_TVALID & & SYS_P1_OUT[3];

	// Instantiate Subsystem		// Instantiate Subsystem
	//--------------------------		//--------------------------

sldma230_tech @ 7105d696

+1 −1

Original line number	Original line	Diff line number	Diff line
	Subproject commit 0f0bf3dee094e9e6801210c1d5f190dea912395d		Subproject commit 7105d696b8d67e4b70c9c54cb14c807a311a24b3

software/drivers/dma_pl230_driver.h

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -8,7 +8,7 @@ extern "C" {

	#define DMA_PL230_BASE (CMSDK_APB_BASE + 0xF000UL)		#define DMA_PL230_BASE (CMSDK_APB_BASE + 0xF000UL)

	#define MAX_NUM_OF_DMA_CHANNELS 2		#define MAX_NUM_OF_DMA_CHANNELS 4

	/------------- PL230 uDMA (PL230) --------------------------------------/		/------------- PL230 uDMA (PL230) --------------------------------------/
	/** @addtogroup DMA_PL230 CMSDK uDMA controller		/** @addtogroup DMA_PL230 CMSDK uDMA controller

testcodes/apb_mux_tests/apb_mux_tests.hex

+69 −65

Original line number	Original line	Diff line number	Diff line
	@@ -250,11 +250,11 @@ AB
	43		43
	18		18
	47		47
	E8		EC
	0C		0C
	00		00
	00		00
	08		0C
	0D		0D
	00		00
	00		00
	@@ -322,7 +322,7 @@ B5
	D1		D1
	00		00
	F0		F0
	1D		1F
	FD		FD
	10		10
	BD		BD
	@@ -340,7 +340,7 @@ B5
	BD		BD
	00		00
	F0		F0
	DE		E0
	FD		FD
	11		11
	46		46
	@@ -354,7 +354,7 @@ F0
	F9		F9
	00		00
	F0		F0
	F6		F8
	FD		FD
	03		03
	B4		B4
	@@ -466,7 +466,7 @@ C4
	A0		A0
	00		00
	F0		F0
	01		03
	FD		FD
	03		03
	20		20
	@@ -526,7 +526,7 @@ C0
	A0		A0
	00		00
	F0		F0
	73		75
	FC		FC
	05		05
	98		98
	@@ -554,7 +554,7 @@ C5
	A0		A0
	00		00
	F0		F0
	D5		D7
	FC		FC
	01		01
	20		20
	@@ -574,7 +574,7 @@ CB
	A0		A0
	00		00
	F0		F0
	CB		CD
	FC		FC
	02		02
	20		20
	@@ -586,7 +586,7 @@ D4
	A0		A0
	00		00
	F0		F0
	C5		C7
	FC		FC
	00		00
	20		20
	@@ -866,7 +866,7 @@ DD
	A0		A0
	00		00
	F0		F0
	39		3B
	FC		FC
	01		01
	20		20
	@@ -880,7 +880,7 @@ A4
	A0		A0
	00		00
	F0		F0
	32		34
	FC		FC
	01		01
	20		20
	@@ -890,7 +890,7 @@ AA
	A0		A0
	00		00
	F0		F0
	2D		2F
	FC		FC
	00		00
	20		20
	@@ -908,19 +908,19 @@ AE
	A0		A0
	00		00
	F0		F0
	24		26
	FC		FC
	B7		B7
	A0		A0
	00		00
	F0		F0
	21		23
	FC		FC
	C4		C4
	A0		A0
	00		00
	F0		F0
	1E		20
	FC		FC
	50		50
	49		49
	@@ -936,7 +936,7 @@ CE
	A0		A0
	00		00
	F0		F0
	16		18
	FC		FC
	01		01
	21		21
	@@ -958,7 +958,7 @@ CC
	A0		A0
	00		00
	F0		F0
	0B		0D
	FC		FC
	CE		CE
	49		49
	@@ -980,7 +980,7 @@ CB
	A0		A0
	00		00
	F0		F0
	00		02
	FC		FC
	CD		CD
	49		49
	@@ -1002,7 +1002,7 @@ CB
	A0		A0
	00		00
	F0		F0
	F5		F7
	FB		FB
	D7		D7
	49		49
	@@ -1024,7 +1024,7 @@ D5
	A0		A0
	00		00
	F0		F0
	EA		EC
	FB		FB
	DA		DA
	49		49
	@@ -1046,7 +1046,7 @@ D8
	A0		A0
	00		00
	F0		F0
	DF		E1
	FB		FB
	DE		DE
	49		49
	@@ -1068,7 +1068,7 @@ DB
	A0		A0
	00		00
	F0		F0
	D4		D6
	FB		FB
	DC		DC
	49		49
	@@ -1090,7 +1090,7 @@ D9
	A0		A0
	00		00
	F0		F0
	C9		CB
	FB		FB
	E5		E5
	49		49
	@@ -1112,7 +1112,7 @@ E2
	A0		A0
	00		00
	F0		F0
	BE		C0
	FB		FB
	E3		E3
	49		49
	@@ -1134,7 +1134,7 @@ E1
	A0		A0
	00		00
	F0		F0
	B3		B5
	FB		FB
	ED		ED
	49		49
	@@ -1156,7 +1156,7 @@ EA
	A0		A0
	00		00
	F0		F0
	A8		AA
	FB		FB
	F5		F5
	49		49
	@@ -1178,7 +1178,7 @@ F2
	A0		A0
	00		00
	F0		F0
	9D		9F
	FB		FB
	F6		F6
	48		48
	@@ -1198,7 +1198,7 @@ F3
	A0		A0
	00		00
	F0		F0
	93		95
	FB		FB
	F6		F6
	49		49
	@@ -1226,11 +1226,11 @@ F1
	A0		A0
	00		00
	F0		F0
	15		17
	FB		FB
	00		00
	F0		F0
	F2		F3
	FA		FA
	00		00
	20		20
	@@ -1240,7 +1240,7 @@ F9
	A0		A0
	00		00
	F0		F0
	0E		10
	FB		FB
	F7		F7
	E7		E7
	@@ -1770,7 +1770,7 @@ C5
	30		30
	00		00
	00		00
	7C		80
	0D		0D
	00		00
	00		00
	@@ -1810,7 +1810,7 @@ C5
	20		20
	00		00
	40		40
	8C		90
	0D		0D
	00		00
	00		00
	@@ -1870,7 +1870,7 @@ C5
	30		30
	00		00
	40		40
	AC		B0
	0D		0D
	00		00
	00		00
	@@ -1906,7 +1906,7 @@ AC
	40		40
	00		00
	40		40
	6C		70
	0D		0D
	00		00
	00		00
	@@ -2030,7 +2030,7 @@ AC
	80		80
	00		00
	40		40
	9C		A0
	0D		0D
	00		00
	00		00
	@@ -2276,7 +2276,7 @@ D0
	A0		A0
	00		00
	F0		F0
	78		7A
	F9		F9
	A0		A0
	68		68
	@@ -2298,7 +2298,7 @@ D0
	A0		A0
	00		00
	F0		F0
	FD		FF
	F8		F8
	20		20
	68		68
	@@ -2312,7 +2312,7 @@ D0
	A0		A0
	00		00
	F0		F0
	F6		F8
	F8		F8
	17		17
	48		48
	@@ -2324,11 +2324,11 @@ BD
	A0		A0
	00		00
	F0		F0
	60		62
	F9		F9
	00		00
	F0		F0
	CD		CE
	F8		F8
	FE		FE
	E7		E7
	@@ -2552,7 +2552,7 @@ C0
	B2		B2
	00		00
	F0		F0
	36		37
	F8		F8
	10		10
	BD		BD
	@@ -2560,11 +2560,11 @@ BD
	B5		B5
	00		00
	F0		F0
	42		43
	F8		F8
	00		00
	F0		F0
	30		31
	F8		F8
	10		10
	BD		BD
	@@ -2580,19 +2580,19 @@ C0
	B2		B2
	00		00
	F0		F0
	28		29
	F8		F8
	10		10
	BD		BD
	FE		FE
	E7		E7
	2E		2F
	48		48
	00		00
	21		21
	81		81
	60		60
	2E		2F
	49		49
	01		01
	61		61
	@@ -2600,12 +2600,14 @@ E7
	21		21
	81		81
	60		60
	2D		2E
	48		48
	03		F0
	21		21
	01		01
	61		61
			03
			21
	81		81
	60		60
	2C		2C
	@@ -2618,11 +2620,11 @@ E7
	47		47
	2C		2C
	48		48
	2A		2B
	49		49
	01		01
	60		60
	2B		2C
	49		49
	81		81
	61		61
	@@ -2646,13 +2648,13 @@ D0
	20		20
	88		88
	61		61
	21		22
	48		48
	00		00
	21		21
	81		81
	60		60
	30		F0
	21		21
	01		01
	61		61
	@@ -2662,7 +2664,7 @@ D0
	60		60
	70		70
	47		47
	1D		1E
	49		49
	8A		8A
	68		68
	@@ -2694,7 +2696,7 @@ D1
	60		60
	70		70
	47		47
	13		14
	4B		4B
	15		15
	48		48
	@@ -2775,6 +2777,8 @@ D1
	F7		F7
	E7		E7
	00		00
			00
			00
	60		60
	00		00
	40		40
	@@ -2900,7 +2904,7 @@ FF
	46		46
	FF		FF
	F7		F7
	F2		F0
	FA		FA
	00		00
	28		28
	@@ -3038,7 +3042,7 @@ B5
	E0		E0
	FF		FF
	F7		F7
	09		07
	FF		FF
	40		40
	1C		1C
	@@ -3058,7 +3062,7 @@ D1
	20		20
	FF		FF
	F7		F7
	FF		FD
	FE		FE
	10		10
	BD		BD
	@@ -3276,7 +3280,7 @@ F8
	46		46
	FF		FF
	F7		F7
	9D		9B
	FE		FE
	00		00
	28		28
	@@ -3294,7 +3298,7 @@ BD
	BD		BD
	00		00
	00		00
	2F		2B
	FD		FD
	FF		FF
	FF		FF
	@@ -3372,7 +3376,7 @@ B0
	B5		B5
	FF		FF
	F7		F7
	50		4E
	FE		FE
	60		60
	BC		BC
	@@ -3420,7 +3424,7 @@ C0
	46		46
	FF		FF
	F7		F7
	03		01
	FA		FA
	10		10
	BD		BD
	@@ -3554,7 +3558,7 @@ B1
	30		30
	78		78
	00		00
	04		08
	0E		0E
	00		00
	00		00
	@@ -3570,7 +3574,7 @@ B1
	01		01
	00		00
	00		00
	1C		20
	0E		0E
	00		00
	00		00

testcodes/bootloader/bootloader.hex

+60 −56

Original line number	Original line	Diff line number	Diff line
	@@ -2,15 +2,15 @@
	04		04
	00		00
	30		30
	C9		CD
	02		02
	00		00
	10		10
	D1		D5
	02		02
	00		00
	10		10
	D3		D7
	02		02
	00		00
	10		10
	@@ -42,7 +42,7 @@ D3
	00		00
	00		00
	00		00
	D5		D9
	02		02
	00		00
	10		10
	@@ -54,139 +54,139 @@ D5
	00		00
	00		00
	00		00
	D7		DB
	02		02
	00		00
	10		10
	D9		DD
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	DB		DF
	02		02
	00		00
	10		10
	@@ -250,11 +250,11 @@ AB
	43		43
	18		18
	47		47
	70		74
	02		02
	00		00
	00		00
	90		94
	02		02
	00		00
	00		00
	@@ -324,7 +324,7 @@ B5
	BD		BD
	00		00
	F0		F0
	DF		E1
	F8		F8
	11		11
	46		46
	@@ -334,11 +334,11 @@ F7
	FF		FF
	00		00
	F0		F0
	59		5B
	F8		F8
	00		00
	F0		F0
	F7		F9
	F8		F8
	03		03
	B4		B4
	@@ -350,7 +350,7 @@ FF
	BC		BC
	00		00
	F0		F0
	FD		FF
	F8		F8
	00		00
	00		00
	@@ -366,7 +366,7 @@ F8
	47		47
	00		00
	00		00
	30		31
	4A		4A
	10		10
	68		68
	@@ -378,11 +378,11 @@ F8
	28		28
	0D		0D
	DA		DA
	2E		2F
	48		48
	81		81
	60		60
	2E		2F
	4B		4B
	03		03
	61		61
	@@ -406,11 +406,11 @@ D1
	60		60
	01		01
	E0		E0
	29		2A
	48		48
	81		81
	60		60
	29		2A
	48		48
	81		81
	60		60
	@@ -418,6 +418,10 @@ E0
	21		21
	81		81
	60		60
			F0
			21
			01
			61
	41		41
	68		68
	C9		C9
	@@ -496,7 +500,7 @@ F3
	8F		8F
	FF		FF
	F7		F7
	B8		B6
	FF		FF
	10		10
	BD		BD
	@@ -518,7 +522,7 @@ E7
	B5		B5
	FF		FF
	F7		F7
	B3		B1
	FF		FF
	17		17
	A0		A0
	@@ -632,7 +636,7 @@ F0
	43		43
	27		27
	32		32
	34		35
	20		20
	41		41
	52		52
	@@ -742,7 +746,7 @@ E7
	47		47
	00		00
	00		00
	B9		BD
	02		02
	00		00
	10		10
	@@ -846,7 +850,7 @@ C0
	46		46
	FF		FF
	F7		F7
	02		00
	FF		FF
	10		10
	BD		BD
	@@ -874,7 +878,7 @@ E7
	47		47
	00		00
	00		00
	8C		90
	03		03
	00		00
	10		10
	@@ -890,7 +894,7 @@ E7
	01		01
	00		00
	10		10
	90		94
	03		03
	00		00
	10		10

testcodes/dataio_dma230_tests/data_in.csv

0 → 100644

+6 −0

Original line number	Original line	Diff line number	Diff line
			0000100101000110,0000110001000110,0000110001000110,0000100101000110,0000011001000110,0000011001000110,0000010101000110,0000100001000110,0000110101000110,0000101101000110,0000100001000110,0000010001000110,0000001101000110,0000100001000110,0000100101000110,0000101001000110,0000100101000111,0000010101000111,0000010101000111,0000010101000111,0000011101000111,0000100101000111,0000101001000111,0000100001000111,0000010001000111,0000001001000111,0000010001000111,0000100001000111,0000101101000111,0000100101000111,0000011001000111,0000010001000111,0000010001000111,0000011001000111,0000100101000111,0000101001000111,0000100101000111,0000010101000111,0000001001000111,0000010101000111
			0000010100101010,1111110100101010,0000010100101010,0000000100101001,1111111000101010,0000011000101001,0000000100101001,0000010100101000,0000010100101000,0000000100101000,0000101100101000,0000101000101000,0000011100100111,0000101000101000,0000101100100111,0000110100100111,0000101100100111,0000100100100111,0000111000100111,0000101000100111,0000001100100111,0000101000100111,0000011100100110,0000001000100110,0000011100100110,0000011100100110,0000100100100110,0000101000100110,0000001100100101,0000101000100101,0000010100100101,0000000000100101,0000011000100101,0000010000100101,0000001000100100,0000010000100100,1111111100100101,0000011000100100,0000001000100100,1111110000100100
			0000000000000000,0000000000000001,0000000000000011,0000000000000111,0000000000001111,0000000000011111,0000000000111111,0000000001111111,0000000011111111,0000000111111111,0000001111111111,0000011111111111,0000111111111111,0001111111111111,0011111111111111,0111111111111111,1111111111111111
			1111111111111111,1111111111111110,1111111111111100,1111111111111000,1111111111110000,1111111111100000,1111111111000000,1111111110000000,1111111100000000,1111111000000000,1111110000000000,1111100000000000,1111000000000000,1110000000000000,1100000000000000,1000000000000000,0000000000000000
			0000000000000000,0000000000000001,0000000000000010,0000000000000100,0000000000001000,0000000000010000,0000000000100000,0000000001000000,0000000010000000,0000000100000000,0000001000000000,0000010000000000,0000100000000000,0001000000000000,0010000000000000,0100000000000000,1000000000000000

testcodes/dataio_dma230_tests/dataio_dma230_tests.c

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			#include "CMSDK_CM0.h"
			#include <string.h>
			#include "uart_stdout.h"
			#include <stdio.h>

			#include "dataio_functions.h"

			#include "dma_pl230_driver.h"
			#include "dma_pl230_driver.c"

			#define CSV_RECORD_LEN (16+1)
			#define CSV_RECORD_COUNT (5)

			static volatile dma_pl230_channel_data dataio_ip_chain[2];
			static volatile dma_pl230_channel_data dataio_op_chain[2];

			int pl230_dma_detect(void);
			int ID_Check(const unsigned int id_array[], unsigned int offset);

			// associate DMA channel numbers
			#define DMA_CHAN_DATAIO_IP (3)
			#define DMA_CHAN_DATAIO_OP (2)
			#define DATA_UART ((CMSDK_UART_TypeDef *) CMSDK_UART1_BASE )

			void dataio_ip_driver_dma8( uint32_t nbytes, uint8_t *input)
			{
			int c = DMA_CHAN_DATAIO_IP;

			// program DMA transfers as single chains

			dataio_ip_chain[0].SrcEndPointer = DMA_PL230_PTR_END(&(DATA_UART->DATA),PL230_XFER_B,1);
			dataio_ip_chain[0].DstEndPointer = DMA_PL230_PTR_END(input,PL230_XFER_B,nbytes);
			dataio_ip_chain[0].Control = DMA_PL230_CTRL_SRCFIX(PL230_CTRL_CYCLE_BASIC,PL230_XFER_B,nbytes,PL230_CTRL_RPWR_1);

			dma_pl230_table->Primary[c].SrcEndPointer = DMA_PL230_PTR_END(&(dataio_ip_chain[0].SrcEndPointer), PL230_XFER_W, (1*4));
			dma_pl230_table->Primary[c].DstEndPointer = DMA_PL230_PTR_END(&(dma_pl230_table->Alternate[c]), PL230_XFER_W, (1*4));
			dma_pl230_table->Primary[c].Control = DMA_PL230_CTRL_DSTFIX(PL230_CTRL_CYCLE_DEV_CHAIN_PRI,PL230_XFER_W,(1*4),PL230_CTRL_RPWR_4);

			// enable DMA controller channels
			DMA_PL230_DMAC->DMA_CFG = 0; /* Disable DMA controller for initialization */
			dma_pl230_init(1<<DMA_CHAN_DATAIO_IP);

			// test to ensure output DMA has started
			while (!(dma_pl230_channel_active(1<<DMA_CHAN_DATAIO_IP)))
			;
			while (dma_pl230_channel_active(1<<DMA_CHAN_DATAIO_IP))
			;
			DMA_PL230_DMAC->DMA_CFG = 0; /* Disable DMA controller for initialization */
			dma_pl230_init(0); // none active
			return;
			}

			void dataio_op_driver_dma8( uint32_t nbytes, uint8_t *result)
			{
			int c = DMA_CHAN_DATAIO_OP;
			// program DMA transfers as single chains

			dataio_op_chain[0].SrcEndPointer = DMA_PL230_PTR_END(result,PL230_XFER_B,nbytes);
			dataio_op_chain[0].DstEndPointer = DMA_PL230_PTR_END(&(DATA_UART->DATA),PL230_XFER_B,1);
			dataio_op_chain[0].Control = DMA_PL230_CTRL_DSTFIX(PL230_CTRL_CYCLE_BASIC,PL230_XFER_B,nbytes,PL230_CTRL_RPWR_1);

			dma_pl230_table->Primary[c].SrcEndPointer = DMA_PL230_PTR_END(&(dataio_op_chain[0].SrcEndPointer), PL230_XFER_W,(1*4));
			dma_pl230_table->Primary[c].DstEndPointer = DMA_PL230_PTR_END(&(dma_pl230_table->Alternate[c]), PL230_XFER_W,(1*4));
			dma_pl230_table->Primary[c].Control = DMA_PL230_CTRL_DSTFIX(PL230_CTRL_CYCLE_DEV_CHAIN_PRI,PL230_XFER_W,(1*4),PL230_CTRL_RPWR_4);

			// enable DMA controller channels
			DMA_PL230_DMAC->DMA_CFG = 0; /* Disable DMA controller for initialization */
			dma_pl230_init(1<<DMA_CHAN_DATAIO_OP);

			// test to ensure output DMA has started
			while (!(dma_pl230_channel_active(1<<DMA_CHAN_DATAIO_OP)))
			;
			while (dma_pl230_channel_active(1<<DMA_CHAN_DATAIO_OP))
			;
			DMA_PL230_DMAC->DMA_CFG = 0; /* Disable DMA controller for initialization */
			dma_pl230_init(0); // none active
			return;
			}


			int main(void) {
			unsigned char ch;
			char rx_buf[20];
			char tx_buf[20];
			char * p;
			unsigned int rx_record_len;
			unsigned int rx_record_count;
			unsigned int rx_count;
			unsigned int value;
			unsigned int end_of_record ;
			unsigned int end_of_data ;

			UartStdOutInit();
			printf("Data Channel CSV Reader/Writer using DMA230 (ASC binary -> Hex) tests\n");

			// Reset DMA table structures
			dma_pl230_data_struct_init(); // initialize

			DataIO_enable();
			CMSDK_GPIO1->DATAOUT \|= 0x0c; // enable DRQ signals
			end_of_data = 0;
			rx_record_len = CSV_RECORD_LEN - 1; // due to soft reset in testbench!
			rx_record_count = CSV_RECORD_COUNT; // due to soft reset in testbench!

			do { // record at a time
			dataio_ip_driver_dma8(rx_record_len, (uint8_t *)rx_buf);
			rx_count = 0;
			value = 0;
			end_of_record = 0;
			rx_record_len = CSV_RECORD_LEN;
			p = rx_buf;
			do { // parse process CSV entry
			ch = *p++;
			if (ch == '0') { value = (value << 1); rx_count++; }
			if (ch == '1') { value = (value << 1) + 1; rx_count++; }
			if (ch == ',') end_of_record = 1;
			if ((ch == '\n') \|\| (ch == '\r')) end_of_record = 1;
			// if ((ch == '\n') \|\| (ch == '\r')) end_of_data = (rx_count == 0) ? 1 : 0;
			} while ((rx_count <= 16) && (end_of_record == 0) );
			if (ch == '\n') end_of_data = (rx_record_count-- > 1) ? 0 : 1 ;
			if (rx_count > 0) {
			if (ch == ',')
			printf(","); // ',' per CSV record
			else
			printf(".\n"); // newline delimiter

			if (ch == ',')
			sprintf(tx_buf,"0x%04x,", value);
			else
			sprintf(tx_buf,"0x%04x\n", value);

			tx_buf[8]=0; // string zero terminate
			dataio_op_driver_dma8(7, (uint8_t *)tx_buf);
			}
			} while (end_of_data == 0); // outer record loop

			printf(" DATA FILE PROCESSING TEST PASSED **\n");

			UartEndSimulation();
			return 0;

			}

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testcodes/dataio_dma230_tests/dataio_functions.c

0 → 100644

+84 −0

Original line number	Original line	Diff line number	Diff line
			//-----------------------------------------------------------------------------
			// customised Cortex-M0 'nanosoc' controller
			// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
			//
			// Contributors
			//
			// David Flynn (d.w.flynn@soton.ac.uk)
			//
			// Copyright (c) 2025 SoC Labs (www.soclabs.org)
			//-----------------------------------------------------------------------------

			#include "CMSDK_CM0.h"

			#define DATA_UART ((CMSDK_UART_TypeDef *) CMSDK_UART1_BASE )

			#define UART_STATE_TXFULL CMSDK_UART_STATE_TXBF_Msk
			#define UART_STATE_RXFULL CMSDK_UART_STATE_RXBF_Msk

			#define UART_CTRL_TXEN CMSDK_UART_CTRL_TXEN_Msk
			#define UART_CTRL_RXEN CMSDK_UART_CTRL_RXEN_Msk
			#define UART_CTRL_TXRXEN (CMSDK_UART_CTRL_TXEN_Msk + CMSDK_UART_CTRL_RXEN_Msk)
			#define UART_CTRL_TXIRQEN (CMSDK_UART_CTRL_TXIRQEN_Msk + UART_CTRL_TXRXEN)
			#define UART_CTRL_RXIRQEN (CMSDK_UART_CTRL_RXIRQEN_Msk + UART_CTRL_TXRXEN)


			unsigned int DataIO_enable(void) {
			// DATA_UART->CTRL = 0x00; // re-initialise/flush
			DATA_UART->CTRL = UART_CTRL_TXRXEN; // enble TX and RX
			return(0);
			}

			unsigned int DataIO_init(void) {
			DATA_UART->CTRL = 0x00; // re-initialise/flush
			DATA_UART->CTRL = UART_CTRL_TXRXEN; // enble TX and RX
			return(0);
			}

			// Output ready check
			unsigned int DataIO_putc_ready(void) {
			return((DATA_UART->STATE & UART_STATE_TXFULL) == 0); // ready if TXBUF empty
			}

			// Output Busy check
			unsigned int DataIO_putc_busy(void) {
			return((DATA_UART->STATE & UART_STATE_TXFULL) != 0); // busy if TXBUF full
			}

			// Output a character
			unsigned char DataIO_putc(unsigned char my_ch) {
			while (DataIO_putc_busy()) ; // busy wait
			DATA_UART->DATA = my_ch; // output the character
			return (my_ch);
			}


			// Output a (zero-terminated) string
			void DataIO_puts(unsigned char * mytext) {
			unsigned char string_ch;
			do {
			string_ch = *mytext;
			if (string_ch != (char) 0x0) {
			DataIO_putc(string_ch); // Normal data
			}
			*mytext++;
			} while (string_ch != 0);
			return;
			}

			// Input ready check
			unsigned int DataIO_getc_ready(void) {
			return((DATA_UART->STATE & UART_STATE_RXFULL) != 0); // ready if RXBUF set
			}


			// Input Busy check
			unsigned int DataIO_getc_busy(void) {
			return((DATA_UART->STATE & UART_STATE_RXFULL) == 0); // busy if RXBUF not set
			}

			// Input a character
			unsigned char DataIO_getc(void) {
			while (DataIO_getc_busy()) ; // busy wait
			return (DATA_UART->DATA);
			}

testcodes/dataio_dma230_tests/dataio_functions.h

0 → 100644

+69 −0

Original line number	Original line	Diff line number	Diff line
			//-----------------------------------------------------------------------------
			// customised Cortex-M0 'nanosoc' controller
			// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
			//
			// Contributors
			//
			// David Flynn (d.w.flynn@soton.ac.uk)
			//
			// Copyright (c) 2025 SoC Labs (www.soclabs.org)
			//-----------------------------------------------------------------------------

			// IO enable
			extern unsigned int DataIO_enable(void);
			extern unsigned int DataIO_init(void);

			// Output ready check
			extern unsigned char DataIO_putc_ready(void);

			// Output busy check
			extern unsigned int DataIO_putc_busy(void);

			// Output a character
			extern unsigned char DataIO_putc(unsigned char my_ch);

			// DataIO string output
			extern void DataIO_puts(unsigned char * mytext);

			// Input ready check
			extern unsigned int DataIO_getc_ready(void);

			// Input busy check
			extern unsigned int DataIO_getc_busy(void);

			// Input a character
			extern unsigned char DataIO_getc(void);

			/* example usage

			#include "CMSDK_CM0.h"
			#include <string.h>
			#include "uart_stdout.h"
			#include <stdio.h>

			#include "DataIO_functions.h"

			int main(void) {
			unsigned char ch;
			char tx_buf[32];


			UartStdOutInit(); // console channel init
			printf("Data Channel CSV Reader/Writer (ASC binary -> Hex) tests\n");
			DataIO_init(); // datachannel init
			do { // rx process CSV entry
			if (DataIO_getc_ready()) {
			ch = DataIO_Getc();
			// ...
			}

			DataIO_puts((unsigned char*) tx_buf);

			do { // tx process
			if (DataIO_putc_ready()) {
			DataIO_putc(tx_buf[<i>]);
			}

			*/

testcodes/dataio_dma230_tests/makefile

0 → 100644

+259 −0

Original line number	Original line	Diff line number	Diff line
			#-----------------------------------------------------------------------------
			# The confidential and proprietary information contained in this file may
			# only be used by a person authorised under and to the extent permitted
			# by a subsisting licensing agreement from Arm Limited or its affiliates.
			#
			# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
			# ALL RIGHTS RESERVED
			#
			# This entire notice must be reproduced on all copies of this file
			# and copies of this file may only be made by a person if such person is
			# permitted to do so under the terms of a subsisting license agreement
			# from Arm Limited or its affiliates.
			#
			# SVN Information
			#
			# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
			#
			# Revision : $Revision: 371321 $
			#
			# Release Information : Cortex-M System Design Kit-r1p1-00rel0
			#-----------------------------------------------------------------------------
			#
			# Cortex-M System Design Kit software compilation make file
			#
			#-----------------------------------------------------------------------------
			#
			# Configurations
			#
			# Choose the core instantiated, can be
			# - CORTEX_M0
			# - CORTEX_M0PLUS
			CPU_PRODUCT = CORTEX_M0

			# Shared software directory
			SOFTWARE_DIR = $(SOCLABS_NANOSOC_TECH_DIR)/software
			CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
			CORE_DIR = $(CMSIS_DIR)/CMSIS/Include

			ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
			DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
			else
			DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
			endif

			# Program file
			TESTNAME = dataio_dma230_tests

			# Endian Option
			COMPILE_BIGEND = 0

			# Configuration
			ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
			USER_DEFINE = -DCORTEX_M0PLUS
			else
			USER_DEFINE = -DCORTEX_M0
			endif

			DEPS_LIST = makefile

			# Tool chain : ds5 / gcc / keil
			TOOL_CHAIN = ds5

			ifeq ($(TOOL_CHAIN),ds5)
			ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
			CPU_TYPE = --cpu Cortex-M0plus
			else
			CPU_TYPE = --cpu Cortex-M0
			endif
			endif

			ifeq ($(TOOL_CHAIN),gcc)
			ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
			CPU_TYPE = -mcpu=cortex-m0plus
			else
			CPU_TYPE = -mcpu=cortex-m0
			endif
			endif

			# Startup code directory for DS-5
			ifeq ($(TOOL_CHAIN),ds5)
			STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
			endif

			# Startup code directory for gcc
			ifeq ($(TOOL_CHAIN),gcc)
			STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
			endif

			ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
			STARTUP_FILE = startup_CMSDK_CM0plus
			SYSTEM_FILE = system_CMSDK_CM0plus
			else
			STARTUP_FILE = startup_CMSDK_CM0
			SYSTEM_FILE = system_CMSDK_CM0
			endif

			# ---------------------------------------------------------------------------------------
			# DS-5 options

			# MicroLIB option
			COMPILE_MICROLIB = 0

			# Small Multiply (Cortex-M0/M0+ has small multiplier option)
			COMPILE_SMALLMUL = 0

			ARM_CC_OPTIONS = -c -O3 -Ospace -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
			-I $(SOFTWARE_DIR)/common/retarget -I $(SOFTWARE_DIR)/drivers $(USER_DEFINE)
			ARM_ASM_OPTIONS =
			ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
			--no_debug --rw_base 0x30000000 --ro_base 0x00000000 --map --info sizes

			ifeq ($(COMPILE_BIGEND),1)
			# Big Endian
			ARM_CC_OPTIONS += --bigend
			ARM_ASM_OPTIONS += --bigend
			ARM_LINK_OPTIONS += --be8
			endif

			ifeq ($(COMPILE_MICROLIB),1)
			# MicroLIB
			ARM_CC_OPTIONS += --library_type=microlib
			ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
			ARM_LINK_OPTIONS += --library_type=microlib
			endif

			ifeq ($(COMPILE_SMALLMUL),1)
			# In Cortex-M0, small multiply takes 32 cycles
			ARM_CC_OPTIONS += --multiply_latency=32
			endif

			# ---------------------------------------------------------------------------------------
			# gcc options

			GNG_CC = arm-none-eabi-gcc
			GNU_OBJDUMP = arm-none-eabi-objdump
			GNU_OBJCOPY = arm-none-eabi-objcopy

			LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
			LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld

			GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)

			ifeq ($(COMPILE_BIGEND),1)
			# Big Endian
			GNU_CC_FLAGS += -mbig-endian
			endif

			# ---------------------------------------------------------------------------------------
			all: all_$(TOOL_CHAIN)

			# ---------------------------------------------------------------------------------------
			# DS-5
			all_ds5 : $(TESTNAME).hex $(TESTNAME).lst $(TESTNAME).bin

			$(TESTNAME).o : $(TESTNAME).c $(DEPS_LIST)
			armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@

			dma_pl230_driver.o : $(SOFTWARE_DIR)/drivers/dma_pl230_driver.c $(DEPS_LIST)
			armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@

			dataio_functions.o : dataio_functions.c dataio_functions.h $(DEPS_LIST)
			armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@

			$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
			armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@

			retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
			armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@

			uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
			armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@

			$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
			armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@

			$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o dataio_functions.o retarget.o uart_stdout.o
			armlink $(ARM_LINK_OPTIONS) -o $@ $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o dataio_functions.o

			$(TESTNAME).hex : $(TESTNAME).ELF
			fromelf --vhx --8x1 $< --output $@

			$(TESTNAME).bin : $(TESTNAME).ELF
			fromelf --bin $< --output $@

			$(TESTNAME).lst : $(TESTNAME).ELF
			fromelf -c -d -e -s -z -v $< --output $@

			# ---------------------------------------------------------------------------------------
			# gcc
			all_gcc:
			$(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
			$(TESTNAME).c \
			$(SOFTWARE_DIR)/common/retarget/retarget.c \
			$(SOFTWARE_DIR)/common/retarget/uart_stdout.c \
			$(DEVICE_DIR)/Source/$(SYSTEM_FILE).c \
			-I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
			-I $(SOFTWARE_DIR)/common/retarget \
			-I $(SOFTWARE_DIR)/drivers \
			-L $(LINKER_SCRIPT_PATH) \
			-D__STACK_SIZE=0x200 \
			-D__HEAP_SIZE=0x1000 \
			$(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
			# Generate disassembly code
			$(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
			# Generate binary file
			$(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
			# Generate hex file
			$(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex

			# Note:
			# If the version of object copy you are using does not support verilog hex file output,
			# you can generate the hex file from binary file using the following command
			# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex


			# ---------------------------------------------------------------------------------------
			# Keil MDK

			all_keil:
			@echo "Please compile your project code and press ENTER when ready"
			@read dummy

			# ---------------------------------------------------------------------------------------
			# Binary

			all_bin: $(TESTNAME).bin
			# Generate hex file from binary
			od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex

			# ---------------------------------------------------------------------------------------
			# Clean
			clean :
			@rm -rf *.o
			@if [ -e $(TESTNAME).hex ] ; then \
			rm -rf $(TESTNAME).hex ; \
			fi
			@if [ -e $(TESTNAME).lst ] ; then \
			rm -rf $(TESTNAME).lst ; \
			fi
			@if [ -e $(TESTNAME).ELF ] ; then \
			rm -rf $(TESTNAME).ELF ; \
			fi
			@if [ -e $(TESTNAME).bin ] ; then \
			rm -rf $(TESTNAME).bin ; \
			fi
			@rm -rf *.crf
			@rm -rf *.plg
			@rm -rf *.tra
			@rm -rf *.htm
			@rm -rf *.map
			@rm -rf *.dep
			@rm -rf *.d
			@rm -rf *.lnp
			@rm -rf *.bak
			@rm -rf *.lst
			@rm -rf *.axf
			@rm -rf *.sct
			@rm -rf *.__i
			@rm -rf *._ia

testcodes/dataio_tests/dataio_functions.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -24,7 +24,7 @@


	unsigned int DataIO_enable(void) {		unsigned int DataIO_enable(void) {
	DATA_UART->CTRL = 0x00; // re-initialise/flush		// DATA_UART->CTRL = 0x00; // re-initialise/flush
	DATA_UART->CTRL = UART_CTRL_TXRXEN; // enble TX and RX		DATA_UART->CTRL = UART_CTRL_TXRXEN; // enble TX and RX
	return(0);		return(0);
	}		}

testcodes/dataio_tests/dataio_tests.hex

+23 −23

Original line number	Original line	Diff line number	Diff line
	@@ -520,7 +520,7 @@ F0
	F9		F9
	00		00
	F0		F0
	D2		D3
	F8		F8
	00		00
	20		20
	@@ -756,7 +756,7 @@ C0
	B2		B2
	00		00
	F0		F0
	36		37
	F8		F8
	10		10
	BD		BD
	@@ -764,11 +764,11 @@ BD
	B5		B5
	00		00
	F0		F0
	41		42
	F8		F8
	00		00
	F0		F0
	30		31
	F8		F8
	10		10
	BD		BD
	@@ -784,19 +784,19 @@ C0
	B2		B2
	00		00
	F0		F0
	28		29
	F8		F8
	10		10
	BD		BD
	FE		FE
	E7		E7
	27		28
	48		48
	00		00
	21		21
	81		81
	60		60
	27		28
	49		49
	01		01
	61		61
	@@ -804,12 +804,14 @@ E7
	21		21
	81		81
	60		60
	26		27
	48		48
	03		F0
	21		21
	01		01
	61		61
			03
			21
	81		81
	60		60
	25		25
	@@ -822,11 +824,11 @@ E7
	47		47
	25		25
	48		48
	23		24
	49		49
	01		01
	60		60
	24		25
	49		49
	81		81
	61		61
	@@ -850,13 +852,13 @@ D0
	20		20
	88		88
	61		61
	1A		1B
	48		48
	00		00
	21		21
	81		81
	60		60
	30		F0
	21		21
	01		01
	61		61
	@@ -866,7 +868,7 @@ D0
	60		60
	70		70
	47		47
	16		17
	49		49
	8A		8A
	68		68
	@@ -898,7 +900,7 @@ F7
	E7		E7
	0D		0D
	48		48
	0E		0F
	49		49
	42		42
	68		68
	@@ -951,6 +953,8 @@ FF
	FE		FE
	E7		E7
	00		00
			00
			00
	60		60
	00		00
	40		40
	@@ -978,15 +982,11 @@ E0
	F4		F4
	00		00
	00		00
	21		20
	48		49
	00
	21
	81
	60
	03		03
	21		20
	81		88
	60		60
	00		00
	20		20

testcodes/debug_tests/debug_tests.hex

+92 −88

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testcodes/default_slaves_tests/default_slaves_tests.hex

+44 −40

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testcodes/dhry/dhry.hex

+14 −14

Original line number	Original line	Diff line number	Diff line
	@@ -2492,7 +2492,7 @@ FA
	20		20
	00		00
	F0		F0
	BC		BD
	F9		F9
	00		00
	20		20
	@@ -3272,7 +3272,7 @@ C0
	B2		B2
	00		00
	F0		F0
	36		37
	F8		F8
	10		10
	BD		BD
	@@ -3280,11 +3280,11 @@ BD
	B5		B5
	00		00
	F0		F0
	42		43
	F8		F8
	00		00
	F0		F0
	30		31
	F8		F8
	10		10
	BD		BD
	@@ -3300,7 +3300,7 @@ C0
	B2		B2
	00		00
	F0		F0
	28		29
	F8		F8
	10		10
	BD		BD
	@@ -3322,13 +3322,15 @@ E7
	60		60
	27		27
	48		48
	03		F0
	21		21
	01		01
	61		61
			03
			21
	81		81
	60		60
	26		25
	49		49
	20		20
	20		20
	@@ -3336,7 +3338,7 @@ E7
	61		61
	70		70
	47		47
	26		25
	48		48
	24		24
	49		49
	@@ -3360,7 +3362,7 @@ C9
	07		07
	FC		FC
	D0		D0
	1E		1D
	49		49
	20		20
	20		20
	@@ -3372,7 +3374,7 @@ D0
	21		21
	81		81
	60		60
	30		F0
	21		21
	01		01
	61		61
	@@ -3400,7 +3402,7 @@ D1
	60		60
	70		70
	47		47
	11		10
	4A		4A
	53		53
	68		68
	@@ -3416,7 +3418,7 @@ D1
	47		47
	0D		0D
	4B		4B
	0F		0E
	48		48
	59		59
	68		68
	@@ -3469,8 +3471,6 @@ FF
	FE		FE
	E7		E7
	00		00
	00
	00
	60		60
	00		00
	40		40

testcodes/dma350_tests/dma350_tests.hex

+133 −133

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testcodes/dma_tests/dma_tests.hex

+79 −75

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testcodes/dualtimer_demo/dualtimer_demo.hex

+100 −96

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testcodes/gpio_driver_tests/gpio_driver_tests.hex

+122 −118

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testcodes/hello/hello.hex

+31 −27

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testcodes/interrupt_demo/interrupt_demo.hex

+107 −103

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testcodes/memory_tests/memory_tests.hex

+97 −93

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testcodes/romtable_tests/romtable_tests.hex

+125 −121

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testcodes/self_reset_demo/self_reset_demo.hex

+72 −68

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testcodes/sleep_demo/sleep_demo.hex

+91 −87

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testcodes/software_list.txt

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -18,3 +18,4 @@ memory_tests
	romtable_tests		romtable_tests
	interrupt_demo		interrupt_demo
	dataio_tests		dataio_tests
			dataio_dma230_tests

testcodes/timer_driver_tests/timer_driver_tests.hex

+141 −137

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testcodes/timer_tests/timer_tests.hex

+84 −80

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testcodes/watchdog_demo/watchdog_demo.hex

+72 −68

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verif/tb/verilog/nanosoc_tb.v

+3 −3

Original line number	Original line	Diff line number	Diff line
	@@ -209,8 +209,8 @@ initial begin
	pullup(P1[ 4]);		pullup(P1[ 4]);
	pullup(P1[ 5]);		pullup(P1[ 5]);
	pullup(P1[ 6]);		pullup(P1[ 6]);
	// pullup(P1[ 7]);		// pullup(P1[ 7]); // FT1248 mode
	pulldown(P1[ 7]);		pulldown(P1[ 7]); // EXTIO mode
	pullup(P1[ 8]);		pullup(P1[ 8]);
	pullup(P1[ 9]);		pullup(P1[ 9]);
	pullup(P1[10]);		pullup(P1[10]);
	@@ -789,7 +789,7 @@ nanosoc_ft1248x1_track
	`define DMAC_TRACK_PATH u_track_pl230_udma		`define DMAC_TRACK_PATH u_track_pl230_udma

	`ifndef COCOTB_SIM		`ifndef COCOTB_SIM
	nanosoc_dma_log_to_file #(.FILENAME("logs/dma230.log"),.NUM_CHNLS(2),.NUM_CHNL_BITS(1),.TIMESTAMP(1))		nanosoc_dma_log_to_file #(.FILENAME("logs/dma230.log"),.NUM_CHNLS(4),.NUM_CHNL_BITS(2),.TIMESTAMP(1))
	u_nanosoc_dma_log_to_file (		u_nanosoc_dma_log_to_file (
	.hclk (`DMAC_TRACK_PATH.hclk),		.hclk (`DMAC_TRACK_PATH.hclk),
	.hresetn (`DMAC_TRACK_PATH.hresetn),		.hresetn (`DMAC_TRACK_PATH.hresetn),

verif/trace/verilog/nanosoc_dma_log_to_file.v

+3 −3

Original line number	Original line	Diff line number	Diff line
	@@ -11,8 +11,8 @@

	module nanosoc_dma_log_to_file		module nanosoc_dma_log_to_file
	#(parameter FILENAME = "dma.log",		#(parameter FILENAME = "dma.log",
	parameter NUM_CHNLS = 2,		parameter NUM_CHNLS = 4,
	parameter NUM_CHNL_BITS = 1,		parameter NUM_CHNL_BITS = 2,
	parameter TIMESTAMP = 1)		parameter TIMESTAMP = 1)
	(		(
	input wire hclk,		input wire hclk,
	@@ -166,7 +166,7 @@ wire hsel = 1'b1;
	initial		initial
	begin		begin
	fd= $fopen(FILENAME,"w");		fd= $fopen(FILENAME,"w");
	dma_req_last <= 2'b00;		dma_req_last <= {NUM_CHNLS{1'b0}};
	cyc_count <= 0;		cyc_count <= 0;
	if (fd == 0)		if (fd == 0)
	$write(" %m : output log file failed to open \n");		$write(" %m : output log file failed to open \n");

Compare revisions

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Commits on Source 2

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nanosoc/nanosoc_system/verilog/nanosoc_system.v

sldma230_tech @ 7105d696

software/drivers/dma_pl230_driver.h

testcodes/apb_mux_tests/apb_mux_tests.hex

testcodes/bootloader/bootloader.hex

testcodes/dataio_dma230_tests/data_in.csv

testcodes/dataio_dma230_tests/dataio_dma230_tests.c

testcodes/dataio_dma230_tests/dataio_dma230_tests.hex

testcodes/dataio_dma230_tests/dataio_functions.c

testcodes/dataio_dma230_tests/dataio_functions.h

testcodes/dataio_dma230_tests/makefile

testcodes/dataio_tests/dataio_functions.c

testcodes/dataio_tests/dataio_tests.hex

testcodes/debug_tests/debug_tests.hex

testcodes/default_slaves_tests/default_slaves_tests.hex

testcodes/dhry/dhry.hex

testcodes/dma350_tests/dma350_tests.hex

testcodes/dma_tests/dma_tests.hex

testcodes/dualtimer_demo/dualtimer_demo.hex

testcodes/gpio_driver_tests/gpio_driver_tests.hex

testcodes/hello/hello.hex

testcodes/interrupt_demo/interrupt_demo.hex

testcodes/memory_tests/memory_tests.hex

testcodes/romtable_tests/romtable_tests.hex

testcodes/self_reset_demo/self_reset_demo.hex

testcodes/sleep_demo/sleep_demo.hex

testcodes/software_list.txt

testcodes/timer_driver_tests/timer_driver_tests.hex

testcodes/timer_tests/timer_tests.hex

testcodes/watchdog_demo/watchdog_demo.hex

verif/tb/verilog/nanosoc_tb.v

verif/trace/verilog/nanosoc_dma_log_to_file.v