From d64e49d57353c2c72a74a5b8940732034b2b87d6 Mon Sep 17 00:00:00 2001 From: Daniel Newbrook <dwn1c21@soton.ac.uk> Date: Fri, 22 Sep 2023 10:01:06 +0100 Subject: [PATCH] Update DMA350_tests interrupts still not working --- .../dma/verilog/nanosoc_ss_dma.v | 10 +- software/common/validation/dma350_tests.c | 123 ++++++++++++------ 2 files changed, 85 insertions(+), 48 deletions(-) diff --git a/nanosoc/nanosoc_subsystems/dma/verilog/nanosoc_ss_dma.v b/nanosoc/nanosoc_subsystems/dma/verilog/nanosoc_ss_dma.v index 453f69f..6f05a19 100644 --- a/nanosoc/nanosoc_subsystems/dma/verilog/nanosoc_ss_dma.v +++ b/nanosoc/nanosoc_subsystems/dma/verilog/nanosoc_ss_dma.v @@ -124,8 +124,8 @@ module nanosoc_ss_dma #( assign DMAC_1_PSEL_IN = DMAC_1_PSEL | DMAC_1_PSEL_HI; // DMA Status Tie-off signals - assign DMAC_0_DMA_DONE = {DMAC_0_CHANNEL_NUM{1'b0}}; - assign DMAC_0_DMA_ERR = 1'b0; + assign DMAC_1_DMA_DONE = {DMAC_0_CHANNEL_NUM{1'b0}}; + assign DMAC_1_DMA_ERR = 1'b0; sldma350_ahb #( .SYS_ADDR_W (SYS_ADDR_W), @@ -174,9 +174,9 @@ module nanosoc_ss_dma #( .PREADY(DMAC_1_PREADY), .PSLVERR(DMAC_1_PSLVERR), // DMA Request and Status Port - .DMA_REQ(DMAC_1_DMA_REQ), - .DMA_DONE(DMAC_1_DMA_DONE), - .DMA_ERR(DMAC_1_DMA_ERR), + .DMA_REQ(DMAC_0_DMA_REQ), + .DMA_DONE(DMAC_0_DMA_DONE), + .DMA_ERR(DMAC_0_DMA_ERR), .DMAC_STR_OUT_0_TVALID(DMAC_STR_OUT_0_TVALID), .DMAC_STR_OUT_0_TREADY(DMAC_STR_OUT_0_TREADY), diff --git a/software/common/validation/dma350_tests.c b/software/common/validation/dma350_tests.c index a8a849e..c339c0f 100644 --- a/software/common/validation/dma350_tests.c +++ b/software/common/validation/dma350_tests.c @@ -1,6 +1,8 @@ #include "CMSDK_CM0.h" #include <stdio.h> #include "uart_stdout.h" +#include "CMSDK_driver.h" + #include "config_id.h" #include <string.h> @@ -28,14 +30,6 @@ #define DATA_SIZE 256 #define LARGE_DATA_SIZE 10000 -// Note: Please modify to the desired boot settings -#define DMA_BOOT_ADDR 0x10000000 - -// Privileged mode enabled and disabled -// Note: Please modify according to your system -#define EnablePrivilegedMode() __asm("SVC #0") -#define DisablePrivilegedMode() __asm("SVC #1") - #define HW32_REG(ADDRESS) (*((volatile unsigned long *)(ADDRESS))) #if defined ( __CC_ARM ) @@ -221,7 +215,7 @@ int main(void) { AdaTrigInType command_trig_in = { .USETRIGIN = 1, .TRIGINSEL = 0, - .TRIGINTYPE = TRIGTYPE_HW_EXTERNAL, + .TRIGINTYPE = TRIGTYPE_SW_ONLY, .TRIGINMODE = TRIGINMODE_CMD, .TRIGINBLKSIZE = 0 }; @@ -293,40 +287,7 @@ int main(void) { printf("Number of DMA channels: %d \n", ch_num); printf("Number of DMA trigger inputs: %d \n", trig_in_num); printf("Number of DMA trigger outputs: %d \n", trig_out_num); - - printf("---STARTING 1D Command Tests With interrupts---\n"); - printf("Test BURST with 1D basic commands from COPY_ADDR_SRC to COPY_ADDR_DST...\n"); - for (uint32_t ch=0; ch < ch_num; ch++) { - // - // Write all settings to the DMA registers - AdaChannelInit(ch_settings, ch_srcattr, ch_desattr, ch, SECURE); - Ada1DIncrCommand(command_base, command_1d_incr, ch, SECURE); - SetAdaWrapRegs(command_1d_wrap, ch, SECURE); - AdaSetIntEn(ch_irqs, ch, SECURE); - - - dma_done_irq_expected = 1; - dma_done_irq_occurred = 0; - NVIC_ClearPendingIRQ(DMA_IRQn); - NVIC_EnableIRQ(DMA_IRQn); - - - printf("DMA %d configured. Starting the transfer.\n", ch); - - - // Start DMA operation and wait for done IRQ - AdaEnable(ch, SECURE); - - delay(256); - printf("DMA Interrupt Handled\n"); - uint8_t ch_enabled = 1; - while (ch_enabled == 1) { - ch_enabled = AdaGetEnable(ch, SECURE); - } - printf("DMA transfer finished\n"); - } - - NVIC_DisableIRQ(DMA_IRQn); + __disable_irq(); printf("---STARTING 1D Command Tests No interrupts---\n"); // ********************************************************************************************** @@ -423,7 +384,82 @@ int main(void) { printf("DMA transfer finished\n"); } + printf("Test Software Trigger interface\n"); + for (uint32_t ch=0; ch < ch_num; ch++) { + // + // Write all settings to the DMA registers + AdaChannelInit(ch_settings_no_burst, ch_srcattr, ch_desattr, ch, SECURE); + Ada1DIncrCommand(command_base, command_1d_incr, ch, SECURE); + SetAdaWrapRegs(command_1d_wrap, ch, SECURE); + AdaDesTrigInInit(command_trig_in, CH0, SECURE); + + printf("DMA %d configured. Starting the transfer.\n", ch); + + // Start DMA operation and wait for done IRQ + AdaEnable(ch, SECURE); + AdaDesTrigInEnable(1,ch,SECURE); + AdaDesSwTrigInReq(BLOCK,ch,SECURE); + + uint8_t timeout=0; + uint8_t i = 0; + uint8_t ch_enabled = 1; + while (ch_enabled == 1 && timeout==0) { + ch_enabled = AdaGetEnable(ch, SECURE); + i++; + if (i>512){ + timeout=1; + } + } + if (timeout==1){ + printf("DMA Timeout occured"); + AdaStatType DMA_status = AdaReadStatus(ch, SECURE); + printf("DMA STAT_DONE: %d \n",DMA_status.STAT_DONE); + printf("DMA STAT_ERR: %d \n",DMA_status.STAT_ERR); + printf("DMA STAT_DISABLED: %d \n",DMA_status.STAT_DISABLED); + printf("DMA STAT_PAUSED: %d \n",DMA_status.STAT_PAUSED); + printf("DMA STAT_RESUMEWAIT: %d \n",DMA_status.STAT_RESUMEWAIT); + + } + printf("DMA transfer finished\n"); + } + printf("---STARTING 1D Command Tests With interrupts---\n"); + __enable_irq(); + printf("Test BURST with 1D basic commands from COPY_ADDR_SRC to COPY_ADDR_DST...\n"); + for (uint32_t ch=0; ch < ch_num; ch++) { + // + // Write all settings to the DMA registers + AdaChannelInit(ch_settings, ch_srcattr, ch_desattr, ch, SECURE); + Ada1DIncrCommand(command_base, command_1d_incr, ch, SECURE); + SetAdaWrapRegs(command_1d_wrap, ch, SECURE); + AdaSetIntEn(ch_irqs, ch, SECURE); + + + dma_done_irq_expected = 1; + dma_done_irq_occurred = 0; + NVIC_ClearPendingIRQ(DMA_IRQn); + NVIC_EnableIRQ(DMA_IRQn); + + + printf("DMA %d configured. Starting the transfer.\n", ch); + + + // Start DMA operation and wait for done IRQ + AdaEnable(ch, SECURE); + printf("debug\n"); + while (dma_done_irq_occurred==0){ + __WFE(); + } + printf("DMA Interrupt Handled\n"); + uint8_t ch_enabled = 1; + while (ch_enabled == 1) { + ch_enabled = AdaGetEnable(ch, SECURE); + } + printf("DMA transfer finished\n"); + } + + NVIC_DisableIRQ(DMA_IRQn); + UartEndSimulation(); return 0; } @@ -504,6 +540,7 @@ void DMAClearChIrq(uint32_t ch) { void DMA_Handler(void){ __disable_irq(); printf("DMA Interrupted \n"); + dma_done_irq_occurred++; DMAClearChIrq(0); DMAClearChIrq(1); __enable_irq(); -- GitLab