diff --git a/verif/tb/verilog/nanosoc_tb_qs.v b/verif/tb/verilog/nanosoc_tb_qs.v
index abaffd37fd1fe2ef713bec9d82d95f65ffc1822c..a32dd268b0ac025c36e91621e268e3e665d68909 100644
--- a/verif/tb/verilog/nanosoc_tb_qs.v
+++ b/verif/tb/verilog/nanosoc_tb_qs.v
@@ -360,15 +360,15 @@ nanosoc_ft1248x1_track
 `endif
 
 `ifndef COCOTB_SIM
-  nanosoc_uart_capture  #(.LOGFILENAME("logs/ft1248_ip.log"))
-    u_nanosoc_uart_capture2(
-    .RESETn               (NRST),
-    .CLK                  (ft_clk2uart),
-    .RXD                  (ft_txd2uart),
-    .DEBUG_TESTER_ENABLE  ( ),
-    .SIMULATIONEND        (),      // This signal set to 1 at the end of simulation.
-    .AUXCTRL              ()
-  );
+//  nanosoc_uart_capture  #(.LOGFILENAME("logs/ft1248_ip.log"))
+//    u_nanosoc_uart_capture2(
+//    .RESETn               (NRST),
+//    .CLK                  (ft_clk2uart),
+//    .RXD                  (ft_txd2uart),
+//    .DEBUG_TESTER_ENABLE  ( ),
+//    .SIMULATIONEND        (),      // This signal set to 1 at the end of simulation.
+//    .AUXCTRL              ()
+//  );
 `endif
 
  // --------------------------------------------------------------------------------