From b0c277f1298b4e794fbef0e52f427a6264c35070 Mon Sep 17 00:00:00 2001
From: dam1n19 <dam1n19@soton.ac.uk>
Date: Sat, 1 Jul 2023 10:49:35 +0100
Subject: [PATCH] Renamed system directory to nanosoc
---
.gitlab-ci.yml | 36 +++++++-------
.gitmodules | 12 ++---
flist/nanosoc.flist | 2 +-
flist/nanosoc_busmatrix_ip.flist | 48 +++++++++----------
flist/nanosoc_ip.flist | 46 +++++++++---------
flist/nanosoc_qs.flist | 2 +-
hal/nanosoc_ip.bb | 4 +-
.../nanosoc_ahb32_4x7_busmatrix.xml | 0
.../nanosoc_ahb32_4x7_busmatrix_lite.xml | 0
.../nanosoc_busmatrix/nanosoc_busmatrix.xml | 0
.../nanosoc_busmatrix_lite.xml | 0
.../nanosoc_busmatrix/logs/nanosoc.log | 0
.../nanosoc_busmatrix/makefile | 2 +-
.../nanosoc_arbiter_BOOTROM_0.v | 0
.../nanosoc_arbiter_DMEM_0.v | 0
.../nanosoc_busmatrix/nanosoc_arbiter_EXP.v | 0
.../nanosoc_arbiter_EXPRAM_H.v | 0
.../nanosoc_arbiter_EXPRAM_L.v | 0
.../nanosoc_arbiter_IMEM_0.v | 0
.../nanosoc_busmatrix/nanosoc_arbiter_SYSIO.v | 0
.../nanosoc_arbiter_SYSTABLE.v | 0
.../nanosoc_busmatrix/nanosoc_busmatrix.v | 0
.../nanosoc_busmatrix_default_slave.v | 0
.../nanosoc_busmatrix_lite.v | 0
.../nanosoc_inititator_input.v | 0
.../nanosoc_matrix_decode_CPU_0.v | 0
.../nanosoc_matrix_decode_DEBUG.v | 0
.../nanosoc_matrix_decode_DMAC_0.v | 0
.../nanosoc_matrix_decode_DMAC_1.v | 0
.../nanosoc_target_output_BOOTROM_0.v | 0
.../nanosoc_target_output_DMEM_0.v | 0
.../nanosoc_target_output_EXP.v | 0
.../nanosoc_target_output_EXPRAM_H.v | 0
.../nanosoc_target_output_EXPRAM_L.v | 0
.../nanosoc_target_output_IMEM_0.v | 0
.../nanosoc_target_output_SYSIO.v | 0
.../nanosoc_target_output_SYSTABLE.v | 0
.../nanosoc_busmatrix/xml/nanosoc.xml | 0
.../nanosoc_chip/chip/verilog/nanosoc_chip.v | 0
.../pads/glib/verilog/nanosoc_chip_pads.v | 0
.../nanosoc_control/verilog/nanosoc_clkctrl.v | 0
.../nanosoc_control/verilog/nanosoc_pin_mux.v | 0
.../bootrom_0/verilog/nanosoc_bootrom_cpu_0.v | 0
.../verilog/nanosoc_region_bootrom_0.v | 0
.../dmem_0/verilog/nanosoc_region_dmem_0.v | 0
.../exp/verilog/nanosoc_region_exp.v | 0
.../verilog/nanosoc_region_expram_h.v | 0
.../verilog/nanosoc_region_expram_l.v | 0
.../ram/verilog/nanosoc_region_imem_0.v | 0
.../rom/verilog/nanosoc_region_imem_0.v | 0
.../sysio/verilog/nanosoc_region_sysio.v | 0
.../sysio/verilog/nanosoc_sysctrl.v | 0
.../sysio/verilog/nanosoc_sysio_apb_ss.v | 0
.../sysio/verilog/nanosoc_sysio_decode.v | 0
.../verilog/nanosoc_coresight_systable.v | 0
.../verilog/nanosoc_region_systable.v | 0
.../cpu/verilog/nanosoc_ss_cpu.v | 0
.../debug/verilog/nanosoc_ss_debug.v | 0
.../dma/dma230/verilog/nanosoc_ss_dma.v | 0
.../dma/no_dmac/verilog/nanosoc_ss_dma.v | 0
.../expansion/verilog/nanosoc_ss_expansion.v | 0
.../verilog/nanosoc_ss_interconnect.v | 0
.../verilog/nanosoc_ss_systemctrl.v | 0
.../nanosoc_system/verilog/nanosoc_system.v | 0
system/slcorem0_tech | 1 -
system/sldma230_tech | 1 -
system/socdebug_tech | 1 -
67 files changed, 76 insertions(+), 79 deletions(-)
rename {system => nanosoc}/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix.xml (100%)
rename {system => nanosoc}/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix_lite.xml (100%)
rename {system => nanosoc}/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix.xml (100%)
rename {system => nanosoc}/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix_lite.xml (100%)
rename {system => nanosoc}/nanosoc_busmatrix/logs/nanosoc.log (100%)
rename {system => nanosoc}/nanosoc_busmatrix/makefile (95%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_BOOTROM_0.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_DMEM_0.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXP.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_H.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_L.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_IMEM_0.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSIO.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSTABLE.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_default_slave.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_inititator_input.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_CPU_0.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DEBUG.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_0.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_1.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_BOOTROM_0.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_DMEM_0.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXP.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_H.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_L.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_IMEM_0.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSIO.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSTABLE.v (100%)
rename {system => nanosoc}/nanosoc_busmatrix/xml/nanosoc.xml (100%)
rename {system => nanosoc}/nanosoc_chip/chip/verilog/nanosoc_chip.v (100%)
rename {system => nanosoc}/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v (100%)
rename {system => nanosoc}/nanosoc_control/verilog/nanosoc_clkctrl.v (100%)
rename {system => nanosoc}/nanosoc_control/verilog/nanosoc_pin_mux.v (100%)
rename {system => nanosoc}/nanosoc_regions/bootrom_0/verilog/nanosoc_bootrom_cpu_0.v (100%)
rename {system => nanosoc}/nanosoc_regions/bootrom_0/verilog/nanosoc_region_bootrom_0.v (100%)
rename {system => nanosoc}/nanosoc_regions/dmem_0/verilog/nanosoc_region_dmem_0.v (100%)
rename {system => nanosoc}/nanosoc_regions/exp/verilog/nanosoc_region_exp.v (100%)
rename {system => nanosoc}/nanosoc_regions/expram_h/verilog/nanosoc_region_expram_h.v (100%)
rename {system => nanosoc}/nanosoc_regions/expram_l/verilog/nanosoc_region_expram_l.v (100%)
rename {system => nanosoc}/nanosoc_regions/imem_0/ram/verilog/nanosoc_region_imem_0.v (100%)
rename {system => nanosoc}/nanosoc_regions/imem_0/rom/verilog/nanosoc_region_imem_0.v (100%)
rename {system => nanosoc}/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v (100%)
rename {system => nanosoc}/nanosoc_regions/sysio/verilog/nanosoc_sysctrl.v (100%)
rename {system => nanosoc}/nanosoc_regions/sysio/verilog/nanosoc_sysio_apb_ss.v (100%)
rename {system => nanosoc}/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v (100%)
rename {system => nanosoc}/nanosoc_regions/systable/verilog/nanosoc_coresight_systable.v (100%)
rename {system => nanosoc}/nanosoc_regions/systable/verilog/nanosoc_region_systable.v (100%)
rename {system => nanosoc}/nanosoc_subsystems/cpu/verilog/nanosoc_ss_cpu.v (100%)
rename {system => nanosoc}/nanosoc_subsystems/debug/verilog/nanosoc_ss_debug.v (100%)
rename {system => nanosoc}/nanosoc_subsystems/dma/dma230/verilog/nanosoc_ss_dma.v (100%)
rename {system => nanosoc}/nanosoc_subsystems/dma/no_dmac/verilog/nanosoc_ss_dma.v (100%)
rename {system => nanosoc}/nanosoc_subsystems/expansion/verilog/nanosoc_ss_expansion.v (100%)
rename {system => nanosoc}/nanosoc_subsystems/interconnect/verilog/nanosoc_ss_interconnect.v (100%)
rename {system => nanosoc}/nanosoc_subsystems/systemctrl/verilog/nanosoc_ss_systemctrl.v (100%)
rename {system => nanosoc}/nanosoc_system/verilog/nanosoc_system.v (100%)
delete mode 160000 system/slcorem0_tech
delete mode 160000 system/sldma230_tech
delete mode 160000 system/socdebug_tech
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index f57d177..5bd1e29 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -26,14 +26,14 @@ compile-bootrom:
stage: compile
script:
- source ./set_env.sh
- - mkdir -p $SOCLABS_NANOSOC_TECH_DIR/system/src/bootrom
- - make -C $SOCLABS_NANOSOC_TECH_DIR/system bootrom SIM_TOP_DIR=$SOCLABS_NANOSOC_TECH_DIR/sim BOOTROM_BUILD_DIR=$SOCLABS_NANOSOC_TECH_DIR/system/src/bootrom TOOL_CHAIN=ds5
+ - mkdir -p $SOCLABS_NANOSOC_TECH_DIR/nanosoc/src/bootrom
+ - make -C $SOCLABS_NANOSOC_TECH_DIR/system bootrom SIM_TOP_DIR=$SOCLABS_NANOSOC_TECH_DIR/sim BOOTROM_BUILD_DIR=$SOCLABS_NANOSOC_TECH_DIR/nanosoc/src/bootrom TOOL_CHAIN=ds5
artifacts:
paths:
- ./sim/bootloader/bootloader.hex
- - ./system/testcodes/bootloader/bootloader.hex
- - ./system/src/bootrom/verilog/bootrom.v
- - ./system/src/bootrom/bintxt/bootrom.bintxt
+ - ./nanosoc/testcodes/bootloader/bootloader.hex
+ - ./nanosoc/src/bootrom/verilog/bootrom.v
+ - ./nanosoc/src/bootrom/bintxt/bootrom.bintxt
tags:
- ds5
@@ -50,7 +50,7 @@ build-job-Z2: # This job runs in the build stage, which runs first.
stage: build
script:
# move to fpga_imp directory and run the fpga build script for pynq z2
- - cd ./system/fpga_imp/
+ - cd ./nanosoc/fpga_imp/
- source ../../set_env.sh
- if source ./build_fpga_pynq_z2.scr; then echo "Vivado Finished"; fi
- FILE=./pynq_export/pz2/pynq/overlays/soclabs/design_1.bit
@@ -63,8 +63,8 @@ build-job-Z2: # This job runs in the build stage, which runs first.
artifacts:
paths:
# Keep the generated bit and hwh file from fpga build script
- - ./system/fpga_imp/pynq_export/pz2/pynq/overlays/soclabs/design_1.bit
- - ./system/fpga_imp/pynq_export/pz2/pynq/overlays/soclabs/design_1.hwh
+ - ./nanosoc/fpga_imp/pynq_export/pz2/pynq/overlays/soclabs/design_1.bit
+ - ./nanosoc/fpga_imp/pynq_export/pz2/pynq/overlays/soclabs/design_1.hwh
tags:
- Vivado2021.1
@@ -72,7 +72,7 @@ build-job-ZCU104: # This job runs in the build stage, which runs first.
stage: build
script:
# move to fpga_imp directory and run the fpga build script for pynq z2
- - cd ./system/fpga_imp/
+ - cd ./nanosoc/fpga_imp/
- source ../../set_env.sh
- if source ./build_fpga_pynq_zcu104.scr; then echo "Vivado Finished"; fi
- FILE=./pynq_export/pz104/pynq/overlays/soclabs/design_1.bit
@@ -85,8 +85,8 @@ build-job-ZCU104: # This job runs in the build stage, which runs first.
artifacts:
paths:
# Keep the generated bit and hwh file from fpga build script
- - ./system/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.bit
- - ./system/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.hwh
+ - ./nanosoc/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.bit
+ - ./nanosoc/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.hwh
tags:
- Vivado2021.1
@@ -97,7 +97,7 @@ build-job-ZCU104: # This job runs in the build stage, which runs first.
# - echo "Deploying application to Z2"
# # use smbclient to transfer accross the bit, hwh and python script files to the z2 xilinx board
# # could probably set this up as scp with RSA keys in future
-# - smbclient //192.168.2.99/xilinx -m SMB3 -U xilinx%xilinx -c 'cd ./pynq/overlays/soclabs/ ; put ./system/fpga_imp/pynq_export/pz2/pynq/overlays/#soclabs/design_1.bit ./design_1.bit' -E 2>errorlog
+# - smbclient //192.168.2.99/xilinx -m SMB3 -U xilinx%xilinx -c 'cd ./pynq/overlays/soclabs/ ; put ./nanosoc/fpga_imp/pynq_export/pz2/pynq/overlays/#soclabs/design_1.bit ./design_1.bit' -E 2>errorlog
# - if (grep -r "Connection to 192.168.2.99 failed" ./errorlog)
# - then
# - echo "Connection to Z2 Board Failed"
@@ -106,7 +106,7 @@ build-job-ZCU104: # This job runs in the build stage, which runs first.
# - echo "Connection to Z2 Board successful"
# - fi
# - rm errorlog
-# - smbclient //192.168.2.99/xilinx -m SMB3 -U xilinx%xilinx -c 'cd ./pynq/overlays/soclabs/ ; put ./system/fpga_imp/pynq_export/pz2/pynq/overlays/#soclabs/design_1.hwh ./design_1.hwh' -E 2>errorlog
+# - smbclient //192.168.2.99/xilinx -m SMB3 -U xilinx%xilinx -c 'cd ./pynq/overlays/soclabs/ ; put ./nanosoc/fpga_imp/pynq_export/pz2/pynq/overlays/#soclabs/design_1.hwh ./design_1.hwh' -E 2>errorlog
# - if (grep -r "Connection to 192.168.2.99 failed" ./errorlog)
# - then
# - echo "Connection to Z2 Board Failed"
@@ -115,7 +115,7 @@ build-job-ZCU104: # This job runs in the build stage, which runs first.
# - echo "Connection to Z2 Board successful"
# - fi
# - rm errorlog
-# - cd ./system/fpga_imp/CI_verification
+# - cd ./nanosoc/fpga_imp/CI_verification
# - smbclient //192.168.2.99/xilinx -m SMB3 -U xilinx%xilinx -c 'put ./load_bitfile.py ./load_bitfile.py' -E 2>errorlog
# - if (grep -r "Connection to 192.168.2.99 failed" ./errorlog)
# - then
@@ -174,11 +174,11 @@ deploy-job-ZCU104: # This job runs in the deploy stage.
- screen -r zynq -X stuff "./ZCU104_connect.sh\n"
- sleep 10
# use scp to copy over bit files and python script
- - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/nanosoc_tech/system/fpga_imp/CI_verification/load_bitfile.py ./ \n"
+ - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/nanosoc_tech/nanosoc/fpga_imp/CI_verification/load_bitfile.py ./ \n"
- sleep 2
- - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/nanosoc_tech/system/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.bit ./pynq/overlays/soclabs/design_1.bit \n"
+ - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/nanosoc_tech/nanosoc/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.bit ./pynq/overlays/soclabs/design_1.bit \n"
- sleep 2
- - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/nanosoc_tech/system/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.hwh ./pynq/overlays/soclabs/design_1.hwh \n"
+ - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/nanosoc_tech/nanosoc/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.hwh ./pynq/overlays/soclabs/design_1.hwh \n"
- sleep 2
# Need root access to load the overlay onto the FPGA
- screen -r zynq -X stuff "sudo su\n"
@@ -196,7 +196,7 @@ deploy-job-ZCU104: # This job runs in the deploy stage.
- screen -r zynq -X stuff "deactivate \n"
- screen -r zynq -X stuff "exit \n"
# test the screenlog for "Overlay Loaded"
- - cp ./system/fpga_imp/CI_verification/test_bitfile_ZCU104.sh ./
+ - cp ./nanosoc/fpga_imp/CI_verification/test_bitfile_ZCU104.sh ./
- chmod +x test_bitfile_ZCU104.sh
- ./test_bitfile_ZCU104.sh
diff --git a/.gitmodules b/.gitmodules
index 63ccd3e..3350e82 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,9 +1,9 @@
-[submodule "system/socdebug_tech"]
- path = system/socdebug_tech
+[submodule "nanosoc/socdebug_tech"]
+ path = nanosoc/socdebug_tech
url = https://git.soton.ac.uk/soclabs/socdebug_tech.git
-[submodule "system/sldma230_tech"]
- path = system/sldma230_tech
+[submodule "nanosoc/sldma230_tech"]
+ path = nanosoc/sldma230_tech
url = https://git.soton.ac.uk/soclabs/sldma230_tech.git
-[submodule "system/slcorem0_tech"]
- path = system/slcorem0_tech
+[submodule "nanosoc/slcorem0_tech"]
+ path = nanosoc/slcorem0_tech
url = https://git.soton.ac.uk/soclabs/slcorem0_tech.git
diff --git a/flist/nanosoc.flist b/flist/nanosoc.flist
index cb80eb1..8d57eec 100644
--- a/flist/nanosoc.flist
+++ b/flist/nanosoc.flist
@@ -33,4 +33,4 @@
-f $(SOCLABS_SLDMA230_TECH_DIR)/flist/sldma230_ip.flist
// DMA Subystem
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_subsystems/dma/dma230/verilog/nanosoc_ss_dma.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/dma/dma230/verilog/nanosoc_ss_dma.v
diff --git a/flist/nanosoc_busmatrix_ip.flist b/flist/nanosoc_busmatrix_ip.flist
index 838d831..a328ec8 100644
--- a/flist/nanosoc_busmatrix_ip.flist
+++ b/flist/nanosoc_busmatrix_ip.flist
@@ -16,27 +16,27 @@
+libext+.v+.vlib
// ============= NanoSoC BusMatrix IP search path =============
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_BOOTROM_0.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_DMEM_0.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_H.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_L.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXP.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_IMEM_0.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSIO.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSTABLE.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_default_slave.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_inititator_input.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_CPU_0.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DEBUG.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_0.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_1.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_BOOTROM_0.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_DMEM_0.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_H.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_L.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXP.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_IMEM_0.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSIO.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSTABLE.v
\ No newline at end of file
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_BOOTROM_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_DMEM_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_H.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_L.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXP.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_IMEM_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSIO.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSTABLE.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_default_slave.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_inititator_input.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_CPU_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DEBUG.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_1.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_BOOTROM_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_DMEM_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_H.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_L.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXP.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_IMEM_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSIO.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSTABLE.v
\ No newline at end of file
diff --git a/flist/nanosoc_ip.flist b/flist/nanosoc_ip.flist
index ecc9dec..95250e2 100644
--- a/flist/nanosoc_ip.flist
+++ b/flist/nanosoc_ip.flist
@@ -18,52 +18,52 @@
// ============= NanoSoC IP search path =============
// NanoSoC Chip Pads Level
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v
// NanoSoC Chip Level
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_chip/chip/verilog/nanosoc_chip.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_chip/chip/verilog/nanosoc_chip.v
// NanoSoC System Level
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_system/verilog/nanosoc_system.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_system/verilog/nanosoc_system.v
// NanoSoC Subsystems
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_subsystems/cpu/verilog/nanosoc_ss_cpu.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_subsystems/debug/verilog/nanosoc_ss_debug.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_subsystems/expansion/verilog/nanosoc_ss_expansion.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_subsystems/systemctrl/verilog/nanosoc_ss_systemctrl.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_subsystems/interconnect/verilog/nanosoc_ss_interconnect.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/cpu/verilog/nanosoc_ss_cpu.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/debug/verilog/nanosoc_ss_debug.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/expansion/verilog/nanosoc_ss_expansion.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/systemctrl/verilog/nanosoc_ss_systemctrl.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/interconnect/verilog/nanosoc_ss_interconnect.v
// Bus Matrix
-f $(SOCLABS_NANOSOC_TECH_DIR)/flist/nanosoc_busmatrix_ip.flist
// NanoSoC Regions - Bootrom
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/bootrom_0/verilog/nanosoc_bootrom_cpu_0.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/bootrom_0/verilog/nanosoc_region_bootrom_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/bootrom_0/verilog/nanosoc_bootrom_cpu_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/bootrom_0/verilog/nanosoc_region_bootrom_0.v
// NanoSoC Regions - CPU Memories
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/dmem_0/verilog/nanosoc_region_dmem_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/dmem_0/verilog/nanosoc_region_dmem_0.v
// TODO: Use ROM Memory for IMEM - switch back to SRAM
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/imem_0/rom/verilog/nanosoc_region_imem_0.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/imem_0/rom/verilog/nanosoc_region_imem_0.v
// NanoSoC Regions - Expansion Regions
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/exp/verilog/nanosoc_region_exp.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/expram_h/verilog/nanosoc_region_expram_h.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/expram_l/verilog/nanosoc_region_expram_l.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/exp/verilog/nanosoc_region_exp.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/expram_h/verilog/nanosoc_region_expram_h.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/expram_l/verilog/nanosoc_region_expram_l.v
// NanoSoC Regions - Sysio Region
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/sysio/verilog/nanosoc_sysctrl.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/sysio/verilog/nanosoc_sysio_apb_ss.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysctrl.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_apb_ss.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v
// NanoSoC Regions - SysTable Region
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/systable/verilog/nanosoc_coresight_systable.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_regions/systable/verilog/nanosoc_region_systable.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/systable/verilog/nanosoc_coresight_systable.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/systable/verilog/nanosoc_region_systable.v
// NanoSoC Control
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_control/verilog/nanosoc_clkctrl.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_control/verilog/nanosoc_pin_mux.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_control/verilog/nanosoc_clkctrl.v
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_control/verilog/nanosoc_pin_mux.v
diff --git a/flist/nanosoc_qs.flist b/flist/nanosoc_qs.flist
index f8399d3..f6f7810 100644
--- a/flist/nanosoc_qs.flist
+++ b/flist/nanosoc_qs.flist
@@ -30,4 +30,4 @@
-f $(SOCLABS_SOCDEBUG_TECH_DIR)/flist/socdebug.flist
// DMA Subystem
-$(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_subsystems/dma/no_dmac/verilog/nanosoc_ss_dma.v
\ No newline at end of file
+$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/dma/no_dmac/verilog/nanosoc_ss_dma.v
\ No newline at end of file
diff --git a/hal/nanosoc_ip.bb b/hal/nanosoc_ip.bb
index 0ad69c3..7f3e57c 100644
--- a/hal/nanosoc_ip.bb
+++ b/hal/nanosoc_ip.bb
@@ -16,11 +16,11 @@ bb_list
{
// Exclude Bus Matrix as Generated from Arm IP
designunit = nanosoc_busmatrix_lite;
- file = $SOCLABS_NANOSOC_TECH_DIR/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v;
+ file = $SOCLABS_NANOSOC_TECH_DIR/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v;
// Temporarily Exclude SoCDebug
designunit = socdebug_ahb;
- file = $SOCLABS_NANOSOC_TECH_DIR/system/socdebug_tech/controller/verilog/socdebug_ahb.v;
+ file = $SOCLABS_NANOSOC_TECH_DIR/nanosoc/socdebug_tech/controller/verilog/socdebug_ahb.v;
// Temporarily Exclude Accelerator Subsystem (just linting NanoSoC)
designunit = accelerator_subsystem;
diff --git a/system/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix.xml b/nanosoc/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix.xml
similarity index 100%
rename from system/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix.xml
rename to nanosoc/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix.xml
diff --git a/system/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix_lite.xml b/nanosoc/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix_lite.xml
similarity index 100%
rename from system/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix_lite.xml
rename to nanosoc/nanosoc_busmatrix/ipxact/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix_lite.xml
diff --git a/system/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix.xml b/nanosoc/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix.xml
similarity index 100%
rename from system/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix.xml
rename to nanosoc/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix.xml
diff --git a/system/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix_lite.xml b/nanosoc/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix_lite.xml
similarity index 100%
rename from system/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix_lite.xml
rename to nanosoc/nanosoc_busmatrix/ipxact/nanosoc_busmatrix/nanosoc_busmatrix_lite.xml
diff --git a/system/nanosoc_busmatrix/logs/nanosoc.log b/nanosoc/nanosoc_busmatrix/logs/nanosoc.log
similarity index 100%
rename from system/nanosoc_busmatrix/logs/nanosoc.log
rename to nanosoc/nanosoc_busmatrix/logs/nanosoc.log
diff --git a/system/nanosoc_busmatrix/makefile b/nanosoc/nanosoc_busmatrix/makefile
similarity index 95%
rename from system/nanosoc_busmatrix/makefile
rename to nanosoc/nanosoc_busmatrix/makefile
index c6f3fb7..8616e0f 100644
--- a/system/nanosoc_busmatrix/makefile
+++ b/nanosoc/nanosoc_busmatrix/makefile
@@ -15,7 +15,7 @@
MATRIX_NAME ?= nanosoc
# Top-level directory of Bus Matrix
-BUILD_DIR ?= $(SOCLABS_NANOSOC_TECH_DIR)/system/nanosoc_busmatrix
+BUILD_DIR ?= $(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_busmatrix
# Directory location of BuildBusMatrix Script
SOURCE_DIR = $(ARM_IP_LIBRARY_PATH)/latest/Corstone-101/logical/cmsdk_ahb_busmatrix
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_BOOTROM_0.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_BOOTROM_0.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_BOOTROM_0.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_BOOTROM_0.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_DMEM_0.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_DMEM_0.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_DMEM_0.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_DMEM_0.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXP.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXP.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXP.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXP.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_H.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_H.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_H.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_H.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_L.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_L.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_L.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_EXPRAM_L.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_IMEM_0.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_IMEM_0.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_IMEM_0.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_IMEM_0.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSIO.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSIO.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSIO.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSIO.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSTABLE.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSTABLE.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSTABLE.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_arbiter_SYSTABLE.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_default_slave.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_default_slave.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_default_slave.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_default_slave.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_inititator_input.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_inititator_input.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_inititator_input.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_inititator_input.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_CPU_0.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_CPU_0.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_CPU_0.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_CPU_0.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DEBUG.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DEBUG.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DEBUG.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DEBUG.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_0.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_0.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_0.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_0.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_1.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_1.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_1.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_matrix_decode_DMAC_1.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_BOOTROM_0.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_BOOTROM_0.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_BOOTROM_0.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_BOOTROM_0.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_DMEM_0.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_DMEM_0.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_DMEM_0.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_DMEM_0.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXP.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXP.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXP.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXP.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_H.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_H.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_H.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_H.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_L.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_L.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_L.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_EXPRAM_L.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_IMEM_0.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_IMEM_0.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_IMEM_0.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_IMEM_0.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSIO.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSIO.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSIO.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSIO.v
diff --git a/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSTABLE.v b/nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSTABLE.v
similarity index 100%
rename from system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSTABLE.v
rename to nanosoc/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_target_output_SYSTABLE.v
diff --git a/system/nanosoc_busmatrix/xml/nanosoc.xml b/nanosoc/nanosoc_busmatrix/xml/nanosoc.xml
similarity index 100%
rename from system/nanosoc_busmatrix/xml/nanosoc.xml
rename to nanosoc/nanosoc_busmatrix/xml/nanosoc.xml
diff --git a/system/nanosoc_chip/chip/verilog/nanosoc_chip.v b/nanosoc/nanosoc_chip/chip/verilog/nanosoc_chip.v
similarity index 100%
rename from system/nanosoc_chip/chip/verilog/nanosoc_chip.v
rename to nanosoc/nanosoc_chip/chip/verilog/nanosoc_chip.v
diff --git a/system/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v b/nanosoc/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v
similarity index 100%
rename from system/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v
rename to nanosoc/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v
diff --git a/system/nanosoc_control/verilog/nanosoc_clkctrl.v b/nanosoc/nanosoc_control/verilog/nanosoc_clkctrl.v
similarity index 100%
rename from system/nanosoc_control/verilog/nanosoc_clkctrl.v
rename to nanosoc/nanosoc_control/verilog/nanosoc_clkctrl.v
diff --git a/system/nanosoc_control/verilog/nanosoc_pin_mux.v b/nanosoc/nanosoc_control/verilog/nanosoc_pin_mux.v
similarity index 100%
rename from system/nanosoc_control/verilog/nanosoc_pin_mux.v
rename to nanosoc/nanosoc_control/verilog/nanosoc_pin_mux.v
diff --git a/system/nanosoc_regions/bootrom_0/verilog/nanosoc_bootrom_cpu_0.v b/nanosoc/nanosoc_regions/bootrom_0/verilog/nanosoc_bootrom_cpu_0.v
similarity index 100%
rename from system/nanosoc_regions/bootrom_0/verilog/nanosoc_bootrom_cpu_0.v
rename to nanosoc/nanosoc_regions/bootrom_0/verilog/nanosoc_bootrom_cpu_0.v
diff --git a/system/nanosoc_regions/bootrom_0/verilog/nanosoc_region_bootrom_0.v b/nanosoc/nanosoc_regions/bootrom_0/verilog/nanosoc_region_bootrom_0.v
similarity index 100%
rename from system/nanosoc_regions/bootrom_0/verilog/nanosoc_region_bootrom_0.v
rename to nanosoc/nanosoc_regions/bootrom_0/verilog/nanosoc_region_bootrom_0.v
diff --git a/system/nanosoc_regions/dmem_0/verilog/nanosoc_region_dmem_0.v b/nanosoc/nanosoc_regions/dmem_0/verilog/nanosoc_region_dmem_0.v
similarity index 100%
rename from system/nanosoc_regions/dmem_0/verilog/nanosoc_region_dmem_0.v
rename to nanosoc/nanosoc_regions/dmem_0/verilog/nanosoc_region_dmem_0.v
diff --git a/system/nanosoc_regions/exp/verilog/nanosoc_region_exp.v b/nanosoc/nanosoc_regions/exp/verilog/nanosoc_region_exp.v
similarity index 100%
rename from system/nanosoc_regions/exp/verilog/nanosoc_region_exp.v
rename to nanosoc/nanosoc_regions/exp/verilog/nanosoc_region_exp.v
diff --git a/system/nanosoc_regions/expram_h/verilog/nanosoc_region_expram_h.v b/nanosoc/nanosoc_regions/expram_h/verilog/nanosoc_region_expram_h.v
similarity index 100%
rename from system/nanosoc_regions/expram_h/verilog/nanosoc_region_expram_h.v
rename to nanosoc/nanosoc_regions/expram_h/verilog/nanosoc_region_expram_h.v
diff --git a/system/nanosoc_regions/expram_l/verilog/nanosoc_region_expram_l.v b/nanosoc/nanosoc_regions/expram_l/verilog/nanosoc_region_expram_l.v
similarity index 100%
rename from system/nanosoc_regions/expram_l/verilog/nanosoc_region_expram_l.v
rename to nanosoc/nanosoc_regions/expram_l/verilog/nanosoc_region_expram_l.v
diff --git a/system/nanosoc_regions/imem_0/ram/verilog/nanosoc_region_imem_0.v b/nanosoc/nanosoc_regions/imem_0/ram/verilog/nanosoc_region_imem_0.v
similarity index 100%
rename from system/nanosoc_regions/imem_0/ram/verilog/nanosoc_region_imem_0.v
rename to nanosoc/nanosoc_regions/imem_0/ram/verilog/nanosoc_region_imem_0.v
diff --git a/system/nanosoc_regions/imem_0/rom/verilog/nanosoc_region_imem_0.v b/nanosoc/nanosoc_regions/imem_0/rom/verilog/nanosoc_region_imem_0.v
similarity index 100%
rename from system/nanosoc_regions/imem_0/rom/verilog/nanosoc_region_imem_0.v
rename to nanosoc/nanosoc_regions/imem_0/rom/verilog/nanosoc_region_imem_0.v
diff --git a/system/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v b/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v
similarity index 100%
rename from system/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v
rename to nanosoc/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v
diff --git a/system/nanosoc_regions/sysio/verilog/nanosoc_sysctrl.v b/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysctrl.v
similarity index 100%
rename from system/nanosoc_regions/sysio/verilog/nanosoc_sysctrl.v
rename to nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysctrl.v
diff --git a/system/nanosoc_regions/sysio/verilog/nanosoc_sysio_apb_ss.v b/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_apb_ss.v
similarity index 100%
rename from system/nanosoc_regions/sysio/verilog/nanosoc_sysio_apb_ss.v
rename to nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_apb_ss.v
diff --git a/system/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v b/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v
similarity index 100%
rename from system/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v
rename to nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v
diff --git a/system/nanosoc_regions/systable/verilog/nanosoc_coresight_systable.v b/nanosoc/nanosoc_regions/systable/verilog/nanosoc_coresight_systable.v
similarity index 100%
rename from system/nanosoc_regions/systable/verilog/nanosoc_coresight_systable.v
rename to nanosoc/nanosoc_regions/systable/verilog/nanosoc_coresight_systable.v
diff --git a/system/nanosoc_regions/systable/verilog/nanosoc_region_systable.v b/nanosoc/nanosoc_regions/systable/verilog/nanosoc_region_systable.v
similarity index 100%
rename from system/nanosoc_regions/systable/verilog/nanosoc_region_systable.v
rename to nanosoc/nanosoc_regions/systable/verilog/nanosoc_region_systable.v
diff --git a/system/nanosoc_subsystems/cpu/verilog/nanosoc_ss_cpu.v b/nanosoc/nanosoc_subsystems/cpu/verilog/nanosoc_ss_cpu.v
similarity index 100%
rename from system/nanosoc_subsystems/cpu/verilog/nanosoc_ss_cpu.v
rename to nanosoc/nanosoc_subsystems/cpu/verilog/nanosoc_ss_cpu.v
diff --git a/system/nanosoc_subsystems/debug/verilog/nanosoc_ss_debug.v b/nanosoc/nanosoc_subsystems/debug/verilog/nanosoc_ss_debug.v
similarity index 100%
rename from system/nanosoc_subsystems/debug/verilog/nanosoc_ss_debug.v
rename to nanosoc/nanosoc_subsystems/debug/verilog/nanosoc_ss_debug.v
diff --git a/system/nanosoc_subsystems/dma/dma230/verilog/nanosoc_ss_dma.v b/nanosoc/nanosoc_subsystems/dma/dma230/verilog/nanosoc_ss_dma.v
similarity index 100%
rename from system/nanosoc_subsystems/dma/dma230/verilog/nanosoc_ss_dma.v
rename to nanosoc/nanosoc_subsystems/dma/dma230/verilog/nanosoc_ss_dma.v
diff --git a/system/nanosoc_subsystems/dma/no_dmac/verilog/nanosoc_ss_dma.v b/nanosoc/nanosoc_subsystems/dma/no_dmac/verilog/nanosoc_ss_dma.v
similarity index 100%
rename from system/nanosoc_subsystems/dma/no_dmac/verilog/nanosoc_ss_dma.v
rename to nanosoc/nanosoc_subsystems/dma/no_dmac/verilog/nanosoc_ss_dma.v
diff --git a/system/nanosoc_subsystems/expansion/verilog/nanosoc_ss_expansion.v b/nanosoc/nanosoc_subsystems/expansion/verilog/nanosoc_ss_expansion.v
similarity index 100%
rename from system/nanosoc_subsystems/expansion/verilog/nanosoc_ss_expansion.v
rename to nanosoc/nanosoc_subsystems/expansion/verilog/nanosoc_ss_expansion.v
diff --git a/system/nanosoc_subsystems/interconnect/verilog/nanosoc_ss_interconnect.v b/nanosoc/nanosoc_subsystems/interconnect/verilog/nanosoc_ss_interconnect.v
similarity index 100%
rename from system/nanosoc_subsystems/interconnect/verilog/nanosoc_ss_interconnect.v
rename to nanosoc/nanosoc_subsystems/interconnect/verilog/nanosoc_ss_interconnect.v
diff --git a/system/nanosoc_subsystems/systemctrl/verilog/nanosoc_ss_systemctrl.v b/nanosoc/nanosoc_subsystems/systemctrl/verilog/nanosoc_ss_systemctrl.v
similarity index 100%
rename from system/nanosoc_subsystems/systemctrl/verilog/nanosoc_ss_systemctrl.v
rename to nanosoc/nanosoc_subsystems/systemctrl/verilog/nanosoc_ss_systemctrl.v
diff --git a/system/nanosoc_system/verilog/nanosoc_system.v b/nanosoc/nanosoc_system/verilog/nanosoc_system.v
similarity index 100%
rename from system/nanosoc_system/verilog/nanosoc_system.v
rename to nanosoc/nanosoc_system/verilog/nanosoc_system.v
diff --git a/system/slcorem0_tech b/system/slcorem0_tech
deleted file mode 160000
index b2ba5b3..0000000
--- a/system/slcorem0_tech
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit b2ba5b3f83e33c05c1107b3e1fa40f7f6af1e589
diff --git a/system/sldma230_tech b/system/sldma230_tech
deleted file mode 160000
index c11843b..0000000
--- a/system/sldma230_tech
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit c11843b9e75ce83b7118ef07cb3e1ecc2fe6c9c0
diff --git a/system/socdebug_tech b/system/socdebug_tech
deleted file mode 160000
index b274190..0000000
--- a/system/socdebug_tech
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit b27419058c86e958dc345ff4fa0b2662a70bb88d
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