diff --git a/nanosoc/nanosoc_system/verilog/nanosoc_system.v b/nanosoc/nanosoc_system/verilog/nanosoc_system.v index 4e4b3c1edca353754c7723f7d48e1765125a3daf..53b8a66fe106633166e24eb09d1ac51f00eb299f 100644 --- a/nanosoc/nanosoc_system/verilog/nanosoc_system.v +++ b/nanosoc/nanosoc_system/verilog/nanosoc_system.v @@ -696,7 +696,7 @@ module nanosoc_system #( //-------------------------- wire [7:0] FT_CLKDIV; - assign FT_CLKDIV = FT1248_CLKDIV; + // assign FT_CLKDIV = FT1248_CLKDIV; // now from socdebug_usrt_control assign CPU_0_RXEV = DMAC_ANY_DONE; @@ -776,7 +776,7 @@ module nanosoc_system #( .RX_VALID_i (STD_RXD_TVALID), .RX_DATA8_i (STD_RXD_TDATA ), .RX_READY_o (STD_RXD_TREADY), - + .INVBAUDDIV8_o (FT_CLKDIV), // Interrupt Interfaces .TXINT ( ), // Transmit Interrupt .RXINT ( ), // Receive Interrupt diff --git a/nanosoc/socdebug_tech b/nanosoc/socdebug_tech index 9ef8d848da72e57f806b24eed5c2f6bbdce66668..247a0afe2a4317369af893a5b5454487c20ab90e 160000 --- a/nanosoc/socdebug_tech +++ b/nanosoc/socdebug_tech @@ -1 +1 @@ -Subproject commit 9ef8d848da72e57f806b24eed5c2f6bbdce66668 +Subproject commit 247a0afe2a4317369af893a5b5454487c20ab90e diff --git a/software/common/bootloader/bootloader.c b/software/common/bootloader/bootloader.c index 9a9996a9c24a2f7ce2ef7bd437041a47233e0f54..2f7f9b5690f5884704676ecd5618a672014d4242 100644 --- a/software/common/bootloader/bootloader.c +++ b/software/common/bootloader/bootloader.c @@ -76,6 +76,7 @@ void UartStdOutInit(void) } CMSDK_USRT2->CTRL = 0x00; //re-init CMSDK_USRT2->CTRL = UART_CTRL_TXRXEN; //RX+TX, FT1248/EXTIO USRT + CMSDK_USRT2->BAUDDIV = 0xf0; // inv(15) mod 256 if ((CMSDK_USRT2->STATE & 1)==0) CMSDK_USRT2->DATA = 0x23; // write 8'b01000011 / "#" return; } @@ -151,35 +152,12 @@ int main (void) { // STDOUT init UartStdOutInit(); - UartPuts("\nSoCLabs NanoSoC'24 ARM-CM0+ADP+"); + UartPuts("\nSoCLabs NanoSoC'25 ARM-CM0+ADP+"); if (CMSDK_GPIO1->DATA & 0x80) // high if FT1248, low if EXTIO UartPuts("FT1+U38400"); else UartPuts("EXTIO8x4CD"); UartPuts(" 20241212\n"); -/* - NVIC_EnableIRQ(UARTRX1_IRQn); - NVIC_EnableIRQ(UARTTX1_IRQn); - CMSDK_UART1->CTRL = UART_CTRL_RXIRQEN; // Enable RX interrupt -*/ FlashLoader(); return 0; } - -/* -void UARTRX1_Handler(void) -{ - uart1_char = CMSDK_UART1->DATA; // read and store the byte received - CMSDK_UART1->INTCLEAR = CMSDK_UART_CTRL_RXIRQ_Msk; // Clear RX interrupt req - CMSDK_UART1->CTRL = UART_CTRL_TXIRQEN; // Enable TX interrupt - return; -} - -void UARTTX1_Handler(void) -{ - CMSDK_UART1->DATA = uart1_char; // write the byte to transmit - CMSDK_UART1->INTCLEAR = CMSDK_UART_CTRL_TXIRQ_Msk; // Clear TX interrupt req - CMSDK_UART1->CTRL = UART_CTRL_RXIRQEN; // Re-Enable RX interrupt - return; -} -*/ diff --git a/software/common/retarget/uart_stdout.c b/software/common/retarget/uart_stdout.c index c7145f8e929887069ba30589a15c6db235febc74..bc038f32d7837fd962580224bf19688ebbf3d15a 100644 --- a/software/common/retarget/uart_stdout.c +++ b/software/common/retarget/uart_stdout.c @@ -53,7 +53,7 @@ void UartStdOutInit(void) CMSDK_UART2->CTRL = 0x00; // disable whie reprogramming CMSDK_UART2->BAUDDIV = BAUDCLKDIV; // (240MHz/BAUDRATE) in 16.4 format CMSDK_UART2->CTRL = 0x01; // TX, standard UART2 - CMSDK_USRT2->BAUDDIV = 3; // (prescaler value) + CMSDK_USRT2->BAUDDIV = 0xf0; // (prescaler value = ~((div+1)[7:0)) CMSDK_USRT2->CTRL = 0x03; // RX+TX, FT1248 USRT CMSDK_GPIO1->ALTFUNCSET = (1<<5); // UART2 mapped to GP1[5,4] return; @@ -73,7 +73,7 @@ void Uart2StdOutInit(void) /// CMSDK_UART2->CTRL = 0x01; // RX+TX, standard UART2 CMSDK_GPIO1->ALTFUNCSET = (1<<5); // UART2 mapped to GP1[5,4] CMSDK_USRT2->CTRL = 0x00; // RX+TX, FT1248 USRT disabled - CMSDK_USRT2->BAUDDIV = 0x30; // (prescaler low value) + CMSDK_USRT2->BAUDDIV = 0xf0; // (prescaler value = ~((div+1)[7:0)) CMSDK_USRT2->CTRL = 0x03; // RX+TX, FT1248 USRT disabled return; }