diff --git a/makefile b/makefile index ff888a7f9a0678469d5c190b41edfbbcb5a89b6a..5033f6b0f6490943a1b2b12ecee10c35f7c0d8e2 100644 --- a/makefile +++ b/makefile @@ -85,13 +85,13 @@ BOOTROM_BUILD_DIR ?= $(SOCLABS_PROJECT_DIR)/system/src/bootrom QUICKSTART ?= no -NANOSOC_EXPANSION_REGION ?= yes +ACCELERATOR ?= no # Simulator Defines DEFINES_VC += $(MEM_INIT) +define+CORTEX_M0 +define+USE_TARMAC -ifeq ($(NANOSOC_EXPANSION_REGION),yes) - DEFINES_VC += +define+NANOSOC_EXPANSION_REGION +ifeq ($(ACCELERATOR),yes) + DEFINES_VC += +define+ACCELERATOR_SUBSYSTEM endif # System Design Filelist diff --git a/software/common/bootloader/bootloader.c b/software/common/bootloader/bootloader.c index 233c44bfa1976c3117a3559df0e3d57253953089..fed5b51d7aad273e80b688cc12fb33391c2b0644 100644 --- a/software/common/bootloader/bootloader.c +++ b/software/common/bootloader/bootloader.c @@ -135,7 +135,7 @@ int main (void) // UART init UartStdOutInit(); - UartPuts("\n\n\nSOCLABS: ARM Cortex-M0 nanosoc\n"); + UartPuts("\n\n\nSoCLabs NanoSoC\n"); FlashLoader(); return 0; } diff --git a/system/nanosoc_regions/imem_0/verilog/nanosoc_region_imem_0.v b/system/nanosoc_regions/imem_0/verilog/nanosoc_region_imem_0.v index 672a0f134488ee7cce7911a17f6c2bca18256aef..fced8f0f4f88d0550551f4917bce6576633a58cf 100644 --- a/system/nanosoc_regions/imem_0/verilog/nanosoc_region_imem_0.v +++ b/system/nanosoc_regions/imem_0/verilog/nanosoc_region_imem_0.v @@ -37,7 +37,8 @@ module nanosoc_region_imem_0 #( ); // SRAM Instantiation - sl_ahb_sram #( + // sl_ahb_sram #( + sl_ahb_rom #( .SYS_DATA_W (SYS_DATA_W), .RAM_ADDR_W (IMEM_RAM_ADDR_W), .RAM_DATA_W (IMEM_RAM_DATA_W), diff --git a/xmprep.history b/xmprep.history deleted file mode 100644 index d874832f4dc25350ecce97a6866465e20908eb2b..0000000000000000000000000000000000000000 --- a/xmprep.history +++ /dev/null @@ -1 +0,0 @@ -s1(22Jun2023:09:30:49): xmprep +overwrite -f /home/dam1n19/accelerator-project/flist/project/system.flist -define ADP_FILE="/home/dam1n19/accelerator-project/nanosoc_tech/testcodes/adp_demo/adp.cmd" +define+CORTEX_M0 +define+USE_TARMAC +define+NANOSOC_EXPANSION_REGION +debug -timescale 1ps/1ps -top nanosoc_tb