From 9209e0a964a7d26613b91651d429e8d4f072cac5 Mon Sep 17 00:00:00 2001
From: dwf1m12 <d.w.flynn@soton.ac.uk>
Date: Thu, 7 Nov 2024 14:37:41 +0000
Subject: [PATCH] update vivado pinmap pullups across zynq platforms
---
fpga/targets/pynq_kr260/fpga_pinmap.xdc | 2 --
fpga/targets/pynq_kv260/fpga_pinmap.xdc | 2 --
fpga/targets/pynq_z2/fpga_pinmap.xdc | 6 ++++--
fpga/targets/pynq_zcu104/fpga_pinmap.xdc | 6 ++++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/fpga/targets/pynq_kr260/fpga_pinmap.xdc b/fpga/targets/pynq_kr260/fpga_pinmap.xdc
index 991f7e4..8592e08 100644
--- a/fpga/targets/pynq_kr260/fpga_pinmap.xdc
+++ b/fpga/targets/pynq_kr260/fpga_pinmap.xdc
@@ -38,8 +38,6 @@ set_property PACKAGE_PIN B11 [get_ports {PMOD0_7}]
set_property IOSTANDARD LVCMOS33 [get_ports {PMOD0_7}]
set_property PULLUP true [get_ports {PMOD0_7}];
-#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets PMOD0_7_IBUF_inst/O]
-
## ######################## PMOD 2 Upper ########################
## set_property PACKAGE_PIN J11 [get_ports {PMOD1_0}]
## set_property IOSTANDARD LVCMOS33 [get_ports {PMOD1_0}]
diff --git a/fpga/targets/pynq_kv260/fpga_pinmap.xdc b/fpga/targets/pynq_kv260/fpga_pinmap.xdc
index 6ed980e..840a500 100644
--- a/fpga/targets/pynq_kv260/fpga_pinmap.xdc
+++ b/fpga/targets/pynq_kv260/fpga_pinmap.xdc
@@ -39,8 +39,6 @@ set_property PACKAGE_PIN B11 [get_ports {PMOD0_7}]
set_property IOSTANDARD LVCMOS33 [get_ports {PMOD0_7}]
set_property PULLUP true [get_ports {PMOD0_7}];
-#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets PMOD0_7_IBUF_inst/O]
-
######################## KV260 camera ########################
# PCAM MIPI ISP
diff --git a/fpga/targets/pynq_z2/fpga_pinmap.xdc b/fpga/targets/pynq_z2/fpga_pinmap.xdc
index 5599cd2..1dc9791 100644
--- a/fpga/targets/pynq_z2/fpga_pinmap.xdc
+++ b/fpga/targets/pynq_z2/fpga_pinmap.xdc
@@ -23,11 +23,13 @@ set_property PACKAGE_PIN U19 [get_ports PMOD0_5]
set_property PACKAGE_PIN W18 [get_ports PMOD0_6]
set_property PACKAGE_PIN W19 [get_ports PMOD0_7]
+set_property PULLDOWN true [get_ports PMOD0_0]
+set_property PULLDOWN true [get_ports PMOD0_1]
set_property PULLUP true [get_ports PMOD0_2]
-set_property PULLDOWN true [get_ports PMOD0_3]
+set_property PULLUP true [get_ports PMOD0_3]
set_property PULLUP true [get_ports PMOD0_4]
set_property PULLUP true [get_ports PMOD0_5]
set_property PULLUP true [get_ports PMOD0_6]
set_property PULLUP true [get_ports PMOD0_7]
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets PMOD0_7_IBUF]
+##set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets PMOD0_7_IBUF]
diff --git a/fpga/targets/pynq_zcu104/fpga_pinmap.xdc b/fpga/targets/pynq_zcu104/fpga_pinmap.xdc
index 4a635dd..e2d7497 100644
--- a/fpga/targets/pynq_zcu104/fpga_pinmap.xdc
+++ b/fpga/targets/pynq_zcu104/fpga_pinmap.xdc
@@ -923,14 +923,16 @@ set_property PACKAGE_PIN G6 [get_ports PMOD0_4]
set_property PACKAGE_PIN H6 [get_ports PMOD0_5]
set_property PACKAGE_PIN J6 [get_ports PMOD0_6]
set_property PACKAGE_PIN J7 [get_ports PMOD0_7]
+set_property PULLDOWN true [get_ports PMOD0_0]
+set_property PULLDOWN true [get_ports PMOD0_1]
set_property PULLUP true [get_ports PMOD0_2]
-set_property PULLDOWN true [get_ports PMOD0_3]
+set_property PULLUP true [get_ports PMOD0_3]
set_property PULLUP true [get_ports PMOD0_4]
set_property PULLUP true [get_ports PMOD0_5]
set_property PULLUP true [get_ports PMOD0_6]
set_property PULLUP true [get_ports PMOD0_7]
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets PMOD0_7_IBUF_inst/O]
+##set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets PMOD0_7_IBUF_inst/O]
#set_property IOSTANDARD LVCMOS33 [get_ports PMOD1_0]
#set_property IOSTANDARD LVCMOS33 [get_ports PMOD1_1]
--
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