diff --git a/lint/nanosoc_ip.waive b/lint/nanosoc_ip.waive new file mode 100644 index 0000000000000000000000000000000000000000..04de6670bc8645a90b6aa4c60a545b10e5508ba6 --- /dev/null +++ b/lint/nanosoc_ip.waive @@ -0,0 +1,5 @@ +lint_checking designunit = nanosoc_chip +{ + // Combinatorial Wiring of outputs in top level of hierarchy + CBPAHI off; +} \ No newline at end of file diff --git a/makefile b/makefile index ec3a8f11263c3e1f690d260f5f498593502e5759..15facc4495f45d2ce5e4574e99a3336ae337106b 100644 --- a/makefile +++ b/makefile @@ -90,8 +90,11 @@ ifeq ($(NANOSOC_EXPANSION_REGION),yes) DEFINES_VC += +define+NANOSOC_EXPANSION_REGION endif -# Simulator Command file to specify RTL source files -TBENCH_VC ?= $(SOCLABS_PROJECT_DIR)/flist/project/system.flist +# System Design Filelist +DESIGN_VC ?= $(SOCLABS_PROJECT_DIR)/flist/project/system.flist + +# Testbench Filelist +TBENCH_VC ?= $(SOCLABS_PROJECT_DIR)/flist/project/system_tb.flist # Simulator type (mti/vcs/xm) @@ -104,6 +107,8 @@ SIM_DIR = $(SIM_TOP_DIR)/$(TESTNAME) LINT_DIR = $(SOCLABS_PROJECT_DIR)/lint/nanosoc LINT_INFO_DIR = $(SOCLABS_NANOSOC_TECH_DIR)/lint +LINT_INFO_SLCOREM0_DIR = $(SOCLABS_SLCOREM0_TECH_DIR)/lint +LINT_INFO_SLDMA230_DIR = $(SOCLABS_SLDMA230_TECH_DIR)/lint # MTI option #DF#MTI_OPTIONS = -novopt @@ -119,6 +124,8 @@ VCS_VC_OPTIONS = -f $(TBENCH_VC) $(ACCELERATOR_VC) $(ADP_OPTIONS) XMSIM_OPTIONS = -unbuffered -status -LICQUEUE -f xmsim.args -cdslib cds.lib -hdlvar hdl.var -NBASYNC XM_VC_OPTIONS = -f $(TBENCH_VC) $(ACCELERATOR_VC) $(ADP_OPTIONS) +HAL_BLACK_BOX = -design_info $(LINT_INFO_DIR)/nanosoc_ip.bb -design_info $(LINT_INFO_DIR)/corstone101_ip.bb -design_info $(LINT_INFO_SLCOREM0_DIR)/cortexm0_ip.bb -design_info $(LINT_INFO_SLDMA230_DIR)/pl230_ip.bb +HAL_WAIVE = -design_info $(LINT_INFO_DIR)/nanosoc_ip.waive # Debug Tester image DEBUGTESTER = debugtester @@ -192,7 +199,7 @@ compile_xm : bootrom lint_xm: compile_xm @rm -rf $(LINT_DIR) @mkdir -p $(LINT_DIR) - cd $(LINT_DIR); hal $(XM_VC_OPTIONS) $(DEFINES_VC) +debug -XMVERILOGARGS "-timescale 1ps/1ps" -top nanosoc_chip -design_info $(LINT_INFO_DIR)/nanosoc_ip.bb -design_info $(LINT_INFO_DIR)/corstone101_ip.bb + cd $(LINT_DIR); hal -f $(DESIGN_VC) $(DEFINES_VC) +debug -XMVERILOGARGS "-timescale 1ps/1ps" -top nanosoc_chip $(HAL_BLACK_BOX) $(HAL_WAIVE) # Note : If coverage is required, you can add -coverage all to xmelab diff --git a/system/nanosoc_chip/chip/verilog/nanosoc_chip.v b/system/nanosoc_chip/chip/verilog/nanosoc_chip.v index 9025f88085a0321b688f38db8e8a3b32c578477c..cfcbe683b06157cc18034f0e2f1314a30d0d213e 100644 --- a/system/nanosoc_chip/chip/verilog/nanosoc_chip.v +++ b/system/nanosoc_chip/chip/verilog/nanosoc_chip.v @@ -86,7 +86,6 @@ module nanosoc_chip #( assign SYS_SCANENABLE = 1'b0; assign SYS_TESTMODE = 1'b0; assign INC_SCANINHCLK = 1'b0; - assign INC_SCANOUTHCLK = 1'b0; //-------------------------- // Clock Wiring @@ -187,7 +186,7 @@ module nanosoc_chip #( .P0_OUT(P0_OUT), .P0_OUTEN(P0_OUTEN), .P0_ALTFUNC(P0_ALTFUNC), - .P1_IN(P1_IN), + .P1_IN(P1_IN_MUX), .P1_OUT(P1_OUT), .P1_OUTEN(P1_OUTEN), .P1_ALTFUNC(P1_ALTFUNC), diff --git a/system/slcorem0_tech b/system/slcorem0_tech index d739e768c05b22987c06f3f86495890307fe480e..40a7506cd234ef65f3f7094d2e4ae9f349f5f969 160000 --- a/system/slcorem0_tech +++ b/system/slcorem0_tech @@ -1 +1 @@ -Subproject commit d739e768c05b22987c06f3f86495890307fe480e +Subproject commit 40a7506cd234ef65f3f7094d2e4ae9f349f5f969 diff --git a/system/sldma230_tech b/system/sldma230_tech index 7df15848c5c99720fa1853706ef76b1caef29ab0..c4c185f9243219e2b1a0118916f2351db6104311 160000 --- a/system/sldma230_tech +++ b/system/sldma230_tech @@ -1 +1 @@ -Subproject commit 7df15848c5c99720fa1853706ef76b1caef29ab0 +Subproject commit c4c185f9243219e2b1a0118916f2351db6104311 diff --git a/verif/verilog/nanosoc_tb.v b/verif/verilog/nanosoc_tb.v index a802b3ea629617a6c8057c474a514e901fa63532..80022c0770e1ae7745a2bd27e9a281836759e161 100644 --- a/verif/verilog/nanosoc_tb.v +++ b/verif/verilog/nanosoc_tb.v @@ -82,11 +82,11 @@ module nanosoc_tb; localparam BE=0; `define ARM_CMSDK_INCLUDE_DEBUG_TESTER 1 -// `ifdef ADP_FILE - // localparam ADP_FILENAME=`ADP_FILE; -// `else +`ifdef ADP_FILE + localparam ADP_FILENAME=`ADP_FILE; +`else localparam ADP_FILENAME="adp.cmd"; -// `endif +`endif SROM_Ax32