diff --git a/nanosoc/nanosoc_subsystems/dma/verilog/nanosoc_ss_dma.v b/nanosoc/nanosoc_subsystems/dma/verilog/nanosoc_ss_dma.v
index 4b7aa7f405e34ef2d6e3cb964d903a742174e5f9..877d5dc4f44df47bbcd17781f6981cb08a3e49b6 100644
--- a/nanosoc/nanosoc_subsystems/dma/verilog/nanosoc_ss_dma.v
+++ b/nanosoc/nanosoc_subsystems/dma/verilog/nanosoc_ss_dma.v
@@ -149,7 +149,7 @@ module nanosoc_ss_dma #(
.SYS_ADDR_W (SYS_ADDR_W),
.SYS_DATA_W (SYS_DATA_W),
.CFG_ADDR_W (13),
- .CHANNEL_NUM (DMAC_1_CHANNEL_NUM)
+ .CHANNEL_NUM (DMAC_0_CHANNEL_NUM)
) u_dmac (
// AHB Clocks and Resets
.HCLK(SYS_HCLK),
diff --git a/software/drivers/dma_350_command_lib.c b/software/drivers/dma_350_command_lib.c
index ca57328a2d854ba01ab98ebb20a14c08be363de9..e1f47de4a2b50a3d73260963f79da1f1049aa56d 100755
--- a/software/drivers/dma_350_command_lib.c
+++ b/software/drivers/dma_350_command_lib.c
@@ -22,9 +22,9 @@
#include "dma_350_command_lib.h"
// Channel pointers
-DMACH_TypeDef *sec_dma_channels[2] = { DMACH0_S, DMACH1_S};
+DMACH_TypeDef *sec_dma_channels[3] = { DMACH0_S, DMACH1_S, DMACH2_S};
-DMACH_TypeDef *nsec_dma_channels[2] = { DMACH0_NS, DMACH1_NS};
+DMACH_TypeDef *nsec_dma_channels[3] = { DMACH0_NS, DMACH1_NS, DMACH2_NS};
//
// Get DMA channel register frame based on security and channel number
diff --git a/software/drivers/dma_350_command_lib.h b/software/drivers/dma_350_command_lib.h
index 7ba0b7add9d507680a9e12551792b21a36632398..3faf649021442b32f9c1c309164b082412b8c941 100755
--- a/software/drivers/dma_350_command_lib.h
+++ b/software/drivers/dma_350_command_lib.h
@@ -342,8 +342,8 @@
// External variables
// Channel pointers
-extern DMACH_TypeDef *sec_dma_channels[2];
-extern DMACH_TypeDef *nsec_dma_channels[2];
+extern DMACH_TypeDef *sec_dma_channels[3];
+extern DMACH_TypeDef *nsec_dma_channels[3];
//Functions
DMACH_TypeDef* GetChannelPtr(uint32_t ch_num, uint8_t security);
diff --git a/software/drivers/dma_350_regdef.h b/software/drivers/dma_350_regdef.h
index 4124a19a622fd2e22bc0134ff10b89f179ebc2cc..35c1ad41872ca8f852ebac8a136a8536f42f162b 100755
--- a/software/drivers/dma_350_regdef.h
+++ b/software/drivers/dma_350_regdef.h
@@ -164,7 +164,7 @@ typedef struct
#define DMAINFO_S_BASE (ADA_DMA_S_BASE + 0x0F00UL)
#define DMACH0_S_BASE (ADA_DMA_S_BASE + 0x1000UL)
#define DMACH1_S_BASE (ADA_DMA_S_BASE + 0x1100UL)
-// #define DMACH2_S_BASE (ADA_DMA_S_BASE + 0x1200UL)
+#define DMACH2_S_BASE (ADA_DMA_S_BASE + 0x1200UL)
// #define DMACH3_S_BASE (ADA_DMA_S_BASE + 0x1300UL)
// #define DMACH4_S_BASE (ADA_DMA_S_BASE + 0x1400UL)
// #define DMACH5_S_BASE (ADA_DMA_S_BASE + 0x1500UL)
@@ -181,7 +181,7 @@ typedef struct
#define DMAINFO_NS_BASE (ADA_DMA_NS_BASE + 0x0F00UL)
#define DMACH0_NS_BASE (ADA_DMA_NS_BASE + 0x1000UL)
#define DMACH1_NS_BASE (ADA_DMA_NS_BASE + 0x1100UL)
-// #define DMACH2_NS_BASE (ADA_DMA_NS_BASE + 0x1200UL)
+#define DMACH2_NS_BASE (ADA_DMA_NS_BASE + 0x1200UL)
// #define DMACH3_NS_BASE (ADA_DMA_NS_BASE + 0x1300UL)
// #define DMACH4_NS_BASE (ADA_DMA_NS_BASE + 0x1400UL)
// #define DMACH5_NS_BASE (ADA_DMA_NS_BASE + 0x1500UL)
@@ -197,7 +197,7 @@ typedef struct
#define DMAINFO_S ((DMAINFO_TypeDef *) DMAINFO_S_BASE)
#define DMACH0_S ((DMACH_TypeDef *) DMACH0_S_BASE)
#define DMACH1_S ((DMACH_TypeDef *) DMACH1_S_BASE)
-// #define DMACH2_S ((DMACH_TypeDef *) DMACH2_S_BASE)
+#define DMACH2_S ((DMACH_TypeDef *) DMACH2_S_BASE)
// #define DMACH3_S ((DMACH_TypeDef *) DMACH3_S_BASE)
// #define DMACH4_S ((DMACH_TypeDef *) DMACH4_S_BASE)
// #define DMACH5_S ((DMACH_TypeDef *) DMACH5_S_BASE)
@@ -210,7 +210,7 @@ typedef struct
#define DMAINFO_NS ((DMAINFO_TypeDef *) DMAINFO_NS_BASE)
#define DMACH0_NS ((DMACH_TypeDef *) DMACH0_NS_BASE)
#define DMACH1_NS ((DMACH_TypeDef *) DMACH1_NS_BASE)
-// #define DMACH2_NS ((DMACH_TypeDef *) DMACH2_NS_BASE)
+#define DMACH2_NS ((DMACH_TypeDef *) DMACH2_NS_BASE)
// #define DMACH3_NS ((DMACH_TypeDef *) DMACH3_NS_BASE)
// #define DMACH4_NS ((DMACH_TypeDef *) DMACH4_NS_BASE)
// #define DMACH5_NS ((DMACH_TypeDef *) DMACH5_NS_BASE)
diff --git a/testcodes/dma350_stream_tests/dma350_stream_tests.hex b/testcodes/dma350_stream_tests/dma350_stream_tests.hex
index 699138f8398aee9119f20192438c26bf4ba540f2..dfdb5d63322441eef18bdbd88bfdef91feec334e 100644
--- a/testcodes/dma350_stream_tests/dma350_stream_tests.hex
+++ b/testcodes/dma350_stream_tests/dma350_stream_tests.hex
@@ -1,4 +1,4 @@
-90
+98
04
00
30
@@ -2066,19 +2066,19 @@ C1
00
00
00
-90
+98
00
00
30
-90
+98
04
00
30
-90
+98
02
00
30
-90
+98
02
00
30
@@ -3254,7 +3254,7 @@ E0
20
31
00
-28
+2C
00
00
30
@@ -9678,7 +9678,7 @@ BD
48
70
47
-38
+40
00
00
30
@@ -10098,7 +10098,7 @@ D2
48
70
47
-30
+38
00
00
30
@@ -10710,7 +10710,7 @@ F0
00
00
30
-30
+38
00
00
00
@@ -10718,11 +10718,11 @@ F0
01
00
00
-20
+28
2A
00
00
-30
+38
00
00
30
@@ -10775,6 +10775,10 @@ D1
00
40
00
+D2
+00
+40
+00
D0
00
40
@@ -10782,3 +10786,7 @@ D0
D1
00
40
+00
+D2
+00
+40