From 3bd655adb22d228381f7f47127ae0f00e7fb6b1e Mon Sep 17 00:00:00 2001
From: Daniel Newbrook <dwn1c21@soton.ac.uk>
Date: Mon, 16 Dec 2024 11:22:38 +0000
Subject: [PATCH] Add memory preload for EXP rams in simulation
---
flows/makefile.software | 6 ++++
testcodes/dma350_tests/expram_h.hex | 48 +++++++++++++++++++++++++++++
testcodes/dma350_tests/expram_l.hex | 48 +++++++++++++++++++++++++++++
verif/tb/verilog/nanosoc_tb.v | 28 +++++++++++++++++
4 files changed, 130 insertions(+)
create mode 100644 testcodes/dma350_tests/expram_h.hex
create mode 100644 testcodes/dma350_tests/expram_l.hex
diff --git a/flows/makefile.software b/flows/makefile.software
index aa13a77..26f5517 100644
--- a/flows/makefile.software
+++ b/flows/makefile.software
@@ -88,6 +88,12 @@ endif
exit 1; \
fi ;\
fi ;\
+ if [ -e expram_l.hex ] ; then \
+ cp expram_l.hex $(SIM_DIR)/expram_l.hex ; \
+ fi ;\
+ if [ -e expram_h.hex ] ; then \
+ cp expram_h.hex $(SIM_DIR)/expram_h.hex ; \
+ fi ;\
cd $(SIM_DIR) ;\
elif [ -d "$(PROJ_SW_DIR)/$(TESTNAME)" ] ; then \
cd $(PROJ_SW_DIR)/$(TESTNAME) ;\
diff --git a/testcodes/dma350_tests/expram_h.hex b/testcodes/dma350_tests/expram_h.hex
new file mode 100644
index 0000000..9a204fa
--- /dev/null
+++ b/testcodes/dma350_tests/expram_h.hex
@@ -0,0 +1,48 @@
+00
+01
+02
+03
+04
+05
+06
+07
+08
+09
+0A
+0B
+0C
+0D
+0E
+0F
+10
+11
+12
+13
+14
+15
+16
+17
+18
+19
+1A
+1B
+1C
+1D
+1E
+1F
+20
+21
+22
+23
+24
+25
+26
+27
+28
+29
+2A
+2B
+2C
+2D
+2E
+2F
diff --git a/testcodes/dma350_tests/expram_l.hex b/testcodes/dma350_tests/expram_l.hex
new file mode 100644
index 0000000..9a204fa
--- /dev/null
+++ b/testcodes/dma350_tests/expram_l.hex
@@ -0,0 +1,48 @@
+00
+01
+02
+03
+04
+05
+06
+07
+08
+09
+0A
+0B
+0C
+0D
+0E
+0F
+10
+11
+12
+13
+14
+15
+16
+17
+18
+19
+1A
+1B
+1C
+1D
+1E
+1F
+20
+21
+22
+23
+24
+25
+26
+27
+28
+29
+2A
+2B
+2C
+2D
+2E
+2F
diff --git a/verif/tb/verilog/nanosoc_tb.v b/verif/tb/verilog/nanosoc_tb.v
index e4ff4e7..837dbef 100644
--- a/verif/tb/verilog/nanosoc_tb.v
+++ b/verif/tb/verilog/nanosoc_tb.v
@@ -927,6 +927,34 @@ nanosoc_ft1248x1_track
// Format for time reporting
initial $timeformat(-9, 0, " ns", 0);
+ // Preload EXP rams
+ localparam aw_expram_l = u_nanosoc_chip_pads.u_nanosoc_chip.u_system.EXPRAM_L_RAM_ADDR_W;
+ localparam aw_expram_h = u_nanosoc_chip_pads.u_nanosoc_chip.u_system.EXPRAM_H_RAM_ADDR_W;
+
+ localparam awt_expram_l = ((1<<(aw_expram_l-2))-1);
+ localparam awt_expram_h = ((1<<(aw_expram_h-2))-1);
+
+ reg [7:0] fileimage_l [((1<<aw_expram_l)-1):0];
+ reg [7:0] fileimage_h [((1<<aw_expram_h)-1):0];
+ integer i,j;
+
+ initial begin
+ $readmemh("expram_l.hex", fileimage_l);
+ for (i=0;i<awt_expram_l;i=i+1) begin
+ u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_l.u_expram_l.u_sram.BRAM0[i] = fileimage_l[ 4*i];
+ u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_l.u_expram_l.u_sram.BRAM1[i] = fileimage_l[(4*i)+1];
+ u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_l.u_expram_l.u_sram.BRAM2[i] = fileimage_l[(4*i)+2];
+ u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_l.u_expram_l.u_sram.BRAM3[i] = fileimage_l[(4*i)+3];
+ end
+ $readmemh("expram_h.hex", fileimage_h);
+ for (i=0;i<awt_expram_h;i=i+1) begin
+ u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_h.u_expram_h.u_sram.BRAM0[i] = fileimage_h[ 4*i];
+ u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_h.u_expram_h.u_sram.BRAM1[i] = fileimage_h[(4*i)+1];
+ u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_h.u_expram_h.u_sram.BRAM2[i] = fileimage_h[(4*i)+2];
+ u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_h.u_expram_h.u_sram.BRAM3[i] = fileimage_h[(4*i)+3];
+ end
+ end
+
// Configuration checks
initial begin
`ifdef CORTEX_M0DESIGNSTART
--
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