diff --git a/.gitignore b/.gitignore
index 0f3c9a3f59f6d6572641f5e0790f5328fdae6868..92ab1b99107ad961342be222b125ffc0ca44a13f 100644
--- a/.gitignore
+++ b/.gitignore
@@ -14,4 +14,5 @@
/Cortex-M0/nanosoc/systems/mcu/testcodes/*.o
!/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd
-!/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile
\ No newline at end of file
+!/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile
+!/Cortex-M0/nanosoc/systems/mcu/rtl_sim/*.py
\ No newline at end of file
diff --git a/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd b/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd
index e4c6f50263b2af5adbe779367c38044c6fb81541..d0b75b39580ddb49af40fd737ded8ca4e2a32c1e 100644
--- a/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd
+++ b/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd
@@ -1,484 +1,29 @@
A
-a 0x600107c0
-w 0x94748770
-a 0x600107c4
-w 0x0e3109cc
-a 0x600107c8
-w 0xc4411b41
-a 0x600107cc
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-w 0xbc3bdfc1
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-w 0xdeb5cb2a
-a 0x600107d8
-w 0xa0052ca2
-a 0x600107dc
-w 0x1761b000
-a 0x600107e0
-w 0x1b5affff
-a 0x600107e4
-w 0xeab53b7e
-a 0x600107e8
-w 0x81152f06
-a 0x600107ec
-w 0x7d60ab33
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-w 0x1ce3c906
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-a 0x600107f8
-w 0x923737f4
-a 0x600107fc
-w 0x695b2443
-a 0x60010fe0
-r 0xe06f1bef
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-r 0xf498916a
-a 0x60010fe8
-r 0x4686ebb1
-a 0x60010fec
-r 0x0dc803e5
-a 0x60010ff0
-r 0x960ea091
-a 0x60010ff4
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-r 0xe14c46de
-a 0x60010ffc
-r 0xe1711626
-a 0x600107c0
-w 0xf7079da3
-a 0x600107c4
-w 0xa0c46731
-a 0x600107c8
-w 0xc51f9e09
-a 0x600107cc
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-w 0xfd33039d
-a 0x600107d4
-w 0xe8675d4a
-a 0x600107d8
-w 0xc0e513a1
-a 0x600107dc
-w 0x858c0663
-a 0x600107e0
-w 0xa1fb693e
-a 0x600107e4
-w 0xd5ebd6d4
-a 0x600107e8
-w 0x26f7441f
-a 0x600107ec
-w 0x907554b5
-a 0x600107f0
-w 0x9db705fd
-a 0x600107f4
-w 0x47a57bf5
-a 0x600107f8
-w 0xfe2518c8
-a 0x600107fc
-w 0x4c5b82c1
-a 0x60010fe0
-r 0xd065f05e
-a 0x60010fe4
-r 0x1623b2c9
-a 0x60010fe8
-r 0x9d3c0a90
-a 0x60010fec
-r 0xce34de30
-a 0x60010ff0
-r 0x72fc05c5
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-a 0x60010ff8
-r 0xef598a6e
-a 0x60010ffc
-r 0x58d6d30f
-a 0x600107c0
-w 0x28b3253a
-a 0x600107c4
-w 0x96dbf9e5
-a 0x600107c8
-w 0x55e5ab02
-a 0x600107cc
-w 0x6bbbc74a
-a 0x600107d0
-w 0xed5fbca6
-a 0x600107d4
-w 0x73ece6c4
-a 0x600107d8
-w 0x832fa959
-a 0x600107dc
-w 0x7a0d31bf
-a 0x600107e0
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-a 0x600107e4
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-a 0x600107e8
-w 0x6bf549d9
-a 0x600107ec
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-a 0x600107f0
-w 0xdd09fb8d
-a 0x600107f4
-w 0x1285908a
-a 0x600107f8
-w 0x3eb37ea8
-a 0x600107fc
-w 0x68eb3a8c
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-r 0xe4e3afb2
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-a 0x60010ff8
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-a 0x600107f0
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-a 0x600107f4
-w 0xb08ab5bf
-a 0x600107f8
-w 0x332433a7
-a 0x600107fc
-w 0x17aced3b
-a 0x60010fe0
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-a 0x60010fe4
-r 0xc619f73f
-a 0x60010fe8
-r 0x5a54de49
-a 0x60010fec
-r 0x038b0529
-a 0x60010ff0
-r 0x92343513
-a 0x60010ff4
-r 0xea3cf2a9
-a 0x60010ff8
-r 0x5a1b530b
-a 0x60010ffc
-r 0x49393b4e
-a 0x600107c0
-w 0x2319760c
-a 0x600107c4
-w 0xc25e8486
-a 0x600107c8
-w 0xe2be9c44
-a 0x600107cc
-w 0x28e4aeaf
-a 0x600107d0
-w 0xae725608
-a 0x600107d4
-w 0xd394d5f8
-a 0x600107d8
-w 0xf6768cc7
-a 0x600107dc
-w 0x7f51d709
-a 0x600107e0
-w 0x4c99a726
-a 0x600107e4
-w 0x2586fbc4
-a 0x600107e8
-w 0xd2f30b37
-a 0x600107ec
-w 0x8c71f0c5
-a 0x600107f0
-w 0x4acf0b2d
-a 0x600107f4
-w 0xd0d8e335
-a 0x600107f8
-w 0x88af1d5f
-a 0x600107fc
-w 0xe69dad36
-a 0x60010fe0
-r 0x105755f3
-a 0x60010fe4
-r 0x1ca8459e
-a 0x60010fe8
-r 0x08ffade5
-a 0x60010fec
-r 0x29a2e390
-a 0x60010ff0
-r 0xc6905543
-a 0x60010ff4
-r 0x5ed0766b
-a 0x60010ff8
-r 0x9a63b562
-a 0x60010ffc
-r 0x95262422
-a 0x600107c0
-w 0x2a17c8e9
-a 0x600107c4
-w 0x63931b41
-a 0x600107c8
-w 0xd191bfc8
-a 0x600107cc
-w 0x40d7f3fc
-a 0x600107d0
-w 0x60754253
-a 0x600107d4
-w 0xd5f6ef4c
-a 0x600107d8
-w 0xa49ff89d
-a 0x600107dc
-w 0xb3f9bc39
-a 0x600107e0
-w 0x7ba3ec2e
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-a 0x600107e8
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-a 0x600107ec
-w 0x657744db
-a 0x600107f0
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-a 0x600107f8
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-a 0x60010fe0
-r 0x1f335cad
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-r 0x7d8c6b58
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-r 0xcb265158
-a 0x60010fec
-r 0xee44b230
-a 0x60010ff0
-r 0x88e5f660
-a 0x60010ff4
-r 0x96ee3bc5
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-r 0x96cf9939
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-r 0x38849fc2
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-w 0xac465530
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-w 0xc6f4b35f
-a 0x600107d0
-w 0xf82a46d6
-a 0x600107d4
-w 0x440244f5
-a 0x600107d8
-w 0x6bde0ef1
-a 0x600107dc
-w 0xb0787487
-a 0x600107e0
-w 0x1a96af96
-a 0x600107e4
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-a 0x600107f0
-w 0xb3733250
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-w 0x75028929
-a 0x600107f8
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-r 0x37b05a4b
-a 0x60010fe8
-r 0x02497784
-a 0x60010fec
-r 0xaed161d2
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-r 0x7f6590f6
-a 0x60010ff4
-r 0x479570fd
-a 0x60010ff8
-r 0xae0cb755
-a 0x60010ffc
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-a 0x600107e4
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-a 0x600107e8
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-a 0x600107f8
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-a 0x60010fe0
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-r 0x88674260
-a 0x60010fec
-r 0xa5ae48a8
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-r 0xa7112033
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-r 0xc555cde2
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-r 0x51c0db63
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-r 0x60f9e31b
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-w 0x2966f6a3
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-w 0xadd14662
-a 0x600107cc
-w 0x0bc2175e
-a 0x600107d0
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-w 0x335c30a8
-a 0x600107d8
-w 0x50e7e900
-a 0x600107dc
-w 0xb1b72206
-a 0x600107e0
-w 0xc6f526b0
-a 0x600107e4
-w 0x15a4177f
-a 0x600107e8
-w 0xf0d718a4
-a 0x600107ec
-w 0x48879677
-a 0x600107f0
-w 0x8934d6c4
-a 0x600107f4
-w 0x50ab7c39
-a 0x600107f8
-w 0x3360bbd7
-a 0x600107fc
-w 0xefdf5963
-a 0x60010fe0
-r 0x24eb65ee
-a 0x60010fe4
-r 0x309707c9
-a 0x60010fe8
-r 0xaf5d19d2
-a 0x60010fec
-r 0xd4e713d3
-a 0x60010ff0
-r 0x5d160f7a
-a 0x60010ff4
-r 0x400e3734
-a 0x60010ff8
-r 0xb6a8cf6c
-a 0x60010ffc
-r 0x3a012531
-a 0x600107c0
-w 0x2a22cd0b
-a 0x600107c4
-w 0xf570eb78
-a 0x600107c8
-w 0xd3a5b873
-a 0x600107cc
-w 0x53d7f89b
-a 0x600107d0
-w 0xebedc242
-a 0x600107d4
-w 0x59a1ee9a
-a 0x600107d8
-w 0xcea792f4
-a 0x600107dc
-w 0xedf99c9c
-a 0x600107e0
-w 0x47ab7368
-a 0x600107e4
-w 0xa0eddacc
-a 0x600107e8
-w 0xe218002f
-a 0x600107ec
-w 0x1498319a
-a 0x600107f0
-w 0xb1f10e58
-a 0x600107f4
-w 0x8d03ecb0
-a 0x600107f8
-w 0x4408ab12
-a 0x600107fc
-w 0xcabcc637
-a 0x60010fe0
-r 0x5951566a
-a 0x60010fe4
-r 0xb8a4b430
-a 0x60010fe8
-r 0x9fe9980d
-a 0x60010fec
-r 0x80069d04
-a 0x60010ff0
-r 0x093d866f
-a 0x60010ff4
-r 0x7af5e3f6
-a 0x60010ff8
-r 0xcc432473
-a 0x60010ffc
-r 0x090f1978
+A 0
+R
+R
+A
+A
+A
+a 10000000
+r
+r
+a 20000000
+r
+r
+a 30000000
+r
+r
+a 40006000
+r
+r
+r
+r
+a 30000200
+z 400
+A
+C 201
+
A
X
-!
\ No newline at end of file
+!
diff --git a/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp_verify.py b/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp_verify.py
new file mode 100644
index 0000000000000000000000000000000000000000..f2122bae70d9187cba8be3ad501657860cc2e868
--- /dev/null
+++ b/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp_verify.py
@@ -0,0 +1,95 @@
+#-----------------------------------------------------------------------------
+# ADP Command File Verification Script
+# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+#
+# Contributors
+#
+# David Mapstone (d.a.mapstone@soton.ac.uk)
+#
+# Copyright � 2021-3, SoC Labs (www.soclabs.org)
+#-----------------------------------------------------------------------------
+
+class address_region():
+ def __init__(self, base, size):
+ self.base = base
+ self.size = size
+ self.end = base + size - 4
+
+class read_word():
+ def __init__(self, index, region, address, read_data = 0,exp_data = 0):
+ self.index = index
+ self.region = region
+ self.address = int(str(address), 16)
+ self.read_data = int(str(read_data), 16)
+ self.exp_data = int(str(exp_data), 16)
+
+ def validate(self):
+ if (self.address >= self.region.base and self.address <= self.region.end):
+ return True
+ else:
+ return False
+
+ def check_address(self, address):
+ # print(f"self: {hex(self.address)} test: {address}")
+ if (self.address == int(str(address), 16)):
+ return True
+ else:
+ return False
+
+ def set_read_data(self, read_data):
+ self.read_data = int(read_data, 16)
+
+ def set_exp_data(self, exp_data):
+ self.exp_data = int(exp_data, 16)
+
+ def verify(self):
+ assert (self.read_data == self.exp_data)
+
+def adp_verify(adp_input, adp_output, out_log):
+ # Create Input Region for Accelerator
+ accel_input_port = address_region(base = 0x6001_0000, size = 0x0000_0800)
+ accel_output_port = address_region(base = 0x6001_0800, size = 0x0000_0800)
+
+ word_list = []
+ temp_address_buf = 0x0
+
+ # Read in adp input
+ adp_input_lines = open(adp_input, "r").readlines()
+ idx = 0
+ for line in adp_input_lines:
+ line_split = str(line).split()
+ if len(line_split) > 1:
+ if line_split[0].lower() == "a":
+ # Capture Address
+ temp_address_buf = line_split[1]
+ if line_split[0].lower() == "r":
+ temp_read_word = read_word(idx, accel_output_port, temp_address_buf, exp_data = line_split[1])
+ if temp_read_word.validate():
+ word_list.append(temp_read_word)
+ idx += 1
+
+ # Read in adp output
+ adp_output_lines = open(adp_output, "r").readlines()
+ idx = 0
+ temp_address_buf = 0x0
+ for line in adp_output_lines:
+ line_split = str(line).split()
+ if len(line_split) > 1:
+ if line_split[0] == "]A":
+ # Capture Address
+ temp_address_buf = line_split[1]
+ if line_split[0] == "]R":
+ if word_list[idx].check_address(temp_address_buf):
+ word_list[idx].set_read_data(line_split[1])
+ idx += 1
+
+ # Perform Verification
+ for word in word_list:
+ word.verify()
+ print(f"Tests Passed on {len(word_list)} reads")
+
+if __name__ == "__main__":
+ adp_input = "ft1248_ip.log"
+ adp_output = "ft1248_op.log"
+ output_log = "verify.log"
+ adp_verify(adp_input,adp_output,output_log)
diff --git a/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile b/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile
index 76c8669976ce896c9ff054d983c05042ab4f6595..4e56a3460ae50c458da4eb859a0c65bbd0499219 100644
--- a/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile
+++ b/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile
@@ -94,6 +94,11 @@ ifeq ($(ACCELERATOR_IP),SHA_2)
ACCELERATOR_VC += -f $(DESIGN)/accelerator-wrapper/flist/accelerator-wrapper_src.flist
endif
+#ADP command File
+ADP_FILE ?= $(DESIGN)/accelerator-wrapper/simulate/stimulus/adp_hash_stim.cmd
+ADP_PATH := $(shell realpath $(ADP_FILE))
+ADP_OPTIONS := -define ADP_FILE=\"$(ADP_PATH)\"
+
# Simulator type (mti/vcs/xm)
SIMULATOR = xm
@@ -108,15 +113,14 @@ VCS_SIM_OPTION = +vcs+lic+wait +vcs+flush+log -assert nopostproc
VCS_VC_OPTIONS = -f $(TBENCH_VC) $(ACCELERATOR_VC)
# XM verilog option
-XMSIM_OPTIONS = -unbuffered -status -LICQUEUE -f xmsim.args -cdslib cds.lib -hdlvar hdl.var -NBASYNC
-XM_VC_OPTIONS = -f $(TBENCH_VC) $(ACCELERATOR_VC)
+XMSIM_OPTIONS = -unbuffered -status -LICQUEUE -f xmsim.args -cdslib cds.lib -hdlvar hdl.var -NBASYNC
+XM_VC_OPTIONS = -f $(TBENCH_VC) $(ACCELERATOR_VC) $(ADP_OPTIONS)
# Boot Loader image
BOOTLOADER = bootloader
# Debug Tester image
DEBUGTESTER = debugtester
-
# Software make options
# - Pass onto the software makefile to define targetted CPU type
# You can append additional make options for testcode here
@@ -176,6 +180,8 @@ all_vcs : compile_vcs bootrom debugtester
# Compile RTL
compile_xm :
+ @echo ADP_FILE
+ @echo $(ADP_OPTIONS)
xmprep +overwrite $(XM_VC_OPTIONS) +debug | tee compile_xm.log
xmvlog -work worklib -f xmvlog.args | tee -a compile_xm.log
xmelab -mess -f xmelab.args -access +r | tee -a compile_xm.log
@@ -191,10 +197,12 @@ run_xm : code
@echo exit >> run.tcl.tmp
@mv run.tcl.tmp run.tcl
xmsim $(XMSIM_OPTIONS) -input run.tcl | tee logs/run_$(TESTNAME).log ;
+ @make verify
# Run simulation in interactive mode
sim_xm : code
xmsim -gui $(XMSIM_OPTIONS)
+ @make verify
# Compile RTL, and run all tests in batch mode
all_xm : compile_xm bootrom debugtester
@@ -215,6 +223,7 @@ all_xm : compile_xm bootrom debugtester
exit 1; \
fi ; \
done
+ @make verify
# ------- MTI -----------
@@ -416,6 +425,10 @@ clean_code:
@(cd ../testcodes/$(BOOTLOADER) ; make clean; cd ../../rtl_sim; )
@(cd ../testcodes/$(TESTNAME) ; make clean; cd ../../rtl_sim; )
+# ----- verification ------
+verify:
+ @python3 adp_verify.py
+
# ------- clean -----------
# Remove RTL compile files, log files, software compile files
diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/tb_nanosoc.v b/Cortex-M0/nanosoc/systems/mcu/verilog/tb_nanosoc.v
index b6fccfb686df6dfdea120587f3d6d3537247fa57..1539d842ef8ff5966dd6230eea19bbfe311a7522 100644
--- a/Cortex-M0/nanosoc/systems/mcu/verilog/tb_nanosoc.v
+++ b/Cortex-M0/nanosoc/systems/mcu/verilog/tb_nanosoc.v
@@ -6,7 +6,7 @@
//
// David Flynn (d.w.flynn@soton.ac.uk)
//
-// Copyright � 2021-3, SoC Labs (www.soclabs.org)
+// Copyright � 2021-3, SoC Labs (www.soclabs.org)
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
@@ -80,6 +80,12 @@ module tb_cmsdk_mcu;
localparam BE=0;
`define ARM_CMSDK_INCLUDE_DEBUG_TESTER 1
+`ifdef ADP_FILE
+ localparam ADP_FILENAME=`ADP_FILE;
+`else
+ localparam ADP_FILENAME="adp.cmd";
+`endif
+
SROM_Ax32
#(.ADDRWIDTH (8),
.filename ("bootloader.hex"),
@@ -252,7 +258,7 @@ wire ft_clk2uart;
wire ft_rxd2uart;
wire ft_txd2uart;
- cmsdk_ft1248x1_adpio // #(.ADPFILENAME("ADPFILENAME.log"))
+ cmsdk_ft1248x1_adpio #(.ADPFILENAME(ADP_FILENAME))
u_ft1248_adpio(
.ft_clk_i (ft_clk_out),
.ft_ssn_i (ft_ssn_out),