From 0cbcea435905f66525f1e5001830f0d3e95a7d66 Mon Sep 17 00:00:00 2001
From: dam1n19 <dam1n19@soton.ac.uk>
Date: Thu, 27 Apr 2023 11:28:25 +0100
Subject: [PATCH] SOC1-167: Restructured nanosoc repo by moving technology
libraries out of repo and moving design files closer to top of repository
---
.gitignore | 26 +-
Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd | 56 -
.../nanosoc/systems/mcu/rtl_sim/makefile | 585 --
.../mcu/testcodes/aes128_tests/aes128.h | 71 -
.../mcu/testcodes/aes128_tests/aes128_tests.c | 688 ---
.../testcodes/aes128_tests/dma_pl230_driver.c | 163 -
.../testcodes/aes128_tests/dma_pl230_driver.h | 198 -
.../mcu/testcodes/aes128_tests/makefile | 262 -
.../apb_mux_tests/apb_mux_tests_cm0.uvopt | 261 -
.../apb_mux_tests/apb_mux_tests_cm0.uvproj | 435 --
.../apb_mux_tests/apb_mux_tests_cm0p.uvopt | 244 -
.../apb_mux_tests/apb_mux_tests_cm0p.uvproj | 432 --
.../mcu/testcodes/apb_mux_tests/makefile | 251 -
.../testcodes/bootloader/bootloader_cm0.uvopt | 229 -
.../bootloader/bootloader_cm0.uvproj | 425 --
.../bootloader/bootloader_cm0p.uvopt | 216 -
.../bootloader/bootloader_cm0p.uvproj | 422 --
.../systems/mcu/testcodes/bootloader/makefile | 254 -
.../debug_tests/debug_tests_cm0.uvopt | 293 -
.../debug_tests/debug_tests_cm0.uvproj | 445 --
.../debug_tests/debug_tests_cm0p.uvopt | 272 -
.../debug_tests/debug_tests_cm0p.uvproj | 442 --
.../mcu/testcodes/debug_tests/makefile | 265 -
.../default_slaves_tests_cm0.uvopt | 261 -
.../default_slaves_tests_cm0.uvproj | 435 --
.../default_slaves_tests_cm0p.uvopt | 244 -
.../default_slaves_tests_cm0p.uvproj | 432 --
.../testcodes/default_slaves_tests/makefile | 251 -
.../systems/mcu/testcodes/dhry/dhry_cm0.uvopt | 277 -
.../mcu/testcodes/dhry/dhry_cm0.uvproj | 440 --
.../mcu/testcodes/dhry/dhry_cm0p.uvopt | 258 -
.../mcu/testcodes/dhry/dhry_cm0p.uvproj | 437 --
.../systems/mcu/testcodes/dhry/makefile | 260 -
.../systems/mcu/testcodes/dhry/transcript | 14 -
.../testcodes/dma_tests/dma_tests_cm0.uvopt | 261 -
.../testcodes/dma_tests/dma_tests_cm0.uvproj | 435 --
.../testcodes/dma_tests/dma_tests_cm0p.uvopt | 244 -
.../testcodes/dma_tests/dma_tests_cm0p.uvproj | 432 --
.../systems/mcu/testcodes/dma_tests/makefile | 253 -
.../dualtimer_demo/dualtimer_demo_cm0.uvopt | 261 -
.../dualtimer_demo/dualtimer_demo_cm0.uvproj | 435 --
.../dualtimer_demo/dualtimer_demo_cm0p.uvopt | 244 -
.../dualtimer_demo/dualtimer_demo_cm0p.uvproj | 432 --
.../mcu/testcodes/dualtimer_demo/makefile | 250 -
.../systems/mcu/testcodes/generic/config_id.h | 408 --
.../generic/mcu_debugtester_interface.c | 131 -
.../generic/mcu_debugtester_interface.h | 102 -
.../gpio_driver_tests_cm0.uvopt | 277 -
.../gpio_driver_tests_cm0.uvproj | 440 --
.../gpio_driver_tests_cm0p.uvopt | 258 -
.../gpio_driver_tests_cm0p.uvproj | 437 --
.../mcu/testcodes/gpio_driver_tests/makefile | 255 -
.../testcodes/gpio_tests/gpio_tests_cm0.uvopt | 261 -
.../gpio_tests/gpio_tests_cm0.uvproj | 435 --
.../gpio_tests/gpio_tests_cm0p.uvopt | 244 -
.../gpio_tests/gpio_tests_cm0p.uvproj | 432 --
.../systems/mcu/testcodes/gpio_tests/makefile | 253 -
.../systems/mcu/testcodes/hello/.project | 11 -
.../systems/mcu/testcodes/hello/hello.c | 52 -
.../mcu/testcodes/hello/hello_cm0.uvopt | 261 -
.../mcu/testcodes/hello/hello_cm0.uvproj | 435 --
.../mcu/testcodes/hello/hello_cm0p.uvopt | 244 -
.../mcu/testcodes/hello/hello_cm0p.uvproj | 432 --
.../systems/mcu/testcodes/hello/makefile | 255 -
.../interrupt_demo/interrupt_demo_cm0.uvopt | 277 -
.../interrupt_demo/interrupt_demo_cm0.uvproj | 440 --
.../interrupt_demo/interrupt_demo_cm0p.uvopt | 258 -
.../interrupt_demo/interrupt_demo_cm0p.uvproj | 437 --
.../mcu/testcodes/interrupt_demo/makefile | 255 -
.../mcu/testcodes/memory_tests/makefile | 251 -
.../memory_tests/memory_tests_cm0.uvopt | 261 -
.../memory_tests/memory_tests_cm0.uvproj | 435 --
.../memory_tests/memory_tests_cm0p.uvopt | 244 -
.../memory_tests/memory_tests_cm0p.uvproj | 432 --
.../mcu/testcodes/romtable_tests/makefile | 266 -
.../romtable_tests/romtable_tests_cm0.uvopt | 293 -
.../romtable_tests/romtable_tests_cm0.uvproj | 445 --
.../romtable_tests/romtable_tests_cm0p.uvopt | 272 -
.../romtable_tests/romtable_tests_cm0p.uvproj | 442 --
.../mcu/testcodes/rtx_demo/RTX_Config.c | 187 -
.../systems/mcu/testcodes/rtx_demo/makefile | 101 -
.../systems/mcu/testcodes/rtx_demo/rtx_demo.c | 86 -
.../mcu/testcodes/rtx_demo/rtx_demo_cm0.hex | 4996 -----------------
.../mcu/testcodes/rtx_demo/rtx_demo_cm0.uvopt | 277 -
.../testcodes/rtx_demo/rtx_demo_cm0.uvproj | 440 --
.../mcu/testcodes/rtx_demo/rtx_demo_cm0p.hex | 4996 -----------------
.../testcodes/rtx_demo/rtx_demo_cm0p.uvopt | 258 -
.../testcodes/rtx_demo/rtx_demo_cm0p.uvproj | 437 --
.../mcu/testcodes/self_reset_demo/makefile | 251 -
.../self_reset_demo/self_reset_demo_cm0.uvopt | 261 -
.../self_reset_demo_cm0.uvproj | 435 --
.../self_reset_demo_cm0p.uvopt | 244 -
.../self_reset_demo_cm0p.uvproj | 432 --
.../systems/mcu/testcodes/sleep_demo/makefile | 256 -
.../testcodes/sleep_demo/sleep_demo_cm0.uvopt | 277 -
.../sleep_demo/sleep_demo_cm0.uvproj | 440 --
.../sleep_demo/sleep_demo_cm0p.uvopt | 258 -
.../sleep_demo/sleep_demo_cm0p.uvproj | 437 --
.../mcu/testcodes/timer_driver_tests/makefile | 254 -
.../timer_driver_tests_cm0.uvopt | 277 -
.../timer_driver_tests_cm0.uvproj | 440 --
.../timer_driver_tests_cm0p.uvopt | 258 -
.../timer_driver_tests_cm0p.uvproj | 437 --
.../mcu/testcodes/timer_tests/makefile | 250 -
.../timer_tests/timer_tests_cm0.uvopt | 261 -
.../timer_tests/timer_tests_cm0.uvproj | 435 --
.../timer_tests/timer_tests_cm0p.uvopt | 244 -
.../timer_tests/timer_tests_cm0p.uvproj | 432 --
.../mcu/testcodes/uart_driver_tests/makefile | 255 -
.../uart_driver_tests_cm0.uvopt | 277 -
.../uart_driver_tests_cm0.uvproj | 440 --
.../uart_driver_tests_cm0p.uvopt | 258 -
.../uart_driver_tests_cm0p.uvproj | 437 --
.../systems/mcu/testcodes/uart_tests/makefile | 251 -
.../testcodes/uart_tests/uart_tests_cm0.uvopt | 261 -
.../uart_tests/uart_tests_cm0.uvproj | 435 --
.../uart_tests/uart_tests_cm0p.uvopt | 244 -
.../uart_tests/uart_tests_cm0p.uvproj | 432 --
.../mcu/testcodes/watchdog_demo/makefile | 250 -
.../watchdog_demo/watchdog_demo_cm0.uvopt | 261 -
.../watchdog_demo/watchdog_demo_cm0.uvproj | 435 --
.../watchdog_demo/watchdog_demo_cm0p.uvopt | 244 -
.../watchdog_demo/watchdog_demo_cm0p.uvproj | 432 --
FPGALIB/pads/verilog/PAD_INOUT8MA_NOE.v | 37 -
FPGALIB/pads/verilog/PAD_VDDIO.v | 29 -
FPGALIB/pads/verilog/PAD_VDDSOC.v | 29 -
FPGALIB/pads/verilog/PAD_VSS.v | 29 -
FPGALIB/pads/verilog/PAD_VSSIO.v | 29 -
GLIB/mem/verilog/SROM_Ax32.v | 127 -
GLIB/pads/verilog/GLIB_PADLIB.v | 139 -
GLIB/pads/verilog/PAD_ANALOG.v | 18 -
GLIB/pads/verilog/PAD_INOUT8MA_NOE.v | 39 -
GLIB/pads/verilog/PAD_INOUT8MA_OE.v | 39 -
GLIB/pads/verilog/PAD_VDDIO.v | 18 -
GLIB/pads/verilog/PAD_VDDSOC.v | 19 -
GLIB/pads/verilog/PAD_VSS.v | 18 -
GLIB/pads/verilog/PAD_VSSIO.v | 19 -
GLIB/sync/verilog/SYNCHRONIZER_EDGES.v | 42 -
.../cmsis/CMSIS/Include/core_cm0.h | 0
.../cmsis/CMSIS/Include/core_cm0plus.h | 0
.../cmsis/CMSIS/Include/core_cmFunc.h | 0
.../cmsis/CMSIS/Include/core_cmInstr.h | 0
.../Device/ARM/CMSDK_CM0/Include/CMSDK_CM0.h | 0
.../ARM/CMSDK_CM0/Include/CMSDK_driver.h | 0
.../ARM/CMSDK_CM0/Include/system_CMSDK_CM0.h | 0
.../CMSDK_CM0/Source/ARM/startup_CMSDK_CM0.s | 0
.../ARM/CMSDK_CM0/Source/CMSDK_driver.c | 0
.../CMSDK_CM0/Source/GCC/startup_CMSDK_CM0.s | 0
.../ARM/CMSDK_CM0/Source/system_CMSDK_CM0.c | 0
.../common/bootloader/bootloader.c | 0
.../common/debug_tests/debug_tests.c | 0
.../common/debug_tests/debug_tests.h | 0
.../common/demos/dualtimer_demo.c | 0
.../common/demos/interrupt_demo.c | 0
.../common/demos/self_reset_demo.c | 0
.../common/demos/sleep_demo.c | 0
.../common/demos/watchdog_demo.c | 0
.../software => software}/common/dhry/dhry.h | 0
.../common/dhry/dhry_1.c | 0
.../common/dhry/dhry_2.c | 0
.../common/retarget/retarget.c | 0
.../common/retarget/uart_stdout.c | 0
.../common/retarget/uart_stdout.h | 0
.../common/romtable_tests/romtable_tests.c | 0
.../common/romtable_tests/romtable_tests.h | 0
.../common/scripts/cmsdk_bootloader.ld | 0
.../common/scripts/cmsdk_cm0.ld | 0
.../common/scripts/debugtester.ld | 0
.../common/scripts/lib-nosys.ld | 0
.../common/scripts/lib-rdimon.ld | 0
.../common/scripts/sections-nokeep.ld | 0
.../common/scripts/sections.ld | 0
.../common/validation/apb_mux_tests.c | 0
.../common/validation/bitband_tests.c | 0
.../common/validation/default_slaves_tests.c | 0
.../common/validation/dma_tests.c | 0
.../common/validation/ext_sys_tests.c | 0
.../common/validation/gpio_driver_tests.c | 0
.../common/validation/gpio_tests.c | 0
.../common/validation/memory_tests.c | 0
.../common/validation/timer_driver_tests.c | 0
.../common/validation/timer_tests.c | 0
.../common/validation/uart_driver_tests.c | 0
.../common/validation/uart_tests.c | 0
.../debug_tester/Makefile | 0
.../debug_tester/cmsdk_debugtester.h | 0
.../debug_tester/debugtester.c | 0
.../debug_tester/debugtester.h | 0
.../debug_tester/debugtester_cm0.sct | 0
.../debug_tester/debugtester_cm0_be.uvopt | 0
.../debug_tester/debugtester_cm0_be.uvproj | 0
.../debug_tester/debugtester_cm0_le.uvopt | 0
.../debug_tester/debugtester_cm0_le.uvproj | 0
.../debug_tester/debugtester_cm0plus.sct | 0
.../debug_tester/debugtester_cm0plus_be.uvopt | 0
.../debugtester_cm0plus_be.uvproj | 0
.../debug_tester/debugtester_cm0plus_le.uvopt | 0
.../debugtester_cm0plus_le.uvproj | 0
.../debug_tester/debugtester_functions.h | 0
.../debug_tester/retarget_cmsdk_debugtester.c | 0
.../debug_tester/system_cmsdk_debugtester.c | 0
.../debug_tester/system_cmsdk_debugtester.h | 0
.../adp_control/verilog}/ADPcontrol_v1_0.v | 0
.../adp_control/verilog}/ADPmanager.v | 0
.../verilog}/axi_stream_io_v1_0.v | 0
.../verilog}/axi_stream_io_v1_0_axi_s.v | 0
.../verilog/ft1248_stream_io_v1_0.v | 4 +-
.../mcu/fpga_imp/CI_verification/.gitkeep | 0
.../fpga_imp/CI_verification/load_bitfile.py | 0
.../fpga_imp/CI_verification/load_file_output | 0
.../CI_verification/run_ADP_verification.py | 0
.../mcu/fpga_imp/build_fpga_pynq_z2.scr | 0
.../mcu/fpga_imp/build_fpga_pynq_zcu104.scr | 0
.../mcu/fpga_imp/clean_fpga.scr | 0
.../fpga_imp/ip_repo/ADPcontrol_1.0/bd/bd.tcl | 0
.../ip_repo/ADPcontrol_1.0/component.xml | 0
.../ADPcontrol_1.0/hdl}/ADPcontrol_v1_0.v | 0
.../hdl/ADPcontrol_v1_0_com_rx.v | 0
.../hdl/ADPcontrol_v1_0_com_tx.v | 0
.../hdl/ADPcontrol_v1_0_stdio_rx.v | 0
.../hdl/ADPcontrol_v1_0_stdio_tx.v | 0
.../soclabs.org_user_ADPcontrol_1.0.zip | Bin
.../ADPcontrol_1.0/src/ADPcontrol_v1_0.v | 0
.../ip_repo/ADPcontrol_1.0/src/ADPmanager.v | 0
.../ADPcontrol_1.0/xgui/ADPcontrol_v1_0.tcl | 0
.../ip_repo/axi_stream_io_1.0/bd/bd.tcl | 0
.../ip_repo/axi_stream_io_1.0/component.xml | 0
.../axi_stream_io_v1_0/data/axi_stream_io.mdd | 0
.../axi_stream_io_v1_0/data/axi_stream_io.tcl | 0
.../drivers/axi_stream_io_v1_0/src/Makefile | 0
.../axi_stream_io_v1_0/src/axi_stream_io.c | 0
.../axi_stream_io_v1_0/src/axi_stream_io.h | 0
.../src/axi_stream_io_selftest.c | 0
.../soclabs.org_user_axi_stream_io_1.0.zip | Bin
.../src/axi_stream_io_v1_0_axi_s.v | 0
.../xgui/axi_stream_io_v1_0.tcl | 0
.../ft1248x1_to_axi_streamio_1.0/bd/bd.tcl | 0
.../component.xml | 0
.../ft1248x1_to_axi_streamio_0_2.xcix | Bin
.../hdl/SYNCHRONIZER_EDGES.v | 0
.../hdl/ft1248x1_to_axi_streamio_v1_0.v | 0
.../hdl/ft1248x1_to_axi_streamio_v1_0_rxd8.v | 0
.../hdl/ft1248x1_to_axi_streamio_v1_0_txd8.v | 0
....org_user_ft1248x1_to_axi_streamio_1.0.zip | Bin
.../xgui/ft1248x1_to_axi_streamio_v1_0.tcl | 0
.../ip_repo/ft1248x1_to_stream8_1.0/bd/bd.tcl | 0
.../ft1248x1_to_stream8_1.0/component.xml | 0
.../ft1248x1_to_stream8_0.xcix | Bin
.../hdl/ft1248x1_to_stream8_v1_0.v | 0
.../hdl/ft1248x1_to_stream8_v1_0_RXD8.v | 0
.../hdl/ft1248x1_to_stream8_v1_0_TXD8.v | 0
.../ip_project_archive.zip | Bin
...clabs.org_user_ft1248x1_to_stream8_1.0.zip | Bin
.../src/ft1248x1_to_stream8.v | 0
.../ft1248x1_to_stream8_1.0/src/synclib.v | 0
.../xgui/ft1248x1_to_stream8_v1_0.tcl | 0
.../soclabs/arm_tests/aes128_tests.bin | Bin
.../soclabs/driver/uartlite.py | 0
.../soclabs/nanosoc-ADP-validation.ipynb | 0
.../soclabs/nanosoc-ADPtest.ipynb | 0
.../soclabs/nanosoc-iotest.ipynb | 0
.../soclabs/driver/uartlite.py | 0
.../soclabs/nanosoc-ADP-validation.ipynb | 0
.../soclabs/nanosoc-ADPtest.ipynb | 0
.../soclabs/nanosoc-iotest.ipynb | 0
.../fpga_imp/scripts/build_mcu_fpga_batch.tcl | 0
.../fpga_imp/scripts/build_mcu_fpga_ip.tcl | 0
.../scripts/build_mcu_fpga_pynq_z2.tcl | 0
.../scripts/build_mcu_fpga_pynq_zcu104.tcl | 0
.../mcu/fpga_imp/scripts/rtl_source_cm0.tcl | 0
.../mcu/fpga_imp/scripts/rtl_source_cmsdk.tcl | 0
.../fpga_imp/scripts/rtl_source_dma230.tcl | 0
.../fpga_imp/scripts/rtl_source_fpga_ip.tcl | 0
.../scripts/rtl_source_soclabs_ip.tcl | 0
.../target_fpga_ac701/fpga_pinmap.xdc | 0
.../fpga_imp/target_fpga_ac701/fpga_synth.tcl | 0
.../target_fpga_ac701/fpga_timing.xdc | 0
.../target_fpga_arm_mps3/fpga_pinmap.xdc | 0
.../target_fpga_arm_mps3/fpga_synth.tcl | 0
.../target_fpga_arm_mps3/fpga_timing.xdc | 0
.../fpga_imp/target_fpga_pynq_z2/design_1.tcl | 0
.../target_fpga_pynq_z2/design_1_wrapper.v | 0
.../target_fpga_pynq_z2/fpga_pinmap.xdc | 0
.../target_fpga_pynq_z2/fpga_synth.tcl | 0
.../target_fpga_pynq_z2/fpga_timing.xdc | 0
.../fpga_imp/target_fpga_zcu104/design_1.tcl | 0
.../target_fpga_zcu104/design_1_wrapper.v | 0
.../target_fpga_zcu104/fpga_pinmap.xdc | 0
.../target_fpga_zcu104/fpga_synth.tcl | 0
.../target_fpga_zcu104/fpga_timing.xdc | 0
.../mcu/testcodes/setup_ds5_tools.scr | 0
.../mcu/tools/setup_ds5_tools.scr | 0
.../systems => systems}/mcu/v2html_doc.tgz | Bin
.../mcu/verilog/aes128_log_to_file.v | 0
.../mcu/verilog/ahb_bootrom.v | 0
.../mcu/verilog/axi_streamio8_buffer.v | 0
.../mcu/verilog/axi_streamio8_rxd_to_file.v | 0
.../mcu/verilog/axi_streamio8_txd_from_file.v | 0
.../systems => systems}/mcu/verilog/bootrom.v | 0
.../mcu/verilog/cmsdk_ahb_cs_rom_table.v | 0
.../mcu/verilog/cmsdk_apb_subsystem.v | 0
.../mcu/verilog/cmsdk_apb_usrt.v | 0
.../mcu/verilog/cmsdk_clkreset.v | 0
.../mcu/verilog/cmsdk_ft1248x1_adpio.v | 0
.../mcu/verilog/cmsdk_mcu_clkctrl.v | 0
.../mcu/verilog/cmsdk_mcu_pin_mux.v | 0
.../mcu/verilog/cmsdk_mcu_stclkctrl.v | 0
.../mcu/verilog/cmsdk_mcu_sysctrl.v | 0
.../mcu/verilog/cmsdk_uart_capture.v | 0
.../mcu/verilog/dma_log_to_file.v | 0
.../verilog/ft1248x1_to_axi_streamio_v1_0.v | 0
.../mcu/verilog/ft1248x1_track.v | 0
.../mcu/verilog/gen_ahb_busmatrix/README.txt | 0
.../gen_ahb_busmatrix/bin/BuildBusMatrix.pl | 0
.../gen_ahb_busmatrix/bin/lib/xmlparser.pm | 0
.../gen_soclabs_4x7_AhbMatrix.scr | 0
.../soclabs_4x7_AhbMatrix.xml | 0
.../soclabs_4x7_AhbMatrix_lite.xml | 0
.../ipxact/src/cmsdk_ahb_busmatrix_ipxact.xml | 0
.../src/cmsdk_ahb_busmatrix_lite_ipxact.xml | 0
.../gen_ahb_busmatrix/soclabs_ahb32_4x7.log | 0
.../soclabs_4x7_AhbMatrix.v | 0
.../soclabs_4x7_AhbMatrix_default_slave.v | 0
.../soclabs_4x7_AhbMatrix_lite.v | 0
.../soclabs_4x7_Arbiter.v | 0
.../soclabs_4x7_MasterInput.v | 0
.../soclabs_4x7_MatrixDecode_adp.v | 0
.../soclabs_4x7_MatrixDecode_cpu.v | 0
.../soclabs_4x7_MatrixDecode_dma.v | 0
.../soclabs_4x7_MatrixDecode_dma2.v | 0
.../soclabs_4x7_SlaveOutput.v | 0
.../verilog/src/cmsdk_ahb_bm_burst_arb.v | 0
.../verilog/src/cmsdk_ahb_bm_decode.v | 0
.../verilog/src/cmsdk_ahb_bm_default_slave.v | 0
.../verilog/src/cmsdk_ahb_bm_fixed_arb.v | 0
.../verilog/src/cmsdk_ahb_bm_input_stage.v | 0
.../verilog/src/cmsdk_ahb_bm_output_stage.v | 0
.../verilog/src/cmsdk_ahb_bm_round_arb.v | 0
.../verilog/src/cmsdk_ahb_bm_single_arb.v | 0
.../src/cmsdk_ahb_bm_single_output_stage.v | 0
.../verilog/src/cmsdk_ahb_busmatrix.v | 0
.../verilog/src/cmsdk_ahb_busmatrix_lite.v | 0
.../gen_ahb_busmatrix/xml/example2x3_full.xml | 0
.../xml/example2x3_sparse.xml | 0
.../xml/soclabs_ahb32_4x7.xml | 0
.../mcu/verilog/nanosoc_chip.v | 0
.../mcu/verilog/nanosoc_chip_pads.v | 0
.../mcu/verilog/nanosoc_cpu.v | 0
.../mcu/verilog/nanosoc_sys_ahb_decode.v | 0
.../mcu/verilog/nanosoc_sysio.v | 0
.../mcu/verilog/pl230_defs.v | 0
.../mcu/verilog/soclabs_ahb_aes128_ctrl.v | 0
.../mcu/verilog/tb_nanosoc.v | 0
.../mcu/verilog/tbench_M0.vc | 0
.../mcu/verilog/track_tb_iostream.v | 0
.../mcu/verilog/v2html_M0.vc | 0
356 files changed, 15 insertions(+), 48011 deletions(-)
delete mode 100644 Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd
delete mode 100644 Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile
delete mode 100644 Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/aes128.h
delete mode 100644 Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/aes128_tests.c
delete mode 100644 Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/dma_pl230_driver.c
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rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/component.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.mdd (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/Makefile (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.c (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.h (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io_selftest.c (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/soclabs.org_user_axi_stream_io_1.0.zip (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/src/axi_stream_io_v1_0_axi_s.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/xgui/axi_stream_io_v1_0.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/bd/bd.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/component.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/ft1248x1_to_axi_streamio_0_2.xcix (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/SYNCHRONIZER_EDGES.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0_rxd8.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0_txd8.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/soclabs.org_user_ft1248x1_to_axi_streamio_1.0.zip (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/xgui/ft1248x1_to_axi_streamio_v1_0.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/bd/bd.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/component.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/ft1248x1_to_stream8_0.xcix (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/hdl/ft1248x1_to_stream8_v1_0.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/hdl/ft1248x1_to_stream8_v1_0_RXD8.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/hdl/ft1248x1_to_stream8_v1_0_TXD8.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/ip_project_archive.zip (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/soclabs.org_user_ft1248x1_to_stream8_1.0.zip (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/src/ft1248x1_to_stream8.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/src/synclib.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/xgui/ft1248x1_to_stream8_v1_0.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/pynq_export/pz104/jupyter_notebooks/soclabs/arm_tests/aes128_tests.bin (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/pynq_export/pz104/jupyter_notebooks/soclabs/driver/uartlite.py (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/pynq_export/pz104/jupyter_notebooks/soclabs/nanosoc-ADP-validation.ipynb (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/pynq_export/pz104/jupyter_notebooks/soclabs/nanosoc-ADPtest.ipynb (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/pynq_export/pz104/jupyter_notebooks/soclabs/nanosoc-iotest.ipynb (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/pynq_export/pz2/jupyter_notebooks/soclabs/driver/uartlite.py (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/pynq_export/pz2/jupyter_notebooks/soclabs/nanosoc-ADP-validation.ipynb (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/pynq_export/pz2/jupyter_notebooks/soclabs/nanosoc-ADPtest.ipynb (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/pynq_export/pz2/jupyter_notebooks/soclabs/nanosoc-iotest.ipynb (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/scripts/build_mcu_fpga_batch.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/scripts/build_mcu_fpga_ip.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/scripts/build_mcu_fpga_pynq_z2.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/scripts/build_mcu_fpga_pynq_zcu104.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/scripts/rtl_source_cm0.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/scripts/rtl_source_cmsdk.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/scripts/rtl_source_dma230.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/scripts/rtl_source_fpga_ip.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/scripts/rtl_source_soclabs_ip.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_ac701/fpga_pinmap.xdc (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_ac701/fpga_synth.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_ac701/fpga_timing.xdc (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_arm_mps3/fpga_pinmap.xdc (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_arm_mps3/fpga_synth.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_arm_mps3/fpga_timing.xdc (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_pynq_z2/design_1.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_pynq_z2/design_1_wrapper.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_pynq_z2/fpga_pinmap.xdc (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_pynq_z2/fpga_synth.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_pynq_z2/fpga_timing.xdc (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_zcu104/design_1.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_zcu104/design_1_wrapper.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_zcu104/fpga_pinmap.xdc (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_zcu104/fpga_synth.tcl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/fpga_imp/target_fpga_zcu104/fpga_timing.xdc (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/testcodes/setup_ds5_tools.scr (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/tools/setup_ds5_tools.scr (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/v2html_doc.tgz (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/aes128_log_to_file.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/ahb_bootrom.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/axi_streamio8_buffer.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/axi_streamio8_rxd_to_file.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/axi_streamio8_txd_from_file.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/bootrom.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_ahb_cs_rom_table.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_apb_subsystem.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_apb_usrt.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_clkreset.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_ft1248x1_adpio.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_mcu_clkctrl.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_mcu_pin_mux.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_mcu_stclkctrl.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_mcu_sysctrl.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/cmsdk_uart_capture.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/dma_log_to_file.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/ft1248x1_to_axi_streamio_v1_0.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/ft1248x1_track.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/README.txt (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/bin/BuildBusMatrix.pl (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/bin/lib/xmlparser.pm (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/gen_soclabs_4x7_AhbMatrix.scr (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/ipxact/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/ipxact/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix_lite.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/ipxact/src/cmsdk_ahb_busmatrix_ipxact.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/ipxact/src/cmsdk_ahb_busmatrix_lite_ipxact.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/soclabs_ahb32_4x7.log (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix_default_slave.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix_lite.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_Arbiter.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MasterInput.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_adp.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_cpu.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_dma.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_dma2.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_SlaveOutput.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_burst_arb.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_decode.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_default_slave.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_fixed_arb.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_input_stage.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_output_stage.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_round_arb.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_single_arb.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_single_output_stage.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_busmatrix.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_busmatrix_lite.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/xml/example2x3_full.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/xml/example2x3_sparse.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/gen_ahb_busmatrix/xml/soclabs_ahb32_4x7.xml (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/nanosoc_chip.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/nanosoc_chip_pads.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/nanosoc_cpu.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/nanosoc_sys_ahb_decode.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/nanosoc_sysio.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/pl230_defs.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/soclabs_ahb_aes128_ctrl.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/tb_nanosoc.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/tbench_M0.vc (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/track_tb_iostream.v (100%)
rename {Cortex-M0/nanosoc/systems => systems}/mcu/verilog/v2html_M0.vc (100%)
diff --git a/.gitignore b/.gitignore
index adb5387..3f6daa7 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,18 +1,18 @@
# Exclude Simulation Files
-/Cortex-M0/nanosoc/systems/mcu/rtl_sim*
-/Cortex-M0/nanosoc/systems/mcu/testcodes/*/*
# Exclude Compiled Binaries
-/Cortex-M0/nanosoc/software/*/*.elf
-/Cortex-M0/nanosoc/software/*/*.hex
-/Cortex-M0/nanosoc/software/*/*.lst
-/Cortex-M0/nanosoc/software/*/*.o
+/software/*/*.elf
+/software/*/*.hex
+/software/*/*.lst
+/software/*/*.o
-/Cortex-M0/nanosoc/systems/mcu/testcodes/*.elf
-/Cortex-M0/nanosoc/systems/mcu/testcodes/*.hex
-/Cortex-M0/nanosoc/systems/mcu/testcodes/*.lst
-/Cortex-M0/nanosoc/systems/mcu/testcodes/*.o
+/systems/mcu/testcodes/*/*
+/systems/mcu/testcodes/*.elf
+/systems/mcu/testcodes/*.hex
+/systems/mcu/testcodes/*.lst
+/systems/mcu/testcodes/*.o
-!/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd
-!/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile
-!/Cortex-M0/nanosoc/systems/mcu/rtl_sim/*.py
+/systems/mcu/rtl_sim*
+!/systems/mcu/rtl_sim/*.cmd
+!/systems/mcu/rtl_sim/makefile
+!/systems/mcu/rtl_sim/*.py
diff --git a/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd b/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd
deleted file mode 100644
index 62cc629..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/rtl_sim/adp.cmd
+++ /dev/null
@@ -1,56 +0,0 @@
-A
-A 0
-R
-R
-A
-A
-S 7e
-A
-a 1000000
-r 10
-a 20000000
-r
-r
-a 30000000
-r
-r
-a 40006000
-r
-r
-r
-r
-A
-
-v 0xe5e5e5e5
-a 80000000
-f 4000
-A
-a 90000000
-U 4
-0123456789ABCDE
-A
-A 0x90000000
-R 5
-A e0000000
-w 1
-r
-A
-A 0x10000000
-R
-m 0xf0000000
-V 0x30000000
-P 1fff
-A
-A 0x10000000
-M
-V
-P 200
-A
-! illegal
-C
-C ff
-C 200
-C 201
- A
-X
-!
diff --git a/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile b/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile
deleted file mode 100644
index f1d25a3..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/rtl_sim/makefile
+++ /dev/null
@@ -1,585 +0,0 @@
-#-----------------------------------------------------------------------------
-# customised simulation makefile
-# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-#
-# Contributors
-#
-# David Flynn (d.w.flynn@soton.ac.uk)
-#
-# Copyright � 2021-3, SoC Labs (www.soclabs.org)
-#-----------------------------------------------------------------------------
-
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M0/Cortex-M0+ System Design Kit simulation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Name of test directory (e.g. hello, dhry)
-# TESTNAME must be specified on the make command line
-TESTNAME =
-
-# List of all tests (this is used when running 'make all/clean')
-TEST_LIST = hello dhry sleep_demo interrupt_demo dualtimer_demo \
- self_reset_demo watchdog_demo rtx_demo gpio_tests timer_tests \
- uart_tests debug_tests default_slaves_tests dma_tests \
- gpio_driver_tests uart_driver_tests timer_driver_tests apb_mux_tests \
- memory_tests romtable_tests
-
-# Default to DS-5 tool-chain
-TOOL_CHAIN = ds5
-
-# Choose the core instantiated, can be either
-# - CORTEX_M0PLUS (Cortex-M0+)
-# - CORTEX_M0 (Cortex-M0)
-# - CORTEX_M0_DS (Cortex-M0 DesignStart version)
-# Note: for all processors, make sure that the __MPU_PRESENT variable in the header file agrees with the setting made in
-# the processor configuration (refer to Section 4.3.3 of the Example System Guide). The header file is either:
-# ../../../software/cmsis/Device/ARM/CMSDK_CM0/Include/CMSDK_CM0.h
-# or
-# ../../../software/cmsis/Device/ARM/CMSDK_CM0plus/Include/CMSDK_CM0plus.h
-# to match the CPU_PRODUCT selected
-# Note: for the M0+ processor, make sure that the __VTOR_PRESENT variable in the header file agrees with the setting made in
-# the processor configuration (refer to Section 4.3.3 of the Example System Guide). The header file is:
-# ../../../software/cmsis/Device/ARM/CMSDK_CM0plus/Include/CMSDK_CM0plus.h
-#DF#CPU_PRODUCT = CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0
-DMA_PRODUCT = DMA_230
-
-# Select Verilog Command File based on CPU type
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- # For Cortex-M0+ product users
- TBENCH_VC = ../verilog/tbench_M0P.vc
-endif
-
-# Select Verilog Command File based on CPU type
-ifeq ($(CPU_PRODUCT),CORTEX_M0)
- # For Cortex-M0 product users
-# TBENCH_VC += -f $(PROJECT_DIR)/flist/cortex-m0/cortex-m0_ip.flist
- DEFINES_VC = +define+CORTEX_M0 +define+USE_TARMAC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0_DS)
- # For Cortex-M0 DesignStart users
- TBENCH_VC = ../verilog/tbench_M0_DS.vc
-endif
-
-ifeq ($(DMA_PRODUCT),DMA_230)
- # For Cortex-M0 product users
-# TBENCH_VC += -f $(PROJECT_DIR)/flist/dma-230/pl230_ip.flist
-endif
-
-TBENCH_VC += -f $(PROJECT_DIR)/flist/project/system.flist
-ACCELERATOR_VC =
-
-# ACCELERATOR_IP = SHA_2
-
-# ifeq ($(ACCELERATOR_IP),SHA_2)
-# # For SHA2 Accelerator IP
-# ACCELERATOR_VC = -sv -f $(SOC_TOP_DIR)/sha-2-accelerator/flist/sha-2-accelerator_src.flist
-# ACCELERATOR_VC += -f $(SOC_TOP_DIR)/accelerator-wrapper/flist/accelerator-wrapper_src.flist
-# endif
-
-#ADP command File
-# ADP_FILE ?= $(SOC_TOP_DIR)/accelerator-wrapper/simulate/stimulus/adp_hash_stim.cmd
-ADP_FILE ?= $(PROJECT_DIR)/system/stimulus/adp_hash_stim.cmd
-ADP_PATH := $(shell realpath $(ADP_FILE))
-ADP_OPTIONS := -define ADP_FILE=\"$(ADP_PATH)\"
-
-# Simulator type (mti/vcs/xm)
-SIMULATOR = xm
-
-# MTI option
-#DF#MTI_OPTIONS = -novopt
-MTI_OPTIONS = -suppress 2892
-MTI_VC_OPTIONS = -f $(TBENCH_VC) $(ACCELERATOR_VC)
-
-# VCS option
-VCS_OPTIONS = +vcs+lic+wait +v2k +lint=all,noTMR,noVCDE -debug
-VCS_SIM_OPTION = +vcs+lic+wait +vcs+flush+log -assert nopostproc
-VCS_VC_OPTIONS = -f $(TBENCH_VC) $(ACCELERATOR_VC)
-
-# XM verilog option
-XMSIM_OPTIONS = -unbuffered -status -LICQUEUE -f xmsim.args -cdslib cds.lib -hdlvar hdl.var -NBASYNC
-XM_VC_OPTIONS = $(TBENCH_VC) $(ACCELERATOR_VC) $(ADP_OPTIONS)
-
-# Boot Loader image
-BOOTLOADER = bootloader
-# Debug Tester image
-DEBUGTESTER = debugtester
-
-# Software make options
-# - Pass onto the software makefile to define targetted CPU type
-# You can append additional make options for testcode here
-SW_MAKE_OPTIONS = CPU_PRODUCT=$(CPU_PRODUCT) TOOL_CHAIN=$(TOOL_CHAIN)
-
-# ------- Simulator redirect -----------
-
-compile : compile_$(SIMULATOR)
-
-
-run : run_$(SIMULATOR)
-
-
-sim : sim_$(SIMULATOR)
-
-
-all : all_$(SIMULATOR)
-
-# ------- VCS -----------
-
-# Compile RTL
-compile_vcs :
- vcs $(VCS_OPTIONS) $(VCS_VC_OPTIONS) | tee compile_vcs.log
-
-
-# Run simulation in batch mode
-run_vcs : code
- @if [ ! -d logs ] ; then \
- mkdir logs; \
- fi
- @echo quit > quit.do
- ./simv $(VCS_SIM_OPTION) < quit.do | tee logs/run_$(TESTNAME).log ;
-
-# Run simulation in interactive mode
-sim_vcs : code
- ./simv -gui +vcs+lic+wait +vcs+flush+log &
-
-# Compile RTL, and run all tests in batch mode
-all_vcs : compile_vcs bootrom debugtester
- @if [ ! -d logs ] ; then \
- mkdir logs; \
- fi
- @echo quit > quit.do
- @echo Run tests ...
- for thistest in $(TEST_LIST) ; do \
- echo $$thistest ; \
- make testcode TESTNAME=$$thistest ;\
- if [ -e image.hex ] ; then \
- ./simv +vcs+lic+wait +vcs+flush+log < quit.do | tee logs/run_$$thistest.log ;\
- else \
- echo Cannot read image.hex ;\
- exit 1; \
- fi ; \
- done
-
-# ------- XM -----------
-
-# Compile RTL
-compile_xm :
- @echo ADP_FILE
- @echo $(ADP_OPTIONS)
- xmprep +overwrite $(XM_VC_OPTIONS) $(DEFINES_VC) +debug -timescale 1ps/1ps -top tb_nanosoc | tee compile_xm.log
- xmvlog -work worklib -f xmvlog_sv.args -f xmvlog_ver.args -sv | tee -a compile_xm.log
- xmelab -mess -f xmelab.args -access +r | tee -a compile_xm.log
-
-# Note : If coverage is required, you can add -coverage all to xmelab
-
-# Run simulation in batch mode
-run_xm : code compile_xm
- @if [ ! -d logs ] ; then \
- mkdir logs; \
- fi
- @echo run > run.tcl.tmp
- @echo exit >> run.tcl.tmp
- @mv run.tcl.tmp run.tcl
- xmsim $(XMSIM_OPTIONS) -input run.tcl | tee logs/run_$(TESTNAME).log ;
- # @make verify
-
-# Run simulation in interactive mode
-sim_xm : code compile_xm
- xmsim -gui $(XMSIM_OPTIONS)
- @make verify
-
-# Compile RTL, and run all tests in batch mode
-all_xm : compile_xm bootrom debugtester
- @if [ ! -d logs ] ; then \
- mkdir logs; \
- fi
- @echo run > run.tcl.tmp
- @echo exit >> run.tcl.tmp
- @mv run.tcl.tmp run.tcl
- @echo Run tests ...
- for thistest in $(TEST_LIST) ; do \
- echo $$thistest ; \
- make testcode TESTNAME=$$thistest ;\
- if [ -e image.hex ] ; then \
- xmsim $(XMSIM_OPTIONS) -input run.tcl | tee logs/run_$$thistest.log ;\
- else \
- echo Cannot read image.hex ;\
- exit 1; \
- fi ; \
- done
- @make verify
-
-# ------- MTI -----------
-
-# Compile RTL
-compile_mti :
- @if [ -d work ] ; then \
- true ; \
- else \
- vlib work; \
- fi
- vlog -incr -lint +v2k $(MTI_OPTIONS) $(MTI_VC_OPTIONS) | tee compile_mti.log
-
-# Run simulation in batch mode
-run_mti : code
- @if [ ! -d logs ] ; then \
- mkdir logs; \
- fi
- vsim $(MTI_OPTIONS) -c tb_cmsdk_mcu -do "radix hex;run -all;quit -f" | tee logs/run_$(TESTNAME).log ;
-
-# Run simulation in interactive mode
-sim_mti : code
- vsim $(MTI_OPTIONS) -gui tb_cmsdk_mcu &
-
-# Create work directory
-lib_mti :
- vlib work
-
-# Compile RTL, and run all tests in batch mode
-all_mti : compile_mti bootrom debugtester
- @if [ ! -d logs ] ; then \
- mkdir logs; \
- fi
- @echo Run tests ...
- for thistest in $(TEST_LIST) ; do \
- echo $$thistest ; \
- make testcode TESTNAME=$$thistest ;\
- if [ -e image.hex ] ; then \
- vsim $(MTI_OPTIONS) -c tb_cmsdk_mcu -do "radix hex;run -all;quit -f" | tee logs/run_$$thistest.log ;\
- else \
- echo Cannot read image.hex ;\
- exit 1; \
- fi ; \
- done
-
-# ------- Software -----------
-
-# code target is used by other simulation targets (e.g. run_mti, sim_mti)
-# Before simulation, bootrom and testcode need to be compiled.
-code : testcode bootrom debugtester
-
-# Compile bootloader
-# Note : The use of ls after compile allows the computing server to sync up
-bootrom:
- @(cd ../testcodes/$(BOOTLOADER) ;\
- make all $(SW_MAKE_OPTIONS) ;\
- echo Compile done ;\
- ls > /dev/null ;\
- echo Copy $(BOOTLOADER).hex ;\
- if [ -e $(BOOTLOADER).hex ] ; then \
- cp $(BOOTLOADER).hex ../../rtl_sim/$(BOOTLOADER).hex ;\
- else \
- while [ ! -e $(BOOTLOADER).hex ] ; do \
- echo Wait for hex file ...; \
- ls > /dev/null; \
- sleep 5; \
- done; \
- if [ -e $(BOOTLOADER).hex ] ; then \
- cp $(BOOTLOADER).hex ../../rtl_sim/$(BOOTLOADER).hex ;\
- else \
- echo Problem reading hex file ;\
- exit 1; \
- fi ;\
- fi ;\
- cp $(BOOTLOADER).hex ../../rtl_sim/$(BOOTLOADER).hex ;\
- cd ../../rtl_sim )
-
-# Compile test code
-# Note : The use of ls after compile allows the computing server to sync up
-testcode:
-ifeq ($(TESTNAME),)
- $(error Please specify TESTNAME on the make command line)
-endif
- @(if [ -d "../testcodes/$(TESTNAME)" ] ; then \
- cd ../testcodes/$(TESTNAME) ;\
- make all $(SW_MAKE_OPTIONS) ; \
- echo Compile done ;\
- ls > /dev/null ;\
- echo Copy $(TESTNAME).hex ;\
- if [ -e $(TESTNAME).hex ] ; then \
- cp $(TESTNAME).hex ../../rtl_sim/image.hex ; \
- else \
- while [ ! -e $(TESTNAME).hex ] ; do \
- echo Wait for $(TESTNAME).hex file ...; \
- ls > /dev/null ; \
- sleep 5 ; \
- done; \
- if [ -e $(TESTNAME).hex ] ; then \
- cp $(TESTNAME).hex ../../rtl_sim/image.hex ; \
- else \
- echo Problem reading hex file ;\
- exit 1; \
- fi ;\
- fi ;\
- cd ../../rtl_sim ;\
- else \
- echo "ERROR: invalid TESTNAME value ( $(TESTNAME) )" ;\
- exit 1 ;\
- fi ;\
- )
-
-
-# Compile debugtester
-# Note : The use of ls after compile allows the computing server to sync up
-debugtester:
- @(cd ../../../software/debug_tester ;\
- make all $(SW_MAKE_OPTIONS) ;\
- echo Compile done ;\
- ls > /dev/null ;\
- echo Copy $(DEBUGTESTER)_le.hex ;\
- if [ -e $(DEBUGTESTER)_le.hex ] ; then \
- cp $(DEBUGTESTER)_le.hex ../../systems/mcu/rtl_sim/$(DEBUGTESTER)_le.hex ;\
- else \
- while [ ! -e $(DEBUGTESTER)_le.hex ] ; do \
- echo Wait for hex file ...; \
- ls > /dev/null ; \
- sleep 5 ; \
- done; \
- if [ -e $(DEBUGTESTER)_le.hex ] ; then \
- cp $(DEBUGTESTER)_le.hex ../../systems/mcu/rtl_sim/$(DEBUGTESTER)_le.hex ;\
- fi ;\
- fi ;\
- echo Copy $(DEBUGTESTER)_be.hex ;\
- if [ -e $(DEBUGTESTER)_be.hex ] ; then \
- cp $(DEBUGTESTER)_be.hex ../../systems/mcu/rtl_sim/$(DEBUGTESTER)_be.hex ;\
- else \
- while [ ! -e $(DEBUGTESTER)_be.hex ] ; do \
- echo Wait for hex file ...;\
- ls > /dev/null ;\
- sleep 5 ; \
- done; \
- if [ -e $(DEBUGTESTER)_be.hex ] ; then \
- cp $(DEBUGTESTER)_be.hex ../../systems/mcu/rtl_sim/$(DEBUGTESTER)_be.hex ;\
- fi ;\
- fi ;\
- if [ ! -e $(DEBUGTESTER)_le.hex ] && [ ! -e $(DEBUGTESTER)_be.hex ] ; then \
- echo Problem reading hex file ;\
- exit 1 ;\
- fi ;\
- cd ../../systems/mcu/rtl_sim )
-
-# Compile all software including boot ROM
-compile_all_code: bootrom debugtester
- for thistest in $(TEST_LIST) ; do \
- echo Compiling $$thistest ; \
- echo Removing old image.hex ;\
- rm -f image.hex ;\
- make testcode TESTNAME=$$thistest;\
- if [ -e image.hex ] ; then \
- echo OK - image.hex created for test $$thistest ;\
- else \
- echo ERROR - image.hex NOT created for test $$thistest ;\
- exit 1; \
- fi ; \
- done
-
-# ------- document with v2html -----------
-
-#
-# rm -Rf *
-# ../tools/v2html -f ../verilog/v2html_M0.vc -ht cmsdk_mcu_system
-# cp -p tb_cmsdk_mcu.v.html hierarchy.html
-
-v2html:
- echo building HTML tree
- @if [ ! -d ../v2html_doc ] ; then \
- mkdir ../v2html_doc; \
- fi
- @(cd ../v2html_doc; \
- rm *.html; rm *.gif; rm *.gz; \
- ~/tools/v2html -f ../verilog/v2html_M0.vc -ht nanosoc_chip ; \
- cp -p tb_nanosoc.v.html hierarchy.html ; \
- cd ../rtl_sim ; )
- gtar zcvf ../v2html_doc.tgz ../v2html_doc
-
-
-# Remove all software compilation results
-clean_all_code:
- @(cd ../../../software/debug_tester ; make clean; cd ../../systems/mcu/rtl_sim; )
- @(cd ../testcodes/$(BOOTLOADER) ; make clean; cd ../../rtl_sim; )
- for thistest in $(TEST_LIST) ; do \
- echo Cleaning $$thistest ... ; \
- cd ../testcodes/$$thistest ; \
- make clean; \
- cd ../../rtl_sim; \
- done
-
-# Remove only bootloader and default selected test
-clean_code:
- @(cd ../testcodes/$(BOOTLOADER) ; make clean; cd ../../rtl_sim; )
- @(cd ../testcodes/$(TESTNAME) ; make clean; cd ../../rtl_sim; )
-
-# ----- verification ------
-verify:
- @python3 $(PROJECT_DIR)/flow/adp_verify.py
-
-# ------- clean -----------
-
-# Remove RTL compile files, log files, software compile files
-clean : clean_all_code
- @if [ -d work ] ; then \
- rm -rf work ; \
- fi
- @if [ -e tarmac0.log ] ; then \
- rm tarmac0.log ; \
- fi
- @if [ -e tarmac1.log ] ; then \
- rm tarmac1.log ; \
- fi
- @if [ -e tarmac0track.log ] ; then \
- rm tarmac0track.log ; \
- fi
- @if [ -e ft1248_ip.log ] ; then \
- rm ft1248_ip.log ; \
- fi
- @if [ -e ft1248_op.log ] ; then \
- rm ft1248_op.log ; \
- fi
- @if [ -e uart.log ] ; then \
- rm uart.log ; \
- fi
- @if [ -e uart0.log ] ; then \
- rm uart0.log ; \
- fi
- @if [ -e uart1.log ] ; then \
- rm uart1.log ; \
- fi
- @if [ -e uart2.log ] ; then \
- rm uart2.log ; \
- fi
- @if [ -e uart3.log ] ; then \
- rm uart3.log ; \
- fi
- @if [ -e vsim.wlf ] ; then \
- rm vsim.wlf ; \
- fi
- @if [ -e image.hex ] ; then \
- rm image.hex ; \
- fi
- @if [ -e date_file ] ; then \
- rm date_file ; \
- fi
- @if [ -e bootrom.v ] ; then \
- rm bootrom.v ; \
- fi
- @if [ -e bootrom.bintxt ] ; then \
- rm bootrom.bintxt ; \
- fi
- @if [ -e bootloader.hex ] ; then \
- rm bootloader.hex ; \
- fi
- @if [ -e debugtester_le.hex ] ; then \
- rm debugtester_le.hex ; \
- fi
- @if [ -e debugtester_be.hex ] ; then \
- rm debugtester_be.hex ; \
- fi
- @if [ -e compile_mti.log ] ; then \
- rm compile_mti.log ; \
- fi
- @if [ -e vish_stacktrace.vstf ] ; then \
- rm vish_stacktrace.vstf ; \
- fi
- @if [ -e compile_vcs.log ] ; then \
- rm compile_vcs.log ; \
- fi
- @if [ -e compile_xm.log ] ; then \
- rm compile_xm.log ; \
- fi
- @if [ -e transcript ] ; then \
- rm transcript ; \
- fi
- @if [ -e simv ] ; then \
- rm simv ; \
- fi
- @if [ -d csrc ] ; then \
- rm -rf csrc ; \
- fi
- @if [ -d simv.daidir ] ; then \
- rm -rf simv.daidir ; \
- fi
- @if [ -e inter.vpd ] ; then \
- rm -rf inter.vpd ; \
- fi
- @if [ -e quit.do ] ; then \
- rm -rf quit.do ; \
- fi
- @if [ -e ucli.key ] ; then \
- rm -rf ucli.key ; \
- fi
- @if [ -d DVEfiles ] ; then \
- rm -rf DVEfiles ; \
- fi
- @if [ -d INCA_libs ] ; then \
- rm -rf INCA_libs ; \
- fi
- @if [ -d cov_work ] ; then \
- rm -rf cov_work ; \
- fi
- @if [ -e hdl.var ] ; then \
- rm -rf hdl.var ; \
- fi
- @if [ -e xmelab.args ] ; then \
- rm -rf xmelab.args ; \
- fi
- @if [ -e xmvlog.args ] ; then \
- rm -rf xmvlog.args ; \
- fi
- @if [ -e xmsim.args ] ; then \
- rm -rf xmsim.args ; \
- fi
- @if [ -e xmprep.log ] ; then \
- rm -rf xmprep.log ; \
- fi
- @if [ -e xmelab.log ] ; then \
- rm -rf xmelab.log ; \
- fi
- @if [ -e xmvlog.log ] ; then \
- rm -rf xmvlog.log ; \
- fi
- @if [ -e xmsim.log ] ; then \
- rm -rf xmsim.log ; \
- fi
- @if [ -e run.tcl ] ; then \
- rm -rf run.tcl ; \
- fi
- @if [ -e RUN_XM ] ; then \
- rm -rf RUN_XM ; \
- fi
- @if [ -e xmsim.key ] ; then \
- rm -rf xmsim.key ; \
- fi
- @if [ -e cds.lib ] ; then \
- rm -rf cds.lib ; \
- fi
- @if [ -e logs ] ; then \
- rm -rf logs ; \
- fi
- @if [ -e ../v2html_doc ] ; then \
- rm -rf ../v2html_doc ; \
- fi
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/aes128.h b/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/aes128.h
deleted file mode 100644
index 202adf4..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/aes128.h
+++ /dev/null
@@ -1,71 +0,0 @@
-#ifndef _AES128_H_
-#define _AES128_H_
-
-#include <stdint.h>
-
-// define the API addresses here.
-
-#define AES128_BASE (0x60000000)
-
-// byte address I/O buffers
-#define AES128_BUF_SIZE (0x4000)
-
-typedef struct {
- __I uint32_t CORE_NAME[2]; /* 0x0000-0007 */
- __I uint32_t CORE_VERSION; /* 0x0008-000B */
- uint32_t RESRV0C; /* 0x000C */
- __IO uint32_t CTRL; /* 0x0010 */
- __O uint32_t CTRL_SET; /* 0x0014 */
- __O uint32_t CTRLL_CLR; /* 0x0018 */
- __I uint32_t STATUS; /* 0x001c */
- __IO uint32_t QUAL; /* 0x0020 */
- uint32_t RESRV24[3]; /* 0x0024 - 2F*/
- __IO uint32_t DRQ_MSK; /* 0x0030 */
- __O uint32_t DRQ_MSK_SET; /* 0x0034 */
- __O uint32_t DRQ_MSK_CLR; /* 0x0038 */
- __I uint32_t DRQ_STATUS; /* 0x003C */
- __IO uint32_t IRQ_MSK; /* 0x0040 */
- __O uint32_t IRQ_MSK_SET; /* 0x0044 */
- __O uint32_t IRQ_MSK_CLR; /* 0x0048 */
- __I uint32_t IRQ_STATUS; /* 0x004C */
- uint8_t RESRV50[AES128_BUF_SIZE - 0x50];/* 0x0050-0x3FFC (4096-20 words) */
- __IO uint8_t KEY128[AES128_BUF_SIZE]; /* 0x4000-7FFF (0x3FFF is last alias) */
- __IO uint8_t TXTIP128[AES128_BUF_SIZE]; /* 0x8000-BFFF (0x3FFF is last alias) */
- __I uint8_t TXTOP128[AES128_BUF_SIZE]; /* 0xC000-FFFF (0x3FFF is last alias) */
-} AES128_TypeDef;
-
-#define AES128 ((AES128_TypeDef *) AES128_BASE )
-
-#define AES_BLOCK_SIZE 16
-
-#define AES_KEY_LEN_128 16
-
-#define HW32_REG(ADDRESS) (*((volatile unsigned long *)(ADDRESS)))
-
-#define AES128_CTRL_REG_WIDTH ( 8)
-#define AES128_CTRL_BIT_MAX ( (CTRL_REG_WIDTH-1)
-#define AES128_CTRL_KEY_REQ_BIT (1<<0)
-#define AES128_CTRL_IP_REQ_BIT (1<<1)
-#define AES128_CTRL_OP_REQ_BIT (1<<2)
-#define AES128_CTRL_ERR_REQ_BIT (1<<3)
-#define AES128_CTRL_BYPASS_BIT (1<<6)
-#define AES128_CTRL_ENCODE_BIT (1<<7)
-#define AES128_STAT_REG_WIDTH ( 8)
-#define AES128_STAT_KEY_REQ_BIT (1<<0)
-#define AES128_STAT_IP_REQ_BIT (1<<1)
-#define AES128_STAT_OP_REQ_BIT (1<<2)
-#define AES128_STAT_ERR_REQ_BIT (1<<3)
-#define AES128_STAT_KEYOK_BIT (1<<4)
-#define AES128_STAT_VALID_BIT (1<<5)
-#define AES128_STAT_BYPASS_BIT (1<<6)
-#define AES128_STAT_ENCODE_BIT (1<<7)
-#define AES128_KEY_REQ_BIT (1<<0)
-#define AES128_IP_REQ_BIT (1<<1)
-#define AES128_OP_REQ_BIT (1<<2)
-#define AES128_ERR_REQ_BIT (1<<3)
-#define AES128_KEYOK_BIT (1<<4)
-#define AES128_VALID_BIT (1<<5)
-#define AES128_BYPASS_BIT (1<<6)
-#define AES128_ENCODE_BIT (1<<7)
-
-#endif // _AES128_H_
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/aes128_tests.c b/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/aes128_tests.c
deleted file mode 100644
index 3dbccad..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/aes128_tests.c
+++ /dev/null
@@ -1,688 +0,0 @@
-#include "CMSDK_CM0.h"
-#include "aes128.h"
-#include <string.h>
-#include "uart_stdout.h"
-#include <stdio.h>
-// memcopy implememtation
-#define os_memcpy memcpy
-#define os_memset memset
-// PL230DMA implementation
-#include "dma_pl230_driver.h"
-
-
-static volatile dma_pl230_channel_data aes_ip_chain[2];
-static volatile dma_pl230_channel_data aes_op_chain[2];
-
-// associate DMA channel numbers
-#define DMA_CHAN_AES128_IP (0)
-#define DMA_CHAN_AES128_OP (1)
-
-volatile int dma_done_irq_occurred;
-volatile int dma_done_irq_expected;
-volatile int dma_error_irq_occurred;
-volatile int dma_error_irq_expected;
-volatile int aes_key_irq_occurred;
-volatile int aes_key_irq_expected;
-volatile int aes_ip_irq_occurred;
-volatile int aes_ip_irq_expected;
-volatile int aes_op_irq_occurred;
-volatile int aes_op_irq_expected;
-volatile int aes_err_irq_occurred;
-volatile int aes_err_irq_expected;
-
- uint8_t _test_key128[AES_KEY_LEN_128] = {
- 0x75, 0x46, 0x20, 0x67,
- 0x6e, 0x75, 0x4b, 0x20,
- 0x79, 0x6d, 0x20, 0x73,
- 0x74, 0x61, 0x68, 0x54 };
-
- uint8_t test_key128[AES_KEY_LEN_128] = {
- 0x54, 0x68, 0x61, 0x74,
- 0x73, 0x20, 0x6d, 0x79,
- 0x20, 0x4b, 0x75, 0x6e,
- 0x67, 0x20, 0x46, 0x75 };
-
- uint8_t buf128[AES_BLOCK_SIZE] = {
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00 };
-
- uint8_t _test_text128[AES_BLOCK_SIZE] = {
- 0x6f, 0x77, 0x54, 0x20,
- 0x65, 0x6e, 0x69, 0x4e,
- 0x20, 0x65, 0x6e, 0x4f,
- 0x20, 0x6f, 0x77, 0x54 };
-
- uint8_t test_text128[AES_BLOCK_SIZE] = {
- 0x54, 0x77, 0x6f, 0x20,
- 0x4f, 0x6e, 0x65, 0x20,
- 0x4e, 0x69, 0x6e, 0x65,
- 0x20, 0x54, 0x77, 0x6f };
-
- uint8_t test_exp128[AES_BLOCK_SIZE] = {
- 0x29, 0xc3, 0x50, 0x5f,
- 0x57, 0x14, 0x20, 0xf6,
- 0x40, 0x22, 0x99, 0xb3,
- 0x1a, 0x02, 0xd7, 0x3a };
-
-// add extra block[128] with all zeros to toggle bits low
- uint8_t shift_patt[129*16] = {
- 0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x80,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe0,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x80,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc0,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe0,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x80,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc0,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe0,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x80,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc0,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe0,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x80,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc0,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe0,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x80,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc0,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe0,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x80,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xc0,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xe0,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfc,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,//127
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,//128
- };
-
- uint8_t shift_buf1[sizeof(shift_patt)];
- uint8_t shift_buf2[sizeof(shift_patt)];
-
-
-/* Note: Hardware supports byte, half-word or word accesses
- So memcpy() can be used to load/save data
- And memset() can be used to pad out data-in to 128-bits
- mode =0 (bypass), =1 (encode) or =2 (decode)
-*/
-void aes128_driver_memcpy(uint8_t *key, uint32_t nbytes, uint8_t *input,
- uint8_t *result, uint8_t mode)
-{
- // Reset engine
- AES128->DRQ_MSK = 0;
- AES128->IRQ_MSK = 0;
- AES128->QUAL = 0;
- AES128->CTRL = AES128_CTRL_KEY_REQ_BIT | AES128_CTRL_IP_REQ_BIT | AES128_CTRL_OP_REQ_BIT | AES128_CTRL_ERR_REQ_BIT;
-
- // Set up parameters
- if (mode == 1)
- AES128->CTRL_SET = AES128_ENCODE_BIT; // ENCODE mode
- if (mode == 0)
- AES128->CTRL_SET = AES128_BYPASS_BIT; // BYPASS mode
-
- AES128->IRQ_MSK_SET = (AES128_ERR_REQ_BIT | AES128_KEY_REQ_BIT | AES128_IP_REQ_BIT | AES128_OP_REQ_BIT);
-
- // Program Key
- os_memcpy((uint8_t *)AES128->KEY128, key, AES_KEY_LEN_128);
- while (!(AES128->STATUS & AES128_KEYOK_BIT))
- ;
-
- /* payload */
- while(nbytes) {
- uint8_t len = (nbytes > AES_BLOCK_SIZE) ? AES_BLOCK_SIZE : nbytes;
- /* Align/pad input and load into hardware */
- os_memcpy((uint8_t *)AES128->TXTIP128, input, len);
- //patch up any zero-padding
- if (len < AES_BLOCK_SIZE)
- os_memset((uint8_t *)&(AES128->TXTIP128[len]), 0, AES_BLOCK_SIZE-len);
- /* Auto-started! - no need for manual start */
- /* Poll until completed */
- while (!(AES128->STATUS & AES128_VALID_BIT))
- ;
- os_memcpy(result, (uint8_t *)AES128->TXTOP128, AES_BLOCK_SIZE);
- /* Accounting */
- input += len;
- result += len;
- nbytes -= len;
- AES128->IRQ_MSK_SET = (AES128_IP_REQ_BIT | AES128_OP_REQ_BIT);
- }
- AES128->CTRL = 0;
-}
-
-// wrapper functions
-
-void aes128_bypass_memcpy(uint8_t *key, uint32_t nbytes, uint8_t *input, uint8_t *result)
- { aes128_driver_memcpy(key, nbytes, input, result, 0); }
-
-void aes128_encrypt_memcpy(uint8_t *key, uint32_t nbytes, uint8_t *input, uint8_t *result)
- { aes128_driver_memcpy(key, nbytes, input, result, 1); }
-
-void aes128_decrypt_memcpy(uint8_t *key, uint32_t nbytes, uint8_t *input, uint8_t *result)
- { aes128_driver_memcpy(key, nbytes, input, result, 2); }
-
-
-int aes128_buffer_verify(uint32_t buflen, uint8_t *buf_A, uint8_t *buf_B)
-{
- int i, j, fail = 0;
- for (i=0 ; i < buflen; i++) {
- if (buf_A[i] != buf_B[i]){
- fail = 1;
- break;
- }
- }
- if (fail) {
- j=i; // print offending block
- for (i=(j - (j%16)) ; i < (j-(j%16)+16); i++) {
- if (i%16==0)
- printf(" //%03d\n", (i>>4));
- printf("0x%02x,", buf_A[i]);
- }
- }
- if (fail){
- i=j;
- printf("Verify compare FAIL\n EXPECTED_RESULT[%2d]= 0x%02x, ACTUAL_RESULT= 0x%02x \n",i, buf_B[i], buf_A[i]);
- return(-1);
- }
- return(0);
-}
-
-void aes128_driver_aligned_dma32(uint8_t *key, uint32_t nbytes, uint8_t *input,
- uint8_t *result, uint8_t mode)
-{
- int c;
- // Reset engine
- AES128->DRQ_MSK = 0;
- AES128->IRQ_MSK = 0;
- AES128->QUAL = 0;
- AES128->CTRL = AES128_CTRL_KEY_REQ_BIT | AES128_CTRL_IP_REQ_BIT | AES128_CTRL_OP_REQ_BIT;
-
- // Set up parameters
- if (mode == 1)
- AES128->CTRL_SET = AES128_ENCODE_BIT; // ENCODE mode
- if (mode == 0)
- AES128->CTRL_SET = AES128_BYPASS_BIT; // BYPASS mode
-
- dma_pl230_data_struct_init(); // initialize
-
- // program DMA transfers in multiples of 4 words (nbytes scaled >>2 for words)
- aes_ip_chain[0].SrcEndPointer = DMA_PL230_PTR_END(key,PL230_XFER_W,4);
- aes_ip_chain[0].DstEndPointer = DMA_PL230_PTR_END(&(AES128->KEY128[AES128_BUF_SIZE-16]),PL230_XFER_W,4);
- aes_ip_chain[0].Control = DMA_PL230_CTRL(PL230_CTRL_CYCLE_DEV_CHAIN_ALT,PL230_XFER_W,4,PL230_CTRL_RPWR_4);
-
- aes_ip_chain[1].SrcEndPointer = DMA_PL230_PTR_END(input,PL230_XFER_W,(nbytes>>2));
- aes_ip_chain[1].DstEndPointer = DMA_PL230_PTR_END(&(AES128->TXTIP128[AES128_BUF_SIZE-nbytes]),PL230_XFER_W,(nbytes>>2));
- aes_ip_chain[1].Control = DMA_PL230_CTRL(PL230_CTRL_CYCLE_BASIC,PL230_XFER_W,(nbytes>>2),PL230_CTRL_RPWR_4);
-
- c=DMA_CHAN_AES128_IP;
- dma_pl230_table->Primary[c].SrcEndPointer = DMA_PL230_PTR_END(&(aes_ip_chain[0].SrcEndPointer), PL230_XFER_W,(2*4));
- dma_pl230_table->Primary[c].DstEndPointer = DMA_PL230_PTR_END(&(dma_pl230_table->Alternate[c]), PL230_XFER_W,(1*4));
- dma_pl230_table->Primary[c].Control= DMA_PL230_CTRL_DSTFIX(PL230_CTRL_CYCLE_DEV_CHAIN_PRI,PL230_XFER_W,(2*4),PL230_CTRL_RPWR_4);
-
- aes_op_chain[0].SrcEndPointer = DMA_PL230_PTR_END(&(AES128->TXTOP128[AES128_BUF_SIZE-nbytes]),PL230_XFER_W,(nbytes>>2));
- aes_op_chain[0].DstEndPointer = DMA_PL230_PTR_END(result,PL230_XFER_W,(nbytes>>2));
- aes_op_chain[0].Control = DMA_PL230_CTRL(PL230_CTRL_CYCLE_BASIC,PL230_XFER_W,(nbytes>>2),PL230_CTRL_RPWR_4);
-
- c=DMA_CHAN_AES128_OP;
- dma_pl230_table->Primary[c].SrcEndPointer = DMA_PL230_PTR_END(&(aes_op_chain[0].SrcEndPointer), PL230_XFER_W,(1*4));
- dma_pl230_table->Primary[c].DstEndPointer = DMA_PL230_PTR_END(&(dma_pl230_table->Alternate[c]), PL230_XFER_W,(1*4));
- dma_pl230_table->Primary[c].Control= DMA_PL230_CTRL_DSTFIX(PL230_CTRL_CYCLE_DEV_CHAIN_PRI,PL230_XFER_W,(1*4),PL230_CTRL_RPWR_4);
-
- // enable DMA controller channels
- dma_pl230_init((1<<DMA_CHAN_AES128_OP) | (1<<DMA_CHAN_AES128_IP)); // two active
-
- // and enable DMA requests
- AES128->DRQ_MSK_SET = (AES128_KEY_REQ_BIT | AES128_IP_REQ_BIT | AES128_OP_REQ_BIT);
- AES128->IRQ_MSK_SET = (AES128_ERR_REQ_BIT | AES128_KEY_REQ_BIT | AES128_IP_REQ_BIT | AES128_OP_REQ_BIT);
- // test to ensure output DMA has started
- while (!(dma_pl230_channel_active((1<<DMA_CHAN_AES128_OP))))
- ;
- while (dma_pl230_channel_active((1<<DMA_CHAN_AES128_OP)))
- ;
- while (dma_pl230_channel_active((1<<DMA_CHAN_AES128_OP)))
- ;
- AES128->DRQ_MSK = 0;
- AES128->IRQ_MSK = 0;
- DMA_PL230_DMAC->DMA_CFG = 0; /* Disable DMA controller for initialization */
- dma_pl230_init(0); // none active
- return;
-}
-
-void aes128_driver_dma8(uint8_t *key, uint32_t nbytes, uint8_t *input,
- uint8_t *result, uint8_t mode)
-{
- int c;
- // Reset engine
- AES128->DRQ_MSK = 0;
- AES128->IRQ_MSK = 0;
- AES128->QUAL = 0;
- AES128->CTRL = AES128_CTRL_KEY_REQ_BIT | AES128_CTRL_IP_REQ_BIT | AES128_CTRL_OP_REQ_BIT;
-
- // Set up parameters
- if (mode == 1)
- AES128->CTRL_SET = AES128_ENCODE_BIT; // ENCODE mode
- if (mode == 0)
- AES128->CTRL_SET = AES128_BYPASS_BIT; // BYPASS mode
-
- dma_pl230_data_struct_init(); // initialize
-
- // program DMA transfers in multiples of 16 bytes
- aes_ip_chain[0].SrcEndPointer = DMA_PL230_PTR_END(key,PL230_XFER_B,16);
- aes_ip_chain[0].DstEndPointer = DMA_PL230_PTR_END(&(AES128->KEY128[AES128_BUF_SIZE-16]),PL230_XFER_B,16);
- aes_ip_chain[0].Control = DMA_PL230_CTRL(PL230_CTRL_CYCLE_DEV_CHAIN_ALT,PL230_XFER_B,16,PL230_CTRL_RPWR_16);
-
- aes_ip_chain[1].SrcEndPointer = DMA_PL230_PTR_END(input,PL230_XFER_B,(nbytes));
- aes_ip_chain[1].DstEndPointer = DMA_PL230_PTR_END(&(AES128->TXTIP128[AES128_BUF_SIZE-nbytes]),PL230_XFER_B,(nbytes));
- aes_ip_chain[1].Control = DMA_PL230_CTRL(PL230_CTRL_CYCLE_BASIC,PL230_XFER_B,(nbytes),PL230_CTRL_RPWR_16);
-
- c=DMA_CHAN_AES128_IP;
- dma_pl230_table->Primary[c].SrcEndPointer = DMA_PL230_PTR_END(&(aes_ip_chain[0].SrcEndPointer), PL230_XFER_W, (2*4));
- dma_pl230_table->Primary[c].DstEndPointer = DMA_PL230_PTR_END(&(dma_pl230_table->Alternate[c]), PL230_XFER_W, (1*4));
- dma_pl230_table->Primary[c].Control= DMA_PL230_CTRL_DSTFIX(PL230_CTRL_CYCLE_DEV_CHAIN_PRI,PL230_XFER_W,(2*4),PL230_CTRL_RPWR_4);
-
- aes_op_chain[0].SrcEndPointer = DMA_PL230_PTR_END(&(AES128->TXTOP128[AES128_BUF_SIZE-nbytes]),PL230_XFER_B,(nbytes));
- aes_op_chain[0].DstEndPointer = DMA_PL230_PTR_END(result,PL230_XFER_B,(nbytes));
- aes_op_chain[0].Control = DMA_PL230_CTRL(PL230_CTRL_CYCLE_BASIC,PL230_XFER_B,(nbytes),PL230_CTRL_RPWR_16);
-
- c=DMA_CHAN_AES128_OP;
- dma_pl230_table->Primary[c].SrcEndPointer = DMA_PL230_PTR_END(&(aes_op_chain[0].SrcEndPointer), PL230_XFER_W,(1*4));
- dma_pl230_table->Primary[c].DstEndPointer = DMA_PL230_PTR_END(&(dma_pl230_table->Alternate[c]), PL230_XFER_W,(1*4));
- dma_pl230_table->Primary[c].Control= DMA_PL230_CTRL_DSTFIX(PL230_CTRL_CYCLE_DEV_CHAIN_PRI,PL230_XFER_W,(1*4),PL230_CTRL_RPWR_4);
-
- // enable DMA controller channels
- dma_pl230_init((1<<DMA_CHAN_AES128_OP) | (1<<DMA_CHAN_AES128_IP)); // two active
-
- // and enable DMA requests
- AES128->DRQ_MSK_SET = (AES128_KEY_REQ_BIT | AES128_IP_REQ_BIT | AES128_OP_REQ_BIT);
- AES128->IRQ_MSK_SET = (AES128_ERR_REQ_BIT | AES128_KEY_REQ_BIT | AES128_IP_REQ_BIT | AES128_OP_REQ_BIT);
- // test to ensure output DMA has started
- while (!(dma_pl230_channel_active(1<<DMA_CHAN_AES128_OP)))
- ;
- while (dma_pl230_channel_active(1<<DMA_CHAN_AES128_OP))
- ;
- while (dma_pl230_channel_active(1<<DMA_CHAN_AES128_OP))
- ;
- AES128->DRQ_MSK = 0;
- AES128->IRQ_MSK = 0;
- DMA_PL230_DMAC->DMA_CFG = 0; /* Disable DMA controller for initialization */
- dma_pl230_init(0); // none active
- return;
-}
-
-// wrapper functions
-
-void aes128_alignchk_block_dma(uint8_t *key, uint32_t nbytes, uint8_t *input, uint8_t *result, uint8_t mode)
- { uint32_t dma_max = DMA_PL230_MAX_XFERS; // default to 1 K bytes
- if (((((long)key) & 3)==0) && ((((long)input) & 3)==0) && ((((long)result) & 3)==0)) dma_max=(DMA_PL230_MAX_XFERS<<2);
- while (nbytes >dma_max) {
- if (dma_max == DMA_PL230_MAX_XFERS) // 1K bytes DMA
- aes128_driver_dma8(key, dma_max, input, result, mode);
- else // 1K words DMA
- aes128_driver_aligned_dma32(key, dma_max, input, result, mode);
- nbytes -= dma_max; input += dma_max; result += dma_max;
- }
- if (dma_max == DMA_PL230_MAX_XFERS) // up to 1K bytes remaining
- aes128_driver_dma8(key, nbytes, input, result, mode);
- else // up to 1K words remaining
- aes128_driver_aligned_dma32(key, nbytes, input, result, mode);
- }
-
-void aes128_bypass_dma(uint8_t *key, uint32_t nbytes, uint8_t *input, uint8_t *result)
- { aes128_alignchk_block_dma (key, nbytes, input, result, 0); }
-
-void aes128_encrypt_dma(uint8_t *key, uint32_t nbytes, uint8_t *input, uint8_t *result)
- { aes128_alignchk_block_dma (key, nbytes, input, result, 1); }
-
-void aes128_decrypt_dma(uint8_t *key, uint32_t nbytes, uint8_t *input, uint8_t *result)
- { aes128_alignchk_block_dma (key, nbytes, input, result, 2); }
-
-
-int main(void) {
- char rx_char [256] = "soclabs AES128v1"; // init to 0
- unsigned char id_string [16] = {0};
- int i, fail=0;
- unsigned char * p;
-
- UartStdOutInit();
- printf("%s\n",rx_char);
- printf("AES128 test program\n");
- printf(" AES128 ID: ");
- // iterate over 3 32-bit fields
- p = (unsigned char *)AES128->CORE_NAME;
- for (i = 0; i < 12; i++) {
- id_string[i^3]=*p; // fix byte ordering per word
- p+=1;
- }
- id_string[12] = 0;
- printf("%s\n",id_string);
-
- aes_key_irq_occurred = 0;
- aes_key_irq_expected = 1;
- NVIC_ClearPendingIRQ(EXP0_IRQn);
- NVIC_EnableIRQ(EXP0_IRQn);
- aes_ip_irq_occurred = 0;
- aes_ip_irq_expected = 1;
- NVIC_ClearPendingIRQ(EXP1_IRQn);
- NVIC_EnableIRQ(EXP1_IRQn);
- aes_op_irq_occurred = 0;
- aes_op_irq_expected = 1;
- NVIC_ClearPendingIRQ(EXP2_IRQn);
- NVIC_EnableIRQ(EXP2_IRQn);
- aes_err_irq_occurred = 0;
- aes_err_irq_expected = 1;
- NVIC_ClearPendingIRQ(EXP3_IRQn);
- NVIC_EnableIRQ(EXP3_IRQn);
-
- printf("AES128 SW (memcpy) tests...\n");
- printf(" AES128 reference pattern test\n");
-
- printf(" AES128 input/output bypass test\n");
- aes128_bypass_memcpy(test_key128, sizeof(test_text128), test_text128, buf128);
- fail += aes128_buffer_verify(AES_BLOCK_SIZE, buf128, test_text128);
-
- if (aes_key_irq_occurred != 1){ fail++;
- printf(" ++ AES key request IRQ count = %d\n", aes_key_irq_occurred); }
- if (aes_ip_irq_occurred != 2){ fail++;
- printf(" ++ AES inp request missing: IRQ count = %d\n", aes_ip_irq_occurred); }
- if (aes_op_irq_occurred != 1){ fail++;
- printf(" ++ AES out request missing: IRQ count = %d\n", aes_op_irq_occurred); }
- if (aes_err_irq_occurred != 0){ fail++;
- printf(" ++ AES err request missing: IRQ count = %d\n", aes_err_irq_occurred); }
-
- printf(" AES128 encrypt test\n");
- aes128_encrypt_memcpy(test_key128, sizeof(test_text128), test_text128, buf128);
- fail += aes128_buffer_verify(AES_BLOCK_SIZE, buf128, test_exp128);
-
- printf(" AES128 decrypt test\n");
- aes128_decrypt_memcpy(test_key128, sizeof(buf128), buf128, buf128);
- fail += aes128_buffer_verify(AES_BLOCK_SIZE, buf128, test_text128);
-
- aes_key_irq_occurred = 0;
- aes_ip_irq_occurred = 0;
- aes_op_irq_occurred = 0;
- aes_err_irq_occurred = 0;
-
- printf(" AES128 logic toggle test\n");
- printf(" AES128 input/output pattern test\n");
- aes128_bypass_memcpy(test_key128, sizeof(shift_patt), shift_patt, shift_buf1);
- fail += aes128_buffer_verify(sizeof(shift_patt), shift_buf1, shift_patt);
-
- if (aes_key_irq_occurred != 1){ fail++;
- printf(" ++ AES key request IRQ count = %d\n", aes_key_irq_occurred); }
- if (aes_ip_irq_occurred != (129+1)){ fail++;
- printf(" ++ AES inp request missing: IRQ count = %d\n", aes_ip_irq_occurred); }
- if (aes_op_irq_occurred != 129){ fail++;
- printf(" ++ AES out request missing: IRQ count = %d\n", aes_op_irq_occurred); }
- if (aes_err_irq_occurred != 0){ fail++;
- printf(" ++ AES err request missing: IRQ count = %d\n", aes_err_irq_occurred); }
-
- printf(" AES128 pattern encrypt test\n");
- aes128_encrypt_memcpy(test_key128, sizeof(shift_patt), shift_patt, shift_buf1);
- printf(" AES128 pattern decrypt test\n");
- aes128_decrypt_memcpy(test_key128, sizeof(shift_patt), shift_buf1, shift_buf2);
- fail += aes128_buffer_verify(sizeof(shift_patt), shift_buf2, shift_patt);
-
- printf("AES128 DMA tests...\n");
-
- aes_key_irq_occurred = 0;
- aes_ip_irq_occurred = 0;
- aes_op_irq_occurred = 0;
- aes_err_irq_occurred = 0;
- dma_error_irq_expected = 0;
- dma_error_irq_occurred = 0;
- dma_done_irq_expected = 1;
- dma_done_irq_occurred = 0;
- NVIC_ClearPendingIRQ(DMA_IRQn);
- NVIC_EnableIRQ(DMA_IRQn);
-
- printf(" AES128 dma input/output bypass test\n");
- aes128_bypass_dma(test_key128, sizeof(test_text128), test_text128, buf128);
- fail += aes128_buffer_verify(AES_BLOCK_SIZE, buf128, test_text128);
-
- if (dma_done_irq_occurred < 2){
- puts ("ERROR: DMA err IRQ missing");
- fail++;
- } else
- printf(" ++ DMA_DONE IRQ count = %d\n", dma_done_irq_occurred);
-
- printf(" AES128 dma encrypt test\n");
- aes128_encrypt_dma(test_key128, sizeof(test_text128), test_text128, buf128);
- fail += aes128_buffer_verify(AES_BLOCK_SIZE, buf128, test_exp128);
-
- printf(" AES128 dma decrypt test\n");
- aes128_decrypt_dma(test_key128, sizeof(buf128), buf128, buf128);
- fail += aes128_buffer_verify(AES_BLOCK_SIZE, buf128, test_text128);
-
- if (dma_done_irq_occurred < 6){
- puts ("ERROR: DMA err IRQ missing");
- fail++;
- } else
- printf(" ++ DMA_DONE IRQ count = %d\n", dma_done_irq_occurred);
-
- printf(" AES128 dma unaligned pattern test\n");
- aes128_bypass_dma(test_key128,(16*63), shift_patt, shift_buf1+3);
- fail += aes128_buffer_verify((16*63), shift_buf1+3, shift_patt);
-
- printf(" AES128 dma input/output pattern test\n");
- aes128_bypass_dma(test_key128, sizeof(shift_patt), shift_patt, shift_buf1);
- fail += aes128_buffer_verify(sizeof(shift_patt), shift_buf1, shift_patt);
- printf(" AES128 dma pattern encrypt test\n");
- aes128_encrypt_dma(test_key128, sizeof(shift_patt), shift_patt, shift_buf1);
- printf(" AES128 dma pattern decrypt test\n");
- aes128_decrypt_dma(test_key128, sizeof(shift_patt), shift_buf1, shift_buf2);
- fail += aes128_buffer_verify(sizeof(shift_patt), shift_buf2, shift_patt);
-
- if (dma_done_irq_occurred < (2*7)){
- puts ("ERROR: DMA err IRQ missing");
- fail++;
- } else
- printf(" ++ DMA_DONE IRQ count = %d\n", dma_done_irq_occurred);
-
- // check IRQ masked by DRQs - except when Iinput buffer empty after DMA done
- if (aes_key_irq_occurred != 0){ fail++;
- printf(" ++ AES key request IRQ count = %d\n", aes_key_irq_occurred); }
- if (aes_ip_irq_occurred != 7){ fail++;
- printf(" ++ AES inp request missing: IRQ count = %d\n", aes_ip_irq_occurred); }
- if (aes_op_irq_occurred != 0){ fail++;
- printf(" ++ AES out request missing: IRQ count = %d\n", aes_op_irq_occurred); }
- if (aes_err_irq_occurred != 0){ fail++;
- printf(" ++ AES err request missing: IRQ count = %d\n", aes_err_irq_occurred); }
-
- NVIC_DisableIRQ(DMA_IRQn);
- NVIC_DisableIRQ(EXP0_IRQn);
- NVIC_DisableIRQ(EXP1_IRQn);
- NVIC_DisableIRQ(EXP2_IRQn);
- NVIC_DisableIRQ(EXP3_IRQn);
-
- printf ("Data retrieved from the AES is: %s\n", id_string);
- printf ("Data expected from the AES is: %s\n", rx_char);
- if (fail >0)
- printf("** AES TESTS FAILED (%d) **\n", fail);
- else
- printf("** AES TEST PASSED **\n");
- // End simulation
-
-
- UartEndSimulation();
-
- return 0;
-
-}
-
-/* --------------------------------------------------------------- */
-/* Interrupt handlers */
-/* --------------------------------------------------------------- */
-
-void DMA_Handler(void)
-{
-if ((DMA_PL230_DMAC->ERR_CLR & 1) != 0) {
- /* DMA interrupt is caused by DMA error */
- dma_error_irq_occurred ++;
- DMA_PL230_DMAC->ERR_CLR = 1; /* Clear dma_err */
- if (dma_error_irq_expected==0) {
- puts ("ERROR : Unexpected DMA error interrupt occurred.\n");
- UartEndSimulation();
- while (1);
- }
- }
-else {
- // DMA interrupt is caused by DMA done
- dma_done_irq_occurred ++;
- if (dma_done_irq_expected==0) {
- puts ("ERROR : Unexpected DMA done interrupt occurred.\n");
- UartEndSimulation();
- while (1);
- }
- }
-}
-
-void EXP0_Handler(void)
-{
- // AES128 interrupt is caused by Key buffer empty IRQ
- aes_key_irq_occurred ++;
- AES128->IRQ_MSK_CLR = AES128_KEY_REQ_BIT;
- if (aes_key_irq_expected==0) {
- puts ("ERROR : Unexpected AES128 Key buffer empty request interrupt occurred.\n");
- UartEndSimulation();
- while (1);
- }
-}
-
-void EXP1_Handler(void)
-{
- // AES128 interrupt is caused by Input buffer empty IRQ
- aes_ip_irq_occurred ++;
- AES128->IRQ_MSK_CLR = AES128_IP_REQ_BIT;
- if (aes_ip_irq_expected==0) {
- puts ("ERROR : Unexpected AES128 Input buffer empty reqest interrupt occurred.\n");
- UartEndSimulation();
- while (1);
- }
-}
-
-void EXP2_Handler(void)
-{
- // AES128 interrupt is caused by Output buffer full IRQ
- aes_op_irq_occurred ++;
- AES128->IRQ_MSK_CLR = AES128_OP_REQ_BIT;
- if (aes_op_irq_expected==0) {
- puts ("ERROR : Unexpected AES128 Output buffer full reqest interrupt occurred.\n");
- UartEndSimulation();
- while (1);
- }
-}
-
-void EXP3_Handler(void)
-{
- // AES128 interrupt is caused by Error IRQ
- aes_err_irq_occurred ++;
- AES128->IRQ_MSK_CLR = AES128_ERR_REQ_BIT;
- if (aes_err_irq_expected==0) {
- puts ("ERROR : Unexpected AES128 Error interrupt occurred.\n");
- UartEndSimulation();
- while (1);
- }
-}
-
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/dma_pl230_driver.c b/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/dma_pl230_driver.c
deleted file mode 100644
index 8781465..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/dma_pl230_driver.c
+++ /dev/null
@@ -1,163 +0,0 @@
-#include <stdio.h>
-#include <string.h>
-#include "dma_pl230_driver.h"
-
-#define DEBUG_PRINTF(...) do {} while(0);
-//#define cpu_to_be32(__x) __x
-//#define be32_to_cpu(__x) __x
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-static int g_dma_pl230_initialised = 0;
-
-static dma_pl230_data_structure priv_dma __attribute__((aligned(256)));
-//
-dma_pl230_data_structure *dma_pl230_table = &priv_dma;
-
-/* --------------------------------------------------------------- */
-/* Initialize DMA data structure */
-/* --------------------------------------------------------------- */
-void dma_pl230_data_struct_init(void)
-{
- int i; /* loop counter */
-
-// printf ("dma structure block address = %x\n", dma_pl230_table);
- for (i=0; i<MAX_NUM_OF_DMA_CHANNELS; i++) {
- dma_pl230_table->Primary[i].SrcEndPointer = 0;
- dma_pl230_table->Primary[i].DstEndPointer = 0;
- dma_pl230_table->Primary[i].Control = 0;
- dma_pl230_table->Alternate[i].SrcEndPointer = 0;
- dma_pl230_table->Alternate[i].DstEndPointer = 0;
- dma_pl230_table->Alternate[i].Control = 0;
- }
- g_dma_pl230_initialised = 1;
- return;
-}
-
-void dma_pl230_data_struct_init_dbg(void)
-{
- int i; /* loop counter */
- unsigned int ptr;
-
- int ch_num; /* number of channels */
- unsigned int blksize; /* Size of DMA data structure in bytes */
- unsigned int blkmask; /* address mask */
-
-
- ch_num = (((DMA_PL230_DMAC->DMA_STATUS) >> 16) & 0x1F)+1;
- blksize = ch_num * 32;
- if (ch_num > 16) blkmask = 0x3FF; /* 17 to 32 */
- else if (ch_num > 8) blkmask = 0x1FF; /* 9 to 16 */
- else if (ch_num > 4) blkmask = 0x0FF; /* 5 to 8 */
- else if (ch_num > 2) blkmask = 0x07F; /* 3 to 4 */
- else if (ch_num > 1) blkmask = 0x03F; /* 2 */
- else blkmask = 0x01F; /* 1 */
-
-
- /* Create DMA data structure in RAM after stack
- In the linker script, a 1KB memory stack above stack is reserved
- so we can use this space for putting the DMA data structure.
- */
-
-// ptr = HW32_REG(0); /* Read Top of Stack */
- ptr = (0x80000000); // force for now as no reserved RAM available
-
- /* the DMA data structure must be aligned to the size of the data structure */
- if ((ptr & blkmask) != 0x0)
- ptr = (ptr + blksize) & ~blkmask;
-
-/// if ((ptr + blksize) > (RAM_ADDRESS_MAX + 1)) {
-/// puts ("ERROR : Not enough RAM space for DMA data structure.");
-/// UartEndSimulation();
-/// }
-
- /* Set pointer to the reserved space */
- dma_pl230_table = (dma_pl230_data_structure *) ptr;
- ptr = (unsigned long) &(dma_pl230_table->Primary[0].SrcEndPointer);
-
- printf ("dma structure block address = %x\n", ptr);
-
- for (i=0; i<MAX_NUM_OF_DMA_CHANNELS; i++) {
- dma_pl230_table->Primary[i].SrcEndPointer = 0;
- dma_pl230_table->Primary[i].DstEndPointer = 0;
- dma_pl230_table->Primary[i].Control = 0;
- dma_pl230_table->Alternate[i].SrcEndPointer = 0;
- dma_pl230_table->Alternate[i].DstEndPointer = 0;
- dma_pl230_table->Alternate[i].Control = 0;
- }
- g_dma_pl230_initialised = 1;
- return;
-}
-/* --------------------------------------------------------------- */
-/* Initialize DMA PL230 */
-/* --------------------------------------------------------------- */
-void dma_pl230_init_dbg(unsigned int chan_mask)
-{
- unsigned int current_state;
- puts ("Initialize PL230");
- current_state = DMA_PL230_DMAC->DMA_STATUS;
- printf ("- # of channels allowed : %d\n",(((current_state) >> 16) & 0x1F)+1);
- /* Debugging printfs: */
- printf ("- Current status : %x\n",(((current_state) >> 4) & 0xF));
- printf ("- Current master enable : %x\n",(((current_state) >> 0) & 0x1));
-
- /* Wait until current DMA complete */
- current_state = (DMA_PL230_DMAC->DMA_STATUS >> 4) & 0xF;
- if (!((current_state==0) || (current_state==0x8) || (current_state==0x9))) {
- puts ("- wait for DMA IDLE/STALLED/DONE");
- current_state = (DMA_PL230_DMAC->DMA_STATUS >> 4) & 0xF;
- printf ("- Current status : %x\n",(((current_state) >> 4) & 0xF));
-
- }
- while (!((current_state==0) || (current_state==0x8) || (current_state==0x9))){
- /* Wait if not IDLE/STALLED/DONE */
- current_state = (DMA_PL230_DMAC->DMA_STATUS >> 4) & 0xF;
- printf ("- Current status : %x\n",(((current_state) >> 4) & 0xF));
- }
- DMA_PL230_DMAC->DMA_CFG = 0; /* Disable DMA controller for initialization */
- DMA_PL230_DMAC->CTRL_BASE_PTR = (unsigned long) &(dma_pl230_table->Primary->SrcEndPointer);
- /* Set DMA data structure address */
- DMA_PL230_DMAC->CHNL_ENABLE_CLR = 0xFFFFFFFF; /* Disable all channels */
- DMA_PL230_DMAC->CHNL_PRI_ALT_CLR = ((1<<MAX_NUM_OF_DMA_CHANNELS)-1); /* Disable all alt channels */
- DMA_PL230_DMAC->CHNL_ENABLE_SET = (chan_mask & ((1<<MAX_NUM_OF_DMA_CHANNELS)-1)); /* Enable channel */
- DMA_PL230_DMAC->CHNL_USEBURST_SET = (chan_mask & ((1<<MAX_NUM_OF_DMA_CHANNELS)-1)); /* Enable bursts */
- if (chan_mask)
- DMA_PL230_DMAC->DMA_CFG = 1; /* Enable DMA controller if enabled channel*/
- return;
-}
-
-void dma_pl230_init(unsigned int chan_mask)
-{
- unsigned int current_state;
- if (g_dma_pl230_initialised ==0)
- dma_pl230_data_struct_init();
- /* Wait until current DMA complete */
- current_state = (DMA_PL230_DMAC->DMA_STATUS >> 4) & 0xF;
- while (!((current_state==0) || (current_state==0x8) || (current_state==0x9))){
- /* Wait if not IDLE/STALLED/DONE */
- puts ("- wait for DMA IDLE/STALLED/DONE");
- current_state = (DMA_PL230_DMAC->DMA_STATUS >> 4) & 0xF;
- }
- DMA_PL230_DMAC->DMA_CFG = 0; /* Disable DMA controller for initialization */
- DMA_PL230_DMAC->CTRL_BASE_PTR = (unsigned long) &(dma_pl230_table->Primary->SrcEndPointer);
- /* Set DMA data structure address */
- DMA_PL230_DMAC->CHNL_ENABLE_CLR = ((1<<MAX_NUM_OF_DMA_CHANNELS)-1); /* Disable all channels */
- DMA_PL230_DMAC->CHNL_PRI_ALT_CLR = ((1<<MAX_NUM_OF_DMA_CHANNELS)-1); /* Disable all alt channels */
- DMA_PL230_DMAC->CHNL_ENABLE_SET = (chan_mask & ((1<<MAX_NUM_OF_DMA_CHANNELS)-1)); /* Enable channel */
- DMA_PL230_DMAC->CHNL_USEBURST_SET = (chan_mask & ((1<<MAX_NUM_OF_DMA_CHANNELS)-1)); /* Enable bursts */
- g_dma_pl230_initialised = 2;
- if (chan_mask)
- DMA_PL230_DMAC->DMA_CFG = 1; /* Enable DMA controller if enabled channel*/
- return;
-}
-
-unsigned int dma_pl230_channel_active(unsigned int chan_mask)
-{
- return(DMA_PL230_DMAC->CHNL_ENABLE_SET & chan_mask & ((1<<MAX_NUM_OF_DMA_CHANNELS)-1)); /* Enabled channels */
-}
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/dma_pl230_driver.h b/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/dma_pl230_driver.h
deleted file mode 100644
index 082b196..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/dma_pl230_driver.h
+++ /dev/null
@@ -1,198 +0,0 @@
-#ifndef __DMA_PL230_MCU_H
-#define __DMA_PL230_MCU_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-#include "CMSDK_CM0.h"
-
-#define DMA_PL230_BASE (CMSDK_APB_BASE + 0xF000UL)
-
-#define MAX_NUM_OF_DMA_CHANNELS 2
-
-/*------------- PL230 uDMA (PL230) --------------------------------------*/
-/** @addtogroup DMA_PL230 CMSDK uDMA controller
- @{
-*/
-typedef struct
-{
- __I uint32_t DMA_STATUS; /*!< Offset: 0x000 DMA status Register (R/W) */
- __O uint32_t DMA_CFG; /*!< Offset: 0x004 DMA configuration Register ( /W) */
- __IO uint32_t CTRL_BASE_PTR; /*!< Offset: 0x008 Channel Control Data Base Pointer Register (R/W) */
- __I uint32_t ALT_CTRL_BASE_PTR; /*!< Offset: 0x00C Channel Alternate Control Data Base Pointer Register (R/ ) */
- __I uint32_t DMA_WAITONREQ_STATUS; /*!< Offset: 0x010 Channel Wait On Request Status Register (R/ ) */
- __O uint32_t CHNL_SW_REQUEST; /*!< Offset: 0x014 Channel Software Request Register ( /W) */
- __IO uint32_t CHNL_USEBURST_SET; /*!< Offset: 0x018 Channel UseBurst Set Register (R/W) */
- __O uint32_t CHNL_USEBURST_CLR; /*!< Offset: 0x01C Channel UseBurst Clear Register ( /W) */
- __IO uint32_t CHNL_REQ_MASK_SET; /*!< Offset: 0x020 Channel Request Mask Set Register (R/W) */
- __O uint32_t CHNL_REQ_MASK_CLR; /*!< Offset: 0x024 Channel Request Mask Clear Register ( /W) */
- __IO uint32_t CHNL_ENABLE_SET; /*!< Offset: 0x028 Channel Enable Set Register (R/W) */
- __O uint32_t CHNL_ENABLE_CLR; /*!< Offset: 0x02C Channel Enable Clear Register ( /W) */
- __IO uint32_t CHNL_PRI_ALT_SET; /*!< Offset: 0x030 Channel Primary-Alterante Set Register (R/W) */
- __O uint32_t CHNL_PRI_ALT_CLR; /*!< Offset: 0x034 Channel Primary-Alterante Clear Register ( /W) */
- __IO uint32_t CHNL_PRIORITY_SET; /*!< Offset: 0x038 Channel Priority Set Register (R/W) */
- __O uint32_t CHNL_PRIORITY_CLR; /*!< Offset: 0x03C Channel Priority Clear Register ( /W) */
- uint32_t RESERVED0[3];
- __IO uint32_t ERR_CLR; /*!< Offset: 0x04C Bus Error Clear Register (R/W) */
-
-} DMA_PL230_TypeDef;
-
-#define PL230_DMA_CHNL_BITS 0
-
-#define DMA_PL230_DMA_STATUS_MSTREN_Pos 0 /*!< DMA_PL230 DMA STATUS: MSTREN Position */
-#define DMA_PL230_DMA_STATUS_MSTREN_Msk (0x00000001ul << DMA_PL230_DMA_STATUS_MSTREN_Pos) /*!< DMA_PL230 DMA STATUS: MSTREN Mask */
-
-#define DMA_PL230_DMA_STATUS_STATE_Pos 0 /*!< DMA_PL230 DMA STATUS: STATE Position */
-#define DMA_PL230_DMA_STATUS_STATE_Msk (0x0000000Ful << DMA_PL230_DMA_STATUS_STATE_Pos) /*!< DMA_PL230 DMA STATUS: STATE Mask */
-
-#define DMA_PL230_DMA_STATUS_CHNLS_MINUS1_Pos 0 /*!< DMA_PL230 DMA STATUS: CHNLS_MINUS1 Position */
-#define DMA_PL230_DMA_STATUS_CHNLS_MINUS1_Msk (0x0000001Ful << DMA_PL230_DMA_STATUS_CHNLS_MINUS1_Pos) /*!< DMA_PL230 DMA STATUS: CHNLS_MINUS1 Mask */
-
-#define DMA_PL230_DMA_STATUS_TEST_STATUS_Pos 0 /*!< DMA_PL230 DMA STATUS: TEST_STATUS Position */
-#define DMA_PL230_DMA_STATUS_TEST_STATUS_Msk (0x00000001ul << DMA_PL230_DMA_STATUS_TEST_STATUS_Pos) /*!< DMA_PL230 DMA STATUS: TEST_STATUS Mask */
-
-#define DMA_PL230_DMA_CFG_MSTREN_Pos 0 /*!< DMA_PL230 DMA CFG: MSTREN Position */
-#define DMA_PL230_DMA_CFG_MSTREN_Msk (0x00000001ul << DMA_PL230_DMA_CFG_MSTREN_Pos) /*!< DMA_PL230 DMA CFG: MSTREN Mask */
-
-#define DMA_PL230_DMA_CFG_CPCCACHE_Pos 2 /*!< DMA_PL230 DMA CFG: CPCCACHE Position */
-#define DMA_PL230_DMA_CFG_CPCCACHE_Msk (0x00000001ul << DMA_PL230_DMA_CFG_CPCCACHE_Pos) /*!< DMA_PL230 DMA CFG: CPCCACHE Mask */
-
-#define DMA_PL230_DMA_CFG_CPCBUF_Pos 1 /*!< DMA_PL230 DMA CFG: CPCBUF Position */
-#define DMA_PL230_DMA_CFG_CPCBUF_Msk (0x00000001ul << DMA_PL230_DMA_CFG_CPCBUF_Pos) /*!< DMA_PL230 DMA CFG: CPCBUF Mask */
-
-#define DMA_PL230_DMA_CFG_CPCPRIV_Pos 0 /*!< DMA_PL230 DMA CFG: CPCPRIV Position */
-#define DMA_PL230_DMA_CFG_CPCPRIV_Msk (0x00000001ul << DMA_PL230_DMA_CFG_CPCPRIV_Pos) /*!< DMA_PL230 DMA CFG: CPCPRIV Mask */
-
-#define DMA_PL230_CTRL_BASE_PTR_Pos PL230_DMA_CHNL_BITS + 5 /*!< DMA_PL230 STATUS: BASE_PTR Position */
-#define DMA_PL230_CTRL_BASE_PTR_Msk (0x0FFFFFFFul << DMA_PL230_CTRL_BASE_PTR_Pos) /*!< DMA_PL230 STATUS: BASE_PTR Mask */
-
-#define DMA_PL230_ALT_CTRL_BASE_PTR_Pos 0 /*!< DMA_PL230 STATUS: MSTREN Position */
-#define DMA_PL230_ALT_CTRL_BASE_PTR_Msk (0xFFFFFFFFul << DMA_PL230_ALT_CTRL_BASE_PTR_Pos) /*!< DMA_PL230 STATUS: MSTREN Mask */
-
-#define DMA_PL230_DMA_WAITONREQ_STATUS_Pos 0 /*!< DMA_PL230 DMA_WAITONREQ_STATUS: DMA_WAITONREQ_STATUS Position */
-#define DMA_PL230_DMA_WAITONREQ_STATUS_Msk (0xFFFFFFFFul << DMA_PL230_DMA_WAITONREQ_STATUS_Pos) /*!< DMA_PL230 DMA_WAITONREQ_STATUS: DMA_WAITONREQ_STATUS Mask */
-
-#define DMA_PL230_CHNL_SW_REQUEST_Pos 0 /*!< DMA_PL230 CHNL_SW_REQUEST: CHNL_SW_REQUEST Position */
-#define DMA_PL230_CHNL_SW_REQUEST_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_SW_REQUEST_Pos) /*!< DMA_PL230 CHNL_SW_REQUEST: CHNL_SW_REQUEST Mask */
-
-#define DMA_PL230_CHNL_USEBURST_SET_Pos 0 /*!< DMA_PL230 CHNL_USEBURST: SET Position */
-#define DMA_PL230_CHNL_USEBURST_SET_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_USEBURST_SET_Pos) /*!< DMA_PL230 CHNL_USEBURST: SET Mask */
-
-#define DMA_PL230_CHNL_USEBURST_CLR_Pos 0 /*!< DMA_PL230 CHNL_USEBURST: CLR Position */
-#define DMA_PL230_CHNL_USEBURST_CLR_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_USEBURST_CLR_Pos) /*!< DMA_PL230 CHNL_USEBURST: CLR Mask */
-
-#define DMA_PL230_CHNL_REQ_MASK_SET_Pos 0 /*!< DMA_PL230 CHNL_REQ_MASK: SET Position */
-#define DMA_PL230_CHNL_REQ_MASK_SET_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_REQ_MASK_SET_Pos) /*!< DMA_PL230 CHNL_REQ_MASK: SET Mask */
-
-#define DMA_PL230_CHNL_REQ_MASK_CLR_Pos 0 /*!< DMA_PL230 CHNL_REQ_MASK: CLR Position */
-#define DMA_PL230_CHNL_REQ_MASK_CLR_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_REQ_MASK_CLR_Pos) /*!< DMA_PL230 CHNL_REQ_MASK: CLR Mask */
-
-#define DMA_PL230_CHNL_ENABLE_SET_Pos 0 /*!< DMA_PL230 CHNL_ENABLE: SET Position */
-#define DMA_PL230_CHNL_ENABLE_SET_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_ENABLE_SET_Pos) /*!< DMA_PL230 CHNL_ENABLE: SET Mask */
-
-#define DMA_PL230_CHNL_ENABLE_CLR_Pos 0 /*!< DMA_PL230 CHNL_ENABLE: CLR Position */
-#define DMA_PL230_CHNL_ENABLE_CLR_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_ENABLE_CLR_Pos) /*!< DMA_PL230 CHNL_ENABLE: CLR Mask */
-
-#define DMA_PL230_CHNL_PRI_ALT_SET_Pos 0 /*!< DMA_PL230 CHNL_PRI_ALT: SET Position */
-#define DMA_PL230_CHNL_PRI_ALT_SET_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_PRI_ALT_SET_Pos) /*!< DMA_PL230 CHNL_PRI_ALT: SET Mask */
-
-#define DMA_PL230_CHNL_PRI_ALT_CLR_Pos 0 /*!< DMA_PL230 CHNL_PRI_ALT: CLR Position */
-#define DMA_PL230_CHNL_PRI_ALT_CLR_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_PRI_ALT_CLR_Pos) /*!< DMA_PL230 CHNL_PRI_ALT: CLR Mask */
-
-#define DMA_PL230_CHNL_PRIORITY_SET_Pos 0 /*!< DMA_PL230 CHNL_PRIORITY: SET Position */
-#define DMA_PL230_CHNL_PRIORITY_SET_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_PRIORITY_SET_Pos) /*!< DMA_PL230 CHNL_PRIORITY: SET Mask */
-
-#define DMA_PL230_CHNL_PRIORITY_CLR_Pos 0 /*!< DMA_PL230 CHNL_PRIORITY: CLR Position */
-#define DMA_PL230_CHNL_PRIORITY_CLR_Msk (0xFFFFFFFFul << DMA_PL230_CHNL_PRIORITY_CLR_Pos) /*!< DMA_PL230 CHNL_PRIORITY: CLR Mask */
-
-#define DMA_PL230_ERR_CLR_Pos 0 /*!< DMA_PL230 ERR: CLR Position */
-#define DMA_PL230_ERR_CLR_Msk (0x00000001ul << DMA_PL230_ERR_CLR_Pos) /*!< DMA_PL230 ERR: CLR Mask */
-
-
-#define HW32_REG(ADDRESS) (*((volatile unsigned long *)(ADDRESS)))
-
- /* Maximum to 32 DMA channel */
- /* SRAM in example system is 64K bytes */
-#define RAM_ADDRESS_MAX 0x80001fff
-
-typedef struct /* 4 words */
-{
- volatile unsigned char* SrcEndPointer;
- volatile unsigned char* DstEndPointer;
- volatile unsigned long Control;
- volatile unsigned long unused;
-} dma_pl230_channel_data;
-
-
-typedef struct /* 8 words per channel */
-{ /* was one channel in the example uDMA setup */
- volatile dma_pl230_channel_data Primary[MAX_NUM_OF_DMA_CHANNELS];
- volatile dma_pl230_channel_data Alternate[MAX_NUM_OF_DMA_CHANNELS];
-} dma_pl230_data_structure;
-
-
-extern dma_pl230_data_structure *dma_pl230_table;
-
-#define DMA_PL230_DMAC ((DMA_PL230_TypeDef *) DMA_PL230_BASE)
-
-#define DMA_PL230_PTR_END(__ptr, __siz, __num) \
- ((unsigned char *) __ptr + ((1<<__siz)*(__num-1)))
-
-#define DMA_PL230_CTRL(__cyc, __siz, __num, __rpwr) \
- (((unsigned long) __siz << 30)|(__siz << 28)|(__siz << 26)|(__siz << 24)| \
- (1 << 21)|(1 << 18)|(__rpwr << 14)|(((__num-1)&0x3ff)<<4)| \
- (1 << 3)|(__cyc << 0) )
-
-#define DMA_PL230_CTRL_SRCFIX(__cyc, __siz, __num, __rpwr) \
- (((unsigned long) __siz << 30)|(__siz << 28)|(0x0c000000UL)|(__siz << 24)| \
- (1 << 21)|(1 << 18)|(__rpwr << 14)|(((__num-1)&0x3ff)<<4)| \
- (1 << 3)|(__cyc << 0) )
-
-#define DMA_PL230_CTRL_DSTFIX(__cyc, __siz, __num, __rpwr) \
- ((0xc0000000UL)|(__siz << 28)|(__siz << 26)|(__siz << 24)| \
- (1 << 21)|(1 << 18)|(__rpwr << 14)|(((__num-1)&0x3ff)<<4)| \
- (1 << 3)|(__cyc << 0) )
-
-#define DMA_PL230_MAX_XFERS (0x400)
-
-#define PL230_CTRL_CYCLE_STOP 0
-#define PL230_CTRL_CYCLE_BASIC 1
-#define PL230_CTRL_CYCLE_AUTO 2
-#define PL230_CTRL_CYCLE_PPONG 3
-#define PL230_CTRL_CYCLE_MEM_CHAIN_PRI 4
-#define PL230_CTRL_CYCLE_MEM_CHAIN_ALT 5
-#define PL230_CTRL_CYCLE_DEV_CHAIN_PRI 6
-#define PL230_CTRL_CYCLE_DEV_CHAIN_ALT 7
-
-#define PL230_CTRL_RPWR_1 0
-#define PL230_CTRL_RPWR_2 1
-#define PL230_CTRL_RPWR_4 2
-#define PL230_CTRL_RPWR_8 3
-#define PL230_CTRL_RPWR_16 4
-
-#define PL230_XFER_B 0
-#define PL230_XFER_H 1
-#define PL230_XFER_W 2
-
-/* --------------------------------------------------------------- */
-/* Initialize DMA data structure */
-/* --------------------------------------------------------------- */
-void dma_pl230_data_struct_init(void);
-
-/* --------------------------------------------------------------- */
-/* Initialize DMA PL230 */
-/* --------------------------------------------------------------- */
-void dma_pl230_init_dbg(unsigned int chan_mask);
-void dma_pl230_init(unsigned int chan_mask);
-
-/* --------------------------------------------------------------- */
-/* Check DMA PL230 DMA channel(s) active (return 0 when finishes) */
-/* --------------------------------------------------------------- */
-unsigned int dma_pl230_channel_active(unsigned int chan_mask);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __DMA_PL230_MCU_H */
-
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/makefile
deleted file mode 100644
index 4467920..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/aes128_tests/makefile
+++ /dev/null
@@ -1,262 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
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-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
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deleted file mode 100644
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deleted file mode 100644
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/apb_mux_tests/apb_mux_tests_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/apb_mux_tests/apb_mux_tests_cm0p.uvopt
deleted file mode 100644
index e735ca8..0000000
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deleted file mode 100644
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- <AdsLsxf>1</AdsLsxf>
- <RvctClst>0</RvctClst>
- <GenPPlst>0</GenPPlst>
- <AdsCpuType>"Cortex-M0+"</AdsCpuType>
- <RvctDeviceName></RvctDeviceName>
- <mOS>0</mOS>
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- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT10>
- </OnChipMemories>
- <RvctStartVector></RvctStartVector>
- </ArmAdsMisc>
- <Cads>
- <interw>1</interw>
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- </VariousControls>
- </Cads>
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- </TargetArmAds>
- </TargetOption>
- <Groups>
- <Group>
- <GroupName>Startup</GroupName>
- <Files>
- <File>
- <FileName>startup_CMSDK_CM0plus.s</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
- </Files>
- </Group>
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- <GroupName>Application</GroupName>
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- </File>
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- <GroupName>System</GroupName>
- <Files>
- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/apb_mux_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/apb_mux_tests/makefile
deleted file mode 100644
index dd1c491..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/apb_mux_tests/makefile
+++ /dev/null
@@ -1,251 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = apb_mux_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# D5-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget $(USER_DEFINE)
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
- armlink $(ARM_LINK_OPTIONS) -o $@ $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-$(TESTNAME).lst : $(TESTNAME).ELF makefile
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c \
- $(SOFTWARE_DIR)/common/retarget/retarget.c \
- $(SOFTWARE_DIR)/common/retarget/uart_stdout.c \
- $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget \
- -L $(LINKER_SCRIPT_PATH) \
- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-
-clean :
- @rm -rf *.o
- @if [ -e $(TESTNAME).hex ] ; then \
- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
- fi
- @if [ -e $(TESTNAME).ELF ] ; then \
- rm -rf $(TESTNAME).ELF ; \
- fi
- @if [ -e $(TESTNAME).bin ] ; then \
- rm -rf $(TESTNAME).bin ; \
- fi
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
- @rm -rf *.d
- @rm -rf *.lnp
- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
- @rm -rf *._ia
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/bootloader_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/bootloader_cm0.uvopt
deleted file mode 100644
index 54e406f..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/bootloader_cm0.uvopt
+++ /dev/null
@@ -1,229 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/bootloader_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/bootloader_cm0.uvproj
deleted file mode 100644
index cadb326..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/bootloader_cm0.uvproj
+++ /dev/null
@@ -1,425 +0,0 @@
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deleted file mode 100644
index d7a2948..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/bootloader_cm0p.uvopt
+++ /dev/null
@@ -1,216 +0,0 @@
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deleted file mode 100644
index ba95d12..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/bootloader_cm0p.uvproj
+++ /dev/null
@@ -1,422 +0,0 @@
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- <RepFail>1</RepFail>
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- <TextAddressRange>0x00000000</TextAddressRange>
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- <ScatterFile></ScatterFile>
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- <Misc></Misc>
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- </LDads>
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- <Groups>
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- </File>
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- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/makefile
deleted file mode 100644
index c62e321..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/bootloader/makefile
+++ /dev/null
@@ -1,254 +0,0 @@
-#//-----------------------------------------------------------------------------
-#// customised Cortex-M0 'nanosoc' controller
-#// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-#//
-#// Contributors
-#//
-#// David Flynn (d.w.flynn@soton.ac.uk)
-#//
-#// Copyright � 2021-3, SoC Labs (www.soclabs.org)
-#//-----------------------------------------------------------------------------
-
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-BOOTLOADER = bootloader
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime -I $(DEVICE_DIR)/Include -I $(CORE_DIR) $(USER_DEFINE)
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x10000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_bootloader.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-all_ds5 : $(BOOTLOADER).hex $(BOOTLOADER).lst
-
-$(BOOTLOADER).o : $(SOFTWARE_DIR)/common/bootloader/$(BOOTLOADER).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(BOOTLOADER).ELF : $(BOOTLOADER).o $(SYSTEM_FILE).o $(STARTUP_FILE).o $(DEPS_LIST)
- armlink $(ARM_LINK_OPTIONS) $(BOOTLOADER).o $(SYSTEM_FILE).o $(STARTUP_FILE).o -o $@
-
-$(BOOTLOADER).hex : $(BOOTLOADER).ELF $(DEPS_LIST)
- fromelf --vhx --8x1 $< --output $@
-
-$(BOOTLOADER).lst : $(BOOTLOADER).ELF $(DEPS_LIST)
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(SOFTWARE_DIR)/common/bootloader/$(BOOTLOADER).c \
- $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -L $(LINKER_SCRIPT_PATH) \
- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(BOOTLOADER).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(BOOTLOADER).o > $(BOOTLOADER).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(BOOTLOADER).o -O binary $(BOOTLOADER).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(BOOTLOADER).o --adjust-vma -0x10000000 -O verilog $(BOOTLOADER).hex
-
-# Note:
-# Objcopy use --adjust-vma so that the Verilog hex address start at address 0 instead of actual address 0x10000000
-#
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(BOOTLOADER).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(BOOTLOADER).bin > $(BOOTLOADER).hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-clean :
- @rm -rf *.o
- @if [ -e $(BOOTLOADER).hex ] ; then \
- rm -rf $(BOOTLOADER).hex ; \
- fi
- @if [ -e $(BOOTLOADER).lst ] ; then \
- rm -rf $(BOOTLOADER).lst ; \
- fi
- @if [ -e $(BOOTLOADER).ELF ] ; then \
- rm -rf $(BOOTLOADER).ELF ; \
- fi
- @if [ -e $(BOOTLOADER).bin ] ; then \
- rm -rf $(BOOTLOADER).bin ; \
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- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
- @rm -rf *._ia
-
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0.uvopt
deleted file mode 100644
index c834b4c..0000000
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+++ /dev/null
@@ -1,293 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0.uvproj
deleted file mode 100644
index 4571bb5..0000000
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+++ /dev/null
@@ -1,445 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0p.uvopt
deleted file mode 100644
index 80d160b..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0p.uvopt
+++ /dev/null
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0p.uvproj
deleted file mode 100644
index ab2bfbb..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/debug_tests_cm0p.uvproj
+++ /dev/null
@@ -1,442 +0,0 @@
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- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>Application</GroupName>
- <Files>
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- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\debug_tests\debug_tests.c</FilePath>
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- <FileName>mcu_debugtester_interface.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\generic\mcu_debugtester_interface.c</FilePath>
- </File>
- </Files>
- </Group>
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- <GroupName>System</GroupName>
- <Files>
- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- <File>
- <FileName>CMSDK_driver.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\CMSDK_driver.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/makefile
deleted file mode 100644
index 1c0d5f1..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/debug_tests/makefile
+++ /dev/null
@@ -1,265 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2010-08-06 12:28:21 +0100 (Fri, 06 Aug 2010) $
-#
-# Revision : $Revision: 145378 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-GENERIC_DIR = ../generic
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = debug_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# Configuration ID values
-GENERIC_FILE = $(GENERIC_DIR)/config_id.h
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) -I $(GENERIC_DIR) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget \
- -I $(SOFTWARE_DIR)/debug_tester
-ARM_ASM_OPTIONS = -g
-
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/default_slaves_tests/default_slaves_tests_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/default_slaves_tests/default_slaves_tests_cm0.uvopt
deleted file mode 100644
index cd7bd16..0000000
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+++ /dev/null
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/default_slaves_tests/default_slaves_tests_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/default_slaves_tests/default_slaves_tests_cm0.uvproj
deleted file mode 100644
index dc2614c..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/default_slaves_tests/default_slaves_tests_cm0.uvproj
+++ /dev/null
@@ -1,435 +0,0 @@
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- <Type>0</Type>
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- </OCR_RVCT8>
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- <Type>0</Type>
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- <Type>0</Type>
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- <Size>0x0</Size>
- </OCR_RVCT10>
- </OnChipMemories>
- <RvctStartVector></RvctStartVector>
- </ArmAdsMisc>
- <Cads>
- <interw>1</interw>
- <Optim>3</Optim>
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- </VariousControls>
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- <LinkerInputFile></LinkerInputFile>
- <DisabledWarnings></DisabledWarnings>
- </LDads>
- </TargetArmAds>
- </TargetOption>
- <Groups>
- <Group>
- <GroupName>Startup</GroupName>
- <Files>
- <File>
- <FileName>startup_CMSDK_CM0plus.s</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
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- <FilePath>..\..\..\..\software\common\retarget\uart_stdout.c</FilePath>
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- <FilePath>..\..\..\..\software\common\retarget\retarget.c</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>System</GroupName>
- <Files>
- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/default_slaves_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/default_slaves_tests/makefile
deleted file mode 100644
index 2437c5c..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/default_slaves_tests/makefile
+++ /dev/null
@@ -1,251 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = default_slaves_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
- armlink $(ARM_LINK_OPTIONS) -o $@ $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-$(TESTNAME).lst : $(TESTNAME).ELF makefile
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c \
- $(SOFTWARE_DIR)/common/retarget/retarget.c \
- $(SOFTWARE_DIR)/common/retarget/uart_stdout.c \
- $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget \
- -L $(LINKER_SCRIPT_PATH) \
- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-
-clean :
- @rm -rf *.o
- @if [ -e $(TESTNAME).hex ] ; then \
- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
- fi
- @if [ -e $(TESTNAME).ELF ] ; then \
- rm -rf $(TESTNAME).ELF ; \
- fi
- @if [ -e $(TESTNAME).bin ] ; then \
- rm -rf $(TESTNAME).bin ; \
- fi
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
- @rm -rf *.d
- @rm -rf *.lnp
- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
- @rm -rf *._ia
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0.uvopt
deleted file mode 100644
index 41e4c6c..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0.uvopt
+++ /dev/null
@@ -1,277 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
-
- <SchemaVersion>1.0</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Extensions>
- <cExt>*.c</cExt>
- <aExt>*.s*; *.src; *.a*</aExt>
- <oExt>*.obj</oExt>
- <lExt>*.lib</lExt>
- <tExt>*.txt; *.h; *.inc</tExt>
- <pExt>*.plm</pExt>
- <CppX>*.cpp</CppX>
- </Extensions>
-
- <DaveTm>
- <dwLowDateTime>0</dwLowDateTime>
- <dwHighDateTime>0</dwHighDateTime>
- </DaveTm>
-
- <Target>
- <TargetName>Debug</TargetName>
- <ToolsetNumber>0x4</ToolsetNumber>
- <ToolsetName>ARM-ADS</ToolsetName>
- <TargetOption>
- <CLKADS>50000000</CLKADS>
- <OPTTT>
- <gFlags>1</gFlags>
- <BeepAtEnd>1</BeepAtEnd>
- <RunSim>1</RunSim>
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- <OPTHX>
- <HexSelection>1</HexSelection>
- <FlashByte>65535</FlashByte>
- <HexRangeLowAddress>0</HexRangeLowAddress>
- <HexRangeHighAddress>0</HexRangeHighAddress>
- <HexOffset>0</HexOffset>
- </OPTHX>
- <OPTLEX>
- <PageWidth>79</PageWidth>
- <PageLength>66</PageLength>
- <TabStop>8</TabStop>
- <ListingPath>.\</ListingPath>
- </OPTLEX>
- <ListingPage>
- <CreateCListing>1</CreateCListing>
- <CreateAListing>1</CreateAListing>
- <CreateLListing>1</CreateLListing>
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- <CpuCode>255</CpuCode>
- <DllOpt>
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- <SimDllArguments></SimDllArguments>
- <SimDlgDllName>DARMCM1.DLL</SimDlgDllName>
- <SimDlgDllArguments></SimDlgDllArguments>
- <TargetDllName>SARMCM3.DLL</TargetDllName>
- <TargetDllArguments></TargetDllArguments>
- <TargetDlgDllName>TARMCM1.DLL</TargetDlgDllName>
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0.uvproj
deleted file mode 100644
index ecbc35d..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0.uvproj
+++ /dev/null
@@ -1,440 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0p.uvopt
deleted file mode 100644
index 0eea87d..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0p.uvopt
+++ /dev/null
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0p.uvproj
deleted file mode 100644
index b5b42b1..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/dhry_cm0p.uvproj
+++ /dev/null
@@ -1,437 +0,0 @@
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- <VariousControls>
- <MiscControls></MiscControls>
- <Define></Define>
- <Undefine></Undefine>
- <IncludePath></IncludePath>
- </VariousControls>
- </Aads>
- <LDads>
- <umfTarg>1</umfTarg>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <noStLib>0</noStLib>
- <RepFail>1</RepFail>
- <useFile>0</useFile>
- <TextAddressRange>0x00000000</TextAddressRange>
- <DataAddressRange>0x00000000</DataAddressRange>
- <ScatterFile></ScatterFile>
- <IncludeLibs></IncludeLibs>
- <IncludeLibsPath></IncludeLibsPath>
- <Misc></Misc>
- <LinkerInputFile></LinkerInputFile>
- <DisabledWarnings></DisabledWarnings>
- </LDads>
- </TargetArmAds>
- </TargetOption>
- <Groups>
- <Group>
- <GroupName>Startup</GroupName>
- <Files>
- <File>
- <FileName>startup_CMSDK_CM0plus.s</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>Application</GroupName>
- <Files>
- <File>
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- </File>
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- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
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- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/makefile
deleted file mode 100644
index 70c1b5d..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/makefile
+++ /dev/null
@@ -1,260 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = dhry
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS -DITERATIONS=200
-else
- USER_DEFINE = -DCORTEX_M0 -DITERATIONS=200
-endif
-
-DEPS_LIST = makefile
-DHRY_ARMCC_OPTION = -Ono_inline --no_inline --no_multifile -Oloopref
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime \
- -I $(CORE_DIR) -I $(DEVICE_DIR)/Include -I $(SOFTWARE_DIR)/common/retarget \
- -I $(SOFTWARE_DIR)/common/dhry \
- $(DHRY_ARMCC_OPTION) $(USER_DEFINE)
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE) -fno-inline -fno-common -Wl,-Map -Wl,$(TESTNAME).map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-dhry_1.o : $(SOFTWARE_DIR)/common/dhry/dhry_1.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-dhry_2.o : $(SOFTWARE_DIR)/common/dhry/dhry_2.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-
-$(TESTNAME).ELF : dhry_1.o dhry_2.o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
- armlink $(ARM_LINK_OPTIONS) -o $@ dhry_1.o dhry_2.o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-
-$(TESTNAME).lst : $(TESTNAME).ELF
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
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- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-
-clean :
- @rm -rf *.o
- @if [ -e $(TESTNAME).hex ] ; then \
- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
- fi
- @if [ -e $(TESTNAME).ELF ] ; then \
- rm -rf $(TESTNAME).ELF ; \
- fi
- @if [ -e $(TESTNAME).bin ] ; then \
- rm -rf $(TESTNAME).bin ; \
- fi
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
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- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
- @rm -rf *._ia
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/transcript b/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/transcript
deleted file mode 100644
index 58d44cd..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dhry/transcript
+++ /dev/null
@@ -1,14 +0,0 @@
-# // Questa Sim-64
-# // Version 10.7c linux_x86_64 Aug 17 2018
-# //
-# // Copyright 1991-2018 Mentor Graphics Corporation
-# // All Rights Reserved.
-# //
-# // QuestaSim and its associated documentation contain trade
-# // secrets and commercial or financial information that are the property of
-# // Mentor Graphics Corporation and are privileged, confidential,
-# // and exempt from disclosure under the Freedom of Information Act,
-# // 5 U.S.C. Section 552. Furthermore, this information
-# // is prohibited from disclosure under the Trade Secrets Act,
-# // 18 U.S.C. Section 1905.
-# //
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deleted file mode 100644
index ad90f6c..0000000
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@@ -1,261 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/dma_tests_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/dma_tests_cm0.uvproj
deleted file mode 100644
index 7487889..0000000
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/dma_tests_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/dma_tests_cm0p.uvopt
deleted file mode 100644
index 617768f..0000000
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/dma_tests_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/dma_tests_cm0p.uvproj
deleted file mode 100644
index b453d95..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/dma_tests_cm0p.uvproj
+++ /dev/null
@@ -1,432 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/makefile
deleted file mode 100644
index c4aff4d..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dma_tests/makefile
+++ /dev/null
@@ -1,253 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-GENERIC_DIR = ../generic
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = dma_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# Configuration ID values
-GENERIC_FILE = $(GENERIC_DIR)/config_id.h
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) -I $(GENERIC_DIR) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c $(GENERIC_FILE) $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0.uvopt
deleted file mode 100644
index 32eab05..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0.uvopt
+++ /dev/null
@@ -1,261 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0.uvproj
deleted file mode 100644
index 19d2564..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0.uvproj
+++ /dev/null
@@ -1,435 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0p.uvopt
deleted file mode 100644
index 97f2811..0000000
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+++ /dev/null
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/dualtimer_demo_cm0p.uvproj
deleted file mode 100644
index 22abff1..0000000
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- <AdsLLst>1</AdsLLst>
- <AdsLmap>1</AdsLmap>
- <AdsLcgr>1</AdsLcgr>
- <AdsLsym>1</AdsLsym>
- <AdsLszi>1</AdsLszi>
- <AdsLtoi>1</AdsLtoi>
- <AdsLsun>1</AdsLsun>
- <AdsLven>1</AdsLven>
- <AdsLsxf>1</AdsLsxf>
- <RvctClst>0</RvctClst>
- <GenPPlst>0</GenPPlst>
- <AdsCpuType>"Cortex-M0+"</AdsCpuType>
- <RvctDeviceName></RvctDeviceName>
- <mOS>0</mOS>
- <uocRom>0</uocRom>
- <uocRam>0</uocRam>
- <hadIROM>0</hadIROM>
- <hadIRAM>0</hadIRAM>
- <hadXRAM>0</hadXRAM>
- <uocXRam>0</uocXRam>
- <RvdsVP>0</RvdsVP>
- <hadIRAM2>0</hadIRAM2>
- <hadIROM2>0</hadIROM2>
- <StupSel>1</StupSel>
- <useUlib>0</useUlib>
- <EndSel>1</EndSel>
- <uLtcg>0</uLtcg>
- <RoSelD>0</RoSelD>
- <RwSelD>5</RwSelD>
- <CodeSel>0</CodeSel>
- <OptFeed>0</OptFeed>
- <NoZi1>0</NoZi1>
- <NoZi2>0</NoZi2>
- <NoZi3>0</NoZi3>
- <NoZi4>0</NoZi4>
- <NoZi5>0</NoZi5>
- <Ro1Chk>1</Ro1Chk>
- <Ro2Chk>0</Ro2Chk>
- <Ro3Chk>0</Ro3Chk>
- <Ir1Chk>0</Ir1Chk>
- <Ir2Chk>0</Ir2Chk>
- <Ra1Chk>1</Ra1Chk>
- <Ra2Chk>0</Ra2Chk>
- <Ra3Chk>0</Ra3Chk>
- <Im1Chk>0</Im1Chk>
- <Im2Chk>0</Im2Chk>
- <OnChipMemories>
- <Ocm1>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm1>
- <Ocm2>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm2>
- <Ocm3>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm3>
- <Ocm4>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm4>
- <Ocm5>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm5>
- <Ocm6>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm6>
- <IRAM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </IRAM>
- <IROM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </IROM>
- <XRAM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </XRAM>
- <OCR_RVCT1>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT1>
- <OCR_RVCT2>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT2>
- <OCR_RVCT3>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT3>
- <OCR_RVCT4>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT4>
- <OCR_RVCT5>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT5>
- <OCR_RVCT6>
- <Type>0</Type>
- <StartAddress>0x20000000</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT6>
- <OCR_RVCT7>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT7>
- <OCR_RVCT8>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT8>
- <OCR_RVCT9>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT9>
- <OCR_RVCT10>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT10>
- </OnChipMemories>
- <RvctStartVector></RvctStartVector>
- </ArmAdsMisc>
- <Cads>
- <interw>1</interw>
- <Optim>3</Optim>
- <oTime>0</oTime>
- <SplitLS>0</SplitLS>
- <OneElfS>0</OneElfS>
- <Strict>0</Strict>
- <EnumInt>0</EnumInt>
- <PlainCh>0</PlainCh>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <wLevel>0</wLevel>
- <uThumb>0</uThumb>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define>CORTEX_M0PLUS</Define>
- <Undefine></Undefine>
- <IncludePath>..\..\..\..\software\cmsis\CMSIS\Include; ..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Include; ..\..\..\..\software\common\retarget</IncludePath>
- </VariousControls>
- </Cads>
- <Aads>
- <interw>1</interw>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <thumb>0</thumb>
- <SplitLS>0</SplitLS>
- <SwStkChk>0</SwStkChk>
- <NoWarn>0</NoWarn>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define></Define>
- <Undefine></Undefine>
- <IncludePath></IncludePath>
- </VariousControls>
- </Aads>
- <LDads>
- <umfTarg>1</umfTarg>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <noStLib>0</noStLib>
- <RepFail>1</RepFail>
- <useFile>0</useFile>
- <TextAddressRange>0x00000000</TextAddressRange>
- <DataAddressRange>0x00000000</DataAddressRange>
- <ScatterFile></ScatterFile>
- <IncludeLibs></IncludeLibs>
- <IncludeLibsPath></IncludeLibsPath>
- <Misc></Misc>
- <LinkerInputFile></LinkerInputFile>
- <DisabledWarnings></DisabledWarnings>
- </LDads>
- </TargetArmAds>
- </TargetOption>
- <Groups>
- <Group>
- <GroupName>Startup</GroupName>
- <Files>
- <File>
- <FileName>startup_CMSDK_CM0plus.s</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>Application</GroupName>
- <Files>
- <File>
- <FileName>dualtimer_demo.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\demos\dualtimer_demo.c</FilePath>
- </File>
- <File>
- <FileName>uart_stdout.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\uart_stdout.c</FilePath>
- </File>
- <File>
- <FileName>retarget.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\retarget.c</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>System</GroupName>
- <Files>
- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/makefile
deleted file mode 100644
index 6863911..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/dualtimer_demo/makefile
+++ /dev/null
@@ -1,250 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = dualtimer_demo
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option (DS-5)
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget $(USER_DEFINE)
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/demos/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
- armlink $(ARM_LINK_OPTIONS) $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o -o $@
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-
-$(TESTNAME).lst : $(TESTNAME).ELF
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(SOFTWARE_DIR)/common/demos/$(TESTNAME).c \
- $(SOFTWARE_DIR)/common/retarget/retarget.c \
- $(SOFTWARE_DIR)/common/retarget/uart_stdout.c \
- $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget \
- -L $(LINKER_SCRIPT_PATH) \
- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-clean :
- @rm -rf *.o
- @if [ -e $(TESTNAME).hex ] ; then \
- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
- fi
- @if [ -e $(TESTNAME).ELF ] ; then \
- rm -rf $(TESTNAME).ELF ; \
- fi
- @if [ -e $(TESTNAME).bin ] ; then \
- rm -rf $(TESTNAME).bin ; \
- fi
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
- @rm -rf *.d
- @rm -rf *.lnp
- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
- @rm -rf *._ia
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/generic/config_id.h b/Cortex-M0/nanosoc/systems/mcu/testcodes/generic/config_id.h
deleted file mode 100644
index 3a4f01b..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/generic/config_id.h
+++ /dev/null
@@ -1,408 +0,0 @@
-//-----------------------------------------------------------------------------
-// The confidential and proprietary information contained in this file may
-// only be used by a person authorised under and to the extent permitted
-// by a subsisting licensing agreement from Arm Limited or its affiliates.
-//
-// (C) COPYRIGHT 2013 Arm Limited or its affiliates.
-// ALL RIGHTS RESERVED
-//
-// This entire notice must be reproduced on all copies of this file
-// and copies of this file may only be made by a person if such person is
-// permitted to do so under the terms of a subsisting license agreement
-// from Arm Limited or its affiliates.
-//
-// SVN Information
-//
-// Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-//
-// Revision : $Revision: 371321 $
-//
-// Release Information : Cortex-M System Design Kit-r1p1-00rel0
-//-----------------------------------------------------------------------------
-//
-
-#define TEST_PASS 0
-#define TEST_FAIL 1
-//==============================================================================
-// Cortex-M0+ & Cortex-M0 IDs header File
-//==============================================================================
-
-// Values used by generic tests, such as debug_tests, romtable_tests
-
-#ifdef CORTEX_M0PLUS
-#define MCU_CPU_NAME "Cortex-M0+"
-#define MCU_CPU_ID_VALUE 0x410cc601
-#define MCU_DP_IDR_VALUE 0x0BC11477
-#define MCU_AP_IDR_VALUE 0x04770031
-#define MCU_AP_BASE_VALUE 0xF0000003
-#else
-#define MCU_CPU_NAME "Cortex-M0"
-#define MCU_CPU_ID_VALUE 0x410cc200
-#define MCU_DP_IDR_VALUE 0x0BB11477
-#define MCU_AP_IDR_VALUE 0x04770021
-#define MCU_AP_BASE_VALUE 0xE00FF003
-#endif
-
-//==============================================================================
-//
-// GenericID values - DO NOT MODIFY
-//
-
-// CoreSight Component Identifier for Peripheral classes
-#define CORESIGHT_CID0 0x0D
-#define CORESIGHT_CID1_tbl 0x10
-#define CORESIGHT_CID1_dbg 0x90
-#define CORESIGHT_CID1_mem 0xE0
-#define CORESIGHT_CID1_prm 0xF0
-#define CORESIGHT_CID2 0x05
-#define CORESIGHT_CID3 0xB1
-
-// Component Part Numbers
-#define ARM_JEP_ID 0x3B
-#define ARM_JEP_CONT 0x4
-
-//==============================================================================
-//
-// Cortex-M0 ID values
-#define CORTEXM0_CPUID 0x410cc200
-
-#define CM0_CPU_PART 0x471
-#define CM0_SCS_PART 0x008
-#define CM0_DWT_PART 0x00A
-#define CM0_BPU_PART 0x00B
-#define CM0_CPU_PART 0x471
-#define CM0_CSI_PART 0x4C2
-#define CS_CTI_PART 0x906
-#define CM0_DAP_DP_PART 0xBB
-
-// Revision Codes
-#define CM0_ROM_REV 0x0
-#define CM0_SCS_REV 0x0
-#define CM0_DWT_REV 0x0
-#define CM0_BPU_REV 0x0
-
-// Revand
-#define CM0_ROM_ECO 0x0
-#define CM0_SCS_ECO 0x0
-#define CM0_DWT_ECO 0x0
-#define CM0_BPU_ECO 0x0
-
-#define CORTEXM0DAP_JTAG_TAPID 0x0BA01477
-#define CORTEXM0DAP_JTAG_DPIDR 0x0BB11477
-#define CORTEXM0DAP_SW_DPIDR 0x0BB11477
-#define CORTEXM0DAP_AP_IDR 0x04770021
-
-#define CORTEXM0_ROM_PID3 0x00
-#define CORTEXM0_SCS_PID3 0x00
-#define CORTEXM0_DWT_PID3 0x00
-#define CORTEXM0_BPU_PID3 0x00
-
-//==============================================================================
-//
-// Cortex-M0+ ID values
-#define CORTEXM0PLUS_CPUID (0x410cc601 ^ (EXPECTED_ECOREVNUM & 0x0000000F))
-
-#define CM0P_CPU_PART 0x4C0
-#define CM0P_SCS_PART 0x008
-#define CM0P_DWT_PART 0x00A
-#define CM0P_BPU_PART 0x00B
-#define CM0P_MTB_PART 0x932
-#define CM0P_CSI_PART 0x4C1
-#define CM0P_CTI_PART 0x9A6
-#define CM0P_DAP_DP_PART 0xBC
-
-// Revision Codes
-#define CM0P_ROM_REV 0x0
-#define CM0P_SCS_REV 0x0
-#define CM0P_DWT_REV 0x0
-#define CM0P_BPU_REV 0x0
-#define CM0P_MTB_REV 0x1
-#define CM0P_DAP_DP_REV (0x0 ^ ((EXPECTED_ECOREVNUM & 0x0F000000) >> 24))
-#define CM0P_DAP_AP_REV (0x0 ^ ((EXPECTED_ECOREVNUM & 0x00F00000) >> 20))
-
-// Revand
-#define CM0P_ROM_ECO ((EXPECTED_ECOREVNUM & 0x000F0000) >> 16)
-#define CM0P_SCS_ECO ((EXPECTED_ECOREVNUM & 0x0000F000) >> 12)
-#define CM0P_DWT_ECO ((EXPECTED_ECOREVNUM & 0x00000F00) >> 8)
-#define CM0P_BPU_ECO ((EXPECTED_ECOREVNUM & 0x000000F0) >> 4)
-#define CM0P_MTB_ECO ((EXPECTED_ECOREVNUM & 0xF0000000) >> 28)
-
-// DAP Registers
-#define CM0P_DAP_JTAG_TAPID (0x0BA01477 | (CM0P_DAP_DP_REV << 28))
-#define CM0P_DAP_JTAG_DPIDR (0x0BC11477 | (CM0P_DAP_DP_REV << 28))
-#define CM0P_DAP_SW_DPIDR (0x0BC11477 | (CM0P_DAP_DP_REV << 28))
-#define CM0P_DAP_SWMD_DPIDR (0x0BC12477 | (CM0P_DAP_DP_REV << 28))
-#define CM0P_DAP_APIDR (0x04770031 | (CM0P_DAP_AP_REV << 28))
-
-//==============================================================================
-
-//=====================================================================
-// Cortex-M0 & Cortex-M0+ Configuration
-//=====================================================================
-
-////////////////////////////////////////////////////////////////////////////////
-//
-// Processor configuration options.
-// These must match the expected hardware configuration of the processor.
-//
-// - EXPECTED_BE : Expected Endianness (0-1)
-// - EXPECTED_BKPT : Expected number of Breakpoint Comparators (0-4)
-// - EXPECTED_DBG : Expected Debug config (0-1)
-// - EXPECTED_NUMIRQ : Expected number of IRQ lines (0-32)
-// - EXPECTED_SMUL : Expected Multiplier config (0-1)
-// - EXPECTED_SYST : Expected SysTick extension (0-1)
-// - EXPECTED_WPT : Expected number of Watchpoint Comparators (0-2)
-//
-// Processor Tie-offs
-//
-// - EXPECTED_STCALIB : Expected value of STCALIB (0-0x3FFFFFF)
-//
-////////////////////////////////////////////////////////////////////////////////
-//
-// System ROM Table options.
-// These must match the values in the System ROM Table.
-//
-// - EXPECTED_CUST_JEP_ID : Expected JEDEC JEP-106 identity code (0-0x7F)
-// - EXPECTED_CUST_JEP_CONT : Expected JEDEC JEP-106 continuation code (0-0xF)
-// - EXPECTED_CUST_PART : Expected Part number (0-0xFFF)
-// - EXPECTED_CUST_REV : Expected Revision number (0-0xF)
-// - EXPECTED_CUST_REVAND : Expected Manufacturer Revision number (0-0xF)
-//
-////////////////////////////////////////////////////////////////////////////////
-//
-// Engineering Change Order and Revision Number Tie-off.
-//
-// - EXPECTED_ECOREVNUM : Expected Engineering Change Order and Revision number (0-0xFFFFFFFF)
-//
-////////////////////////////////////////////////////////////////////////////////
-
-// <h> Processor configuration options
-// <o> EXPECTED_BE: Expected Endianness <0=> Little Endian <1=> Big Endian
-#define EXPECTED_BE 0
-
-
-// <o> EXPECTED_BKPT: Expected number of Breakpoint Comparators <0-4>
-#define EXPECTED_BKPT 4
-
-
-// <o> EXPECTED_DBG: Expected Debug config <0=> Absent <1=> Present
-#define EXPECTED_DBG 1
-
-
-// <o> EXPECTED_NUMIRQ: Expected number of IRQ lines <0-32>
-#define EXPECTED_NUMIRQ 32
-
-
-// <o> EXPECTED_SMUL: Expected Small Multiplier config <0=> Absent (Fast Multiplier) <1=> Present (Small Multiplier)
-#define EXPECTED_SMUL 0
-
-
-// <o> EXPECTED_SYST: Expected SysTick extension <0=> Absent <1=> Present
-#define EXPECTED_SYST 1
-
-
-// <o> EXPECTED_WPT: Expected number of Watchpoint Comparators <0-2>
-#define EXPECTED_WPT 2
-
-
-// <o> EXPECTED_SIMPLE_CHECK: <1=> only run the simple CPUID check <0=> more complex check included
-// like Lockup, Sleep, other ID check etc
-#define EXPECTED_SIMPLE_CHECK 0
-
-
-// <h> Processor port Tie-Offs
-// <o> EXPECTED_STCALIB: Expected value of STCALIB[25:0] at CORTEXM0INTEGRATION or CORTEXM0 <0x0-0x3FFFFFF>
-#define EXPECTED_STCALIB 0x1028B0A
-
-
-// <o> EXPECTED_BASEADDR: Expected value of BASEADDR[31:0] at CORTEXM0DAP <0x0-0xFFFFFFFF>
-#ifdef CORTEX_M0
-#define EXPECTED_BASEADDR 0xE00FF003
-#else
-#define EXPECTED_BASEADDR 0xF0000003
-#endif
-
-// <o> EXPECTED_JTAGnSW: Expected Cortex M0(+) DAP Protocol <0=> Serial Wire <1=> JTAG
-#define EXPECTED_JTAGnSW 0
-
-// <h> System ROM Table ID values
-// <o> EXPECTED_CUST_JEP_ID: Expected JEDEC JEP-106 identity code (0-0x7F)
-#define EXPECTED_CUST_JEP_ID 0x00
-
-
-// <o> EXPECTED_CUST_JEP_CONT: Expected JEDEC JEP-106 continuation code (0-0xF)
-#define EXPECTED_CUST_JEP_CONT 0x0
-
-
-// <o> EXPECTED_CUST_PART: Expected Part number (0-0xFFF)
-#define EXPECTED_CUST_PART 0x000
-
-
-// <o> EXPECTED_CUST_REV: Expected Revision number (0-0xF)
-#define EXPECTED_CUST_REV 0x0
-
-
-// <o> EXPECTED_CUST_REVAND: Expected Manufacturer Revision number (0-0xF)
-#define EXPECTED_CUST_REVAND 0x0
-
-// </h>
-
-// <h> EXPECTED_ECOREVNUM
-// <o> EXPECTED_ECOREVNUM: Expected Engineering Change Order and Revision number (0-0xFFFFFFFF)
-#define EXPECTED_ECOREVNUM 0x00000000
-
-// </h>
-
-// <h> CSI and CTI - Used by romtable test only
-// <o> EXPECTED_CSI: Expected CoreSight Integration Level <0=> Absent <1=> Present
-#define EXPECTED_CSI 0
-
-// <o> EXPECTED_CTI: Expected Cross Trigger Interface <0=> Absent <1=> Present
-#define EXPECTED_CTI 0
-// </h>
-
-//=====================================================================
-// Cortex-M0+ Configuration
-//=====================================================================
-
-////////////////////////////////////////////////////////////////////////////////
-//
-// Processor configuration options.
-// These must match the expected hardware configuration of the processor.
-//
-// - EXPECTED_BE : Expected Endianness (0-1)
-// - EXPECTED_BKPT : Expected number of Breakpoint Comparators (0-4)
-// - EXPECTED_DBG : Expected Debug config (0-1)
-// - EXPECTED_IOP : Expected IOP config (0-1)
-// - EXPECTED_IRQDIS : Expected IRQ disable (0-0xFFFFFFFF)
-// - EXPECTED_MPU : Expected MPU config (0,8)
-// - EXPECTED_NUMIRQ : Expected number of IRQ lines (0-32)
-// - EXPECTED_SMUL : Expected Multiplier config (0-1)
-// - EXPECTED_SYST : Expected SysTick extension (0-1)
-// - EXPECTED_USER : Expected User config (0-1)
-// - EXPECTED_VTOR : Expected VTOR config (0-1)
-// - EXPECTED_WIC : Expected Wake-up interrupt controller support <0-1>
-// - EXPECTED_WICLINES : Expected number of supported WIC lines <2-34>
-// - EXPECTED_WPT : Expected number of Watchpoint Comparators (0-2)
-//
-// Processor Tie-offs
-//
-// - EXPECTED_STCALIB : Expected value of STCALIB (0-0x3FFFFFF)
-//
-////////////////////////////////////////////////////////////////////////////////
-//
-// DAP configuration options.
-// These must match the expected hardware configuration of the DAP.
-//
-// - EXPECTED_BASEADDR : Expected BASEADDR at Cortex M0+ DAP (0-0xFFFFFFFF)
-// - EXPECTED_JTAGnSW : Expected Cortex M0+ DAP Protocol (0,1)
-// - EXPECTED_SWMD : Expected SW Multi-Drop config (0-1)
-//
-// DAP Tie-offs
-//
-// - EXPECTED_INSTANCEID : Expected DAP instance number (0-0xF)
-// - EXPECTED_TREVISION : Expected Revision number (0-0xF)
-// - EXPECTED_TPARTNO : Expected Part number (0-0xFFFF)
-// - EXPECTED_TDESIGNER : Expected Designer code (0-0x7FF)
-//
-////////////////////////////////////////////////////////////////////////////////
-//
-// CoreSight MTB-M0+ configuration options.
-//
-// - EXPECTED_MTB : Expected CoreSight MTB-M0+ config (0-1)
-// - EXPECTED_MTB_BASEADDR : Expected CoreSight MTB-M0+ BASEADDR (0-0xFFFFFFFF)
-// - EXPECTED_MTB_AWIDTH : Expected CoreSight MTB-M0+ Address width (5-32)
-//
-// NOTE : When the MTB (EXPECTED_MTB = 1) is included, the RAM that is used for
-// the data accesses is shared with the MTB, so if you set the address
-// width to be smaller than the default (EXPECTED_MTB_AWIDTH = 16), the
-// addresses that some tests are using to write data to will alias to
-// lower addresses,so some tests will not work with smaller memory.
-//
-////////////////////////////////////////////////////////////////////////////////
-//
-// System ROM Table options.
-// These must match the values in the System ROM Table.
-//
-// - EXPECTED_CUST_JEP_ID : Expected JEDEC JEP-106 identity code (0-0x7F)
-// - EXPECTED_CUST_JEP_CONT : Expected JEDEC JEP-106 continuation code (0-0xF)
-// - EXPECTED_CUST_PART : Expected Part number (0-0xFFF)
-// - EXPECTED_CUST_REV : Expected Revision number (0-0xF)
-// - EXPECTED_CUST_REVAND : Expected Manufacturer Revision number (0-0xF)
-//
-////////////////////////////////////////////////////////////////////////////////
-//
-// Engineering Change Order and Revision Number Tie-off.
-//
-// - EXPECTED_ECOREVNUM : Expected Engineering Change Order and Revision number (0-0xFFFFFFFF)
-//
-////////////////////////////////////////////////////////////////////////////////
-
-// <h> Processor configuration options
-// <o> EXPECTED_IOP: Expected IOP config <0=> Absent <1=> Present
-#define EXPECTED_IOP 0
-
-
-// <o> EXPECTED_IRQDIS: Expected interrupt disable <0x0-0xFFFFFFFF>
-#define EXPECTED_IRQDIS 0x00000000
-
-
-// <o> EXPECTED_MPU: Expected MPU config <0=> Absent <8=> Present (8 Regions)
-#define EXPECTED_MPU 8
-
-
-// <o> EXPECTED_USER: Expected User config <0=> Absent (Privilege mode only) <1=> Present
-#define EXPECTED_USER 1
-
-
-// <o> EXPECTED_VTOR: Expected VTOR config <0=> Absent <1=> Present
-#define EXPECTED_VTOR 1
-
-
-// <o> EXPECTED_WIC: Expected Wake-up interrupt controller support <0-1>
-#define EXPECTED_WIC 1
-
-
-// <o> EXPECTED_WICLINES : Expected number of supported WIC lines <2-34>
-#define EXPECTED_WICLINES 34
-
-
-// <h> Processor port Tie-Offs
-// <o> EXPECTED_SWMD: Expected SW Multi-Drop config <0=> Absent <1=> Present (Serial Wire Protocol 2)
-#define EXPECTED_SWMD 0
-
-// </h>
-
-// <h> DAP Tie-offs
-// <o> EXPECTED_INSTANCEID: Expected DAP instance number (0-0xF)
-#define EXPECTED_INSTANCEID 0x0
-
-
-// <o> EXPECTED_TREVISION: Expected Revision number (0-0xF)
-#define EXPECTED_TREVISION 0x0
-
-
-// <o> EXPECTED_TPARTNO: Expected Part number (0-0xFFFF)
-#define EXPECTED_TPARTNO 0x0000
-
-
-// <o> EXPECTED_TDESIGNER: Expected Designer code (0-0x7FF)
-#define EXPECTED_TDESIGNER 0x000
-
-// </h>
-
-// <h> CoreSight MTB-M0+ configuration options
-// <o> EXPECTED_MTB: Expected CoreSight MTB-M0+ config <0=> Absent <1=> Present
-#define EXPECTED_MTB 0
-
-
-// <o> EXPECTED_MTB_BASEADDR: Expected CoreSight MTB-M0+ BASEADDR <0x0-0xFFFFFFFF>
-#define EXPECTED_MTB_BASEADDR 0xF0210000
-
-
-// <o> EXPECTED_MTB_AWIDTH: Expected CoreSight MTB-M0+ Address width <5-32>
-#define EXPECTED_MTB_AWIDTH 16
-
-// </h>
-
-// <<< end of configuration section >>>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/generic/mcu_debugtester_interface.c b/Cortex-M0/nanosoc/systems/mcu/testcodes/generic/mcu_debugtester_interface.c
deleted file mode 100644
index 75f73a1..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/generic/mcu_debugtester_interface.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- *-----------------------------------------------------------------------------
- * The confidential and proprietary information contained in this file may
- * only be used by a person authorised under and to the extent permitted
- * by a subsisting licensing agreement from Arm Limited or its affiliates.
- *
- * (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
- * ALL RIGHTS RESERVED
- *
- * This entire notice must be reproduced on all copies of this file
- * and copies of this file may only be made by a person if such person is
- * permitted to do so under the terms of a subsisting license agreement
- * from Arm Limited or its affiliates.
- *
- * SVN Information
- *
- * Checked In : $Date: $
- *
- * Revision : $Revision: $
- *
- * Release Information : Cortex-M System Design Kit-r1p1-00rel0
- *-----------------------------------------------------------------------------
- */
-
-#include "mcu_debugtester_interface.h" // For definition of interface to the debug tester
-
-void EnableDebugTester(void)
-{
- uint32_t i;
-
-
- //
- // Initialise GPIO from MCU to Debug Tester
- //
-
- //Initialize the GPIO0 higher 8 bits output value, set to 0
- CMSDK_GPIO0->DATAOUT = (0x00000000); //set GPIO output to 0 for default value, disable the function strobe
- CMSDK_gpio_SetOutEnable (CMSDK_GPIO0, DEBUG_CMD); // set specified bit in out enable register
-
-
- //
- // Enable the Debug Tester in the testbench
- //
-
- // send command to enable the connection to debug tester
- UartPutc((char) DBG_ESCAPE); //send ESCAPE code
- UartPutc((char) DBG_CONNECT_ENABLE); //send debug test enable command
- puts("\nEnabling debug tester...\n");
- // If debug tester is not present,
- if((CMSDK_GPIO0->DATA & DEBUG_ERROR) != 0)
- {
- puts("DBGERROR bit (debug error) asserted.\n");
- puts("Debug tester not available:\n");
- puts("1: The ARM_CMSDK_INCLUDE_DEBUG_TESTER macro is not defined, or\n");
- puts("2: Cortex-M0 DesignStart is used\n");
- puts("** TEST SKIPPED **\n");
- // End simulation
- UartEndSimulation();
- }
-
-
- //
- // Initialise the Communication Region
- // (Zero the 4 words above Stack Top)
- //
-
- for(i=0; i<4 ; i++)
- {
- DEBUGTESTERDATA[i] = 0;
- }
-}
-
-
-void DisableDebugTester(void)
-{
- //send command to disable the connection to debug tester
- UartPutc((char) DBG_ESCAPE); //send debug test disable command,
- UartPutc((char) DBG_CONNECT_DISABLE); //send debug test disable command,
- UartEndSimulation(); //stop simulation
-}
-
-
-//===========================================================================
-// Start a function running on the debug tester
-//===========================================================================
-void StartDebugTester(uint32_t Function)
-{
- // Write function onto function select pins
- CMSDK_gpio_SetOutEnable (CMSDK_GPIO0, DEBUG_CMD); // set specified bit in out enable register
-
- //setup function select and function strobe
- CMSDK_gpio_MaskedWrite(CMSDK_GPIO0, Function<<DEBUG_BIT_LOC | DEBUG_STROBE, DEBUG_CMD|DEBUG_STROBE);
-
- // Wait to see Running asserted
- while((CMSDK_GPIO0->DATA & DEBUG_RUNNING) == 0);
-
- // Clear strobe
- CMSDK_gpio_MaskedWrite(CMSDK_GPIO0, 0x0, DEBUG_STROBE);
-}
-
-
-//===========================================================================
-// Check that a debug tester function completed
-// Return pass/fail accordingly
-//===========================================================================
-uint32_t CheckDebugTester(void)
-{
- // Wait to see Running deasserted
- while((CMSDK_GPIO0->DATA & DEBUG_RUNNING)!= 0);
-
- // Return status, check ERROR bit
- if((CMSDK_GPIO0->DATA & DEBUG_ERROR) == 0)
- {
- return TEST_PASS;
- }
- else
- {
- return TEST_FAIL;
- }
-}
-
-
-//===========================================================================
-// Execute a debug tester function
-//===========================================================================
-uint32_t CallDebugTester(uint32_t Function)
-{
- StartDebugTester(Function);
- return CheckDebugTester();
-}
-
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/generic/mcu_debugtester_interface.h b/Cortex-M0/nanosoc/systems/mcu/testcodes/generic/mcu_debugtester_interface.h
deleted file mode 100644
index 162672d..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/generic/mcu_debugtester_interface.h
+++ /dev/null
@@ -1,102 +0,0 @@
-//-----------------------------------------------------------------------------
-// The confidential and proprietary information contained in this file may
-// only be used by a person authorised under and to the extent permitted
-// by a subsisting licensing agreement from Arm Limited or its affiliates.
-//
-// (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-// ALL RIGHTS RESERVED
-//
-// This entire notice must be reproduced on all copies of this file
-// and copies of this file may only be made by a person if such person is
-// permitted to do so under the terms of a subsisting license agreement
-// from Arm Limited or its affiliates.
-//
-// SVN Information
-//
-// Checked In : $Date: 2013-01-18 17:35:18 +0000 (Fri, 18 Jan 2013) $
-//
-// Revision : $Revision: 234195 $
-//
-// Release Information : Cortex-M System Design Kit-r1p1-00rel0
-//-----------------------------------------------------------------------------
-//
-
-//
-// Definition of CMSDK example MCU to the Debug Tester
-//
-#ifdef CORTEX_M0
-#include "CMSDK_CM0.h"
-
-#else
-#ifdef CORTEX_M0PLUS
-#include "CMSDK_CM0plus.h"
-
-#else
-#ifdef CORTEX_M3
-#include "CMSDK_CM3.h"
-
-#else
-#ifdef CORTEX_M4
-#include "CMSDK_CM4.h"
-
-#endif
-#endif
-#endif
-#endif
-
-#include <stdio.h>
-#include "uart_stdout.h" // for stdout
-#include "CMSDK_driver.h"
-#include "config_id.h" // general defines such as test_pass
-
-
-// Functions used by tests that communicate with the Debug Tester
-extern void EnableDebugTester(void);
-extern void DisableDebugTester(void);
-extern uint32_t CallDebugTester(uint32_t);
-extern void StartDebugTester(uint32_t);
-extern uint32_t CheckDebugTester(void);
-
-
-//Test command sequence definition
-#define DBG_ESCAPE 0x1B
-#define DBG_CONNECT_ENABLE 0x11
-#define DBG_CONNECT_DISABLE 0x12
-#define DBG_SIM_STOP 0x4
-
-
-// GPIO0 bit allocation
-//
-// CM0_MCU GPIO0 -------------------------------------- Debug Tester
-//
-// GPIO[15] 7 <----------------------------------------< Running
-// GPIO[14] 6 <----------------------------------------< Error
-// GPIO[13] 5 >----------------------------------------> Function Strobe
-// GPIO[12] 4 >----------------------------------------> Function Select bit 4
-// GPIO[11] 3 >----------------------------------------> Function Select bit 3
-// GPIO[10] 2 >----------------------------------------> Function Select bit 2
-// GPIO[9] 1 >----------------------------------------> Function Select bit 1
-// GPIO[8] 0 >----------------------------------------> Function Select bit 0
-//
-#define DEBUG_BIT_LOC 8 //GPIO[8] is the least bit of Function Select
-#define DEBUG_CMD 0x3f<<8 //GPIO [13:8]
-#define DEBUG_STROBE 0x00002000 //GPIO [13]
-#define DEBUG_ERROR 0x00004000 //GPIO [14]
-#define DEBUG_RUNNING 0x00008000 //GPIO [15]
-
-// GPIO1[7] 7
-// GPIO1[6] 6
-// GPIO1[5] 5
-// GPIO1[4] 4
-// GPIO1[3] 3
-// GPIO1[2] 2
-// GPIO1[1] 1
-// GPIO1[0] 0
-
-
-// CMSDK example MCU's view of the memory shared with the debugtester
-// (4 words above stack top)
-// This macro uses the SP value from the vector table as stacktop
-// The stacktop cannot be set to the top of the memory.
-#define DEBUGTESTERDATA ((volatile uint32_t *) *((uint32_t *) 0x0))
-
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0.uvopt
deleted file mode 100644
index 3b1eeed..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0.uvopt
+++ /dev/null
@@ -1,277 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
-
- <SchemaVersion>1.0</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Extensions>
- <cExt>*.c</cExt>
- <aExt>*.s*; *.src; *.a*</aExt>
- <oExt>*.obj</oExt>
- <lExt>*.lib</lExt>
- <tExt>*.txt; *.h; *.inc</tExt>
- <pExt>*.plm</pExt>
- <CppX>*.cpp</CppX>
- </Extensions>
-
- <DaveTm>
- <dwLowDateTime>0</dwLowDateTime>
- <dwHighDateTime>0</dwHighDateTime>
- </DaveTm>
-
- <Target>
- <TargetName>Debug</TargetName>
- <ToolsetNumber>0x4</ToolsetNumber>
- <ToolsetName>ARM-ADS</ToolsetName>
- <TargetOption>
- <CLKADS>50000000</CLKADS>
- <OPTTT>
- <gFlags>1</gFlags>
- <BeepAtEnd>1</BeepAtEnd>
- <RunSim>1</RunSim>
- <RunTarget>0</RunTarget>
- </OPTTT>
- <OPTHX>
- <HexSelection>1</HexSelection>
- <FlashByte>65535</FlashByte>
- <HexRangeLowAddress>0</HexRangeLowAddress>
- <HexRangeHighAddress>0</HexRangeHighAddress>
- <HexOffset>0</HexOffset>
- </OPTHX>
- <OPTLEX>
- <PageWidth>79</PageWidth>
- <PageLength>66</PageLength>
- <TabStop>8</TabStop>
- <ListingPath>.\</ListingPath>
- </OPTLEX>
- <ListingPage>
- <CreateCListing>1</CreateCListing>
- <CreateAListing>1</CreateAListing>
- <CreateLListing>1</CreateLListing>
- <CreateIListing>0</CreateIListing>
- <AsmCond>1</AsmCond>
- <AsmSymb>1</AsmSymb>
- <AsmXref>0</AsmXref>
- <CCond>1</CCond>
- <CCode>0</CCode>
- <CListInc>0</CListInc>
- <CSymb>0</CSymb>
- <LinkerCodeListing>0</LinkerCodeListing>
- </ListingPage>
- <OPTXL>
- <LMap>1</LMap>
- <LComments>1</LComments>
- <LGenerateSymbols>1</LGenerateSymbols>
- <LLibSym>1</LLibSym>
- <LLines>1</LLines>
- <LLocSym>1</LLocSym>
- <LPubSym>1</LPubSym>
- <LXref>0</LXref>
- <LExpSel>0</LExpSel>
- </OPTXL>
- <OPTFL>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>1</IsCurrentTarget>
- </OPTFL>
- <CpuCode>255</CpuCode>
- <DllOpt>
- <SimDllName>SARMCM3.DLL</SimDllName>
- <SimDllArguments></SimDllArguments>
- <SimDlgDllName>DARMCM1.DLL</SimDlgDllName>
- <SimDlgDllArguments></SimDlgDllArguments>
- <TargetDllName>SARMCM3.DLL</TargetDllName>
- <TargetDllArguments></TargetDllArguments>
- <TargetDlgDllName>TARMCM1.DLL</TargetDlgDllName>
- <TargetDlgDllArguments></TargetDlgDllArguments>
- </DllOpt>
- <DebugOpt>
- <uSim>1</uSim>
- <uTrg>0</uTrg>
- <sLdApp>1</sLdApp>
- <sGomain>1</sGomain>
- <sRbreak>1</sRbreak>
- <sRwatch>1</sRwatch>
- <sRmem>1</sRmem>
- <sRfunc>1</sRfunc>
- <sRbox>1</sRbox>
- <tLdApp>1</tLdApp>
- <tGomain>0</tGomain>
- <tRbreak>1</tRbreak>
- <tRwatch>1</tRwatch>
- <tRmem>1</tRmem>
- <tRfunc>0</tRfunc>
- <tRbox>1</tRbox>
- <tRtrace>0</tRtrace>
- <sRunDeb>0</sRunDeb>
- <sLrtime>0</sLrtime>
- <nTsel>-1</nTsel>
- <sDll></sDll>
- <sDllPa></sDllPa>
- <sDlgDll></sDlgDll>
- <sDlgPa></sDlgPa>
- <sIfile></sIfile>
- <tDll></tDll>
- <tDllPa></tDllPa>
- <tDlgDll></tDlgDll>
- <tDlgPa></tDlgPa>
- <tIfile></tIfile>
- <pMon></pMon>
- </DebugOpt>
- <Breakpoint/>
- <DebugFlag>
- <trace>0</trace>
- <periodic>1</periodic>
- <aLwin>0</aLwin>
- <aCover>0</aCover>
- <aSer1>0</aSer1>
- <aSer2>0</aSer2>
- <aPa>0</aPa>
- <viewmode>0</viewmode>
- <vrSel>0</vrSel>
- <aSym>0</aSym>
- <aTbox>0</aTbox>
- <AscS1>0</AscS1>
- <AscS2>0</AscS2>
- <AscS3>0</AscS3>
- <aSer3>0</aSer3>
- <eProf>0</eProf>
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0.uvproj
deleted file mode 100644
index 6262fae..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0.uvproj
+++ /dev/null
@@ -1,440 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0p.uvopt
deleted file mode 100644
index c0fca7a..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0p.uvopt
+++ /dev/null
@@ -1,258 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0p.uvproj
deleted file mode 100644
index bdd4ec2..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/gpio_driver_tests_cm0p.uvproj
+++ /dev/null
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- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
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- <Group>
- <GroupName>Application</GroupName>
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- <File>
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- </File>
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/makefile
deleted file mode 100644
index d4bde33..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_driver_tests/makefile
+++ /dev/null
@@ -1,255 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2011-01-25 10:05:56 +0000 (Tue, 25 Jan 2011) $
-#
-# Revision : $Revision: 159421 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = gpio_driver_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
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- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-CMSDK_driver.o : $(DEVICE_DIR)/Source/CMSDK_driver.c $(DEPS_LIST)
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-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
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-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o CMSDK_driver.o
- armlink $(ARM_LINK_OPTIONS) -o $@ $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o CMSDK_driver.o
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-$(TESTNAME).lst : $(TESTNAME).ELF makefile
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
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- $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c \
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- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
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-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
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-
-# ---------------------------------------------------------------------------------------
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-all_bin: $(TESTNAME).bin
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-
-# ---------------------------------------------------------------------------------------
-# Clean
-
-clean :
- @rm -rf *.o
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- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
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- rm -rf $(TESTNAME).ELF ; \
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0.uvopt
deleted file mode 100644
index 39dfcaa..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0.uvopt
+++ /dev/null
@@ -1,261 +0,0 @@
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-
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0.uvproj
deleted file mode 100644
index 284bc45..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0.uvproj
+++ /dev/null
@@ -1,435 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0p.uvopt
deleted file mode 100644
index 44d9aed..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0p.uvopt
+++ /dev/null
@@ -1,244 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0p.uvproj
deleted file mode 100644
index 8e0ea89..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/gpio_tests_cm0p.uvproj
+++ /dev/null
@@ -1,432 +0,0 @@
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- <TargetName>Debug</TargetName>
- <ToolsetNumber>0x4</ToolsetNumber>
- <ToolsetName>ARM-ADS</ToolsetName>
- <TargetOption>
- <TargetCommonOption>
- <Device>Cortex-M0+</Device>
- <Vendor>ARM</Vendor>
- <Cpu>CLOCK(12000000) CPUTYPE("Cortex-M0+") ESEL ELITTLE</Cpu>
- <FlashUtilSpec></FlashUtilSpec>
- <StartupFile></StartupFile>
- <FlashDriverDll></FlashDriverDll>
- <DeviceId>6268</DeviceId>
- <RegisterFile></RegisterFile>
- <MemoryEnv></MemoryEnv>
- <Cmp></Cmp>
- <Asm></Asm>
- <Linker></Linker>
- <OHString></OHString>
- <InfinionOptionDll></InfinionOptionDll>
- <SLE66CMisc></SLE66CMisc>
- <SLE66AMisc></SLE66AMisc>
- <SLE66LinkerMisc></SLE66LinkerMisc>
- <SFDFile></SFDFile>
- <UseEnv>0</UseEnv>
- <BinPath></BinPath>
- <IncludePath></IncludePath>
- <LibPath></LibPath>
- <RegisterFilePath></RegisterFilePath>
- <DBRegisterFilePath></DBRegisterFilePath>
- <TargetStatus>
- <Error>0</Error>
- <ExitCodeStop>0</ExitCodeStop>
- <ButtonStop>0</ButtonStop>
- <NotGenerated>0</NotGenerated>
- <InvalidFlash>1</InvalidFlash>
- </TargetStatus>
- <OutputDirectory>.\</OutputDirectory>
- <OutputName>gpio_tests</OutputName>
- <CreateExecutable>1</CreateExecutable>
- <CreateLib>0</CreateLib>
- <CreateHexFile>0</CreateHexFile>
- <DebugInformation>1</DebugInformation>
- <BrowseInformation>1</BrowseInformation>
- <ListingPath>.\</ListingPath>
- <HexFormatSelection>1</HexFormatSelection>
- <Merge32K>0</Merge32K>
- <CreateBatchFile>0</CreateBatchFile>
- <BeforeCompile>
- <RunUserProg1>0</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- <nStopU1X>0</nStopU1X>
- <nStopU2X>0</nStopU2X>
- </BeforeCompile>
- <BeforeMake>
- <RunUserProg1>0</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- </BeforeMake>
- <AfterMake>
- <RunUserProg1>1</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name>$K\ARM\ARMCC\BIN\fromelf.exe #L --vhx --8x1 --output gpio_tests.hex</UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- </AfterMake>
- <SelectedForBatchBuild>0</SelectedForBatchBuild>
- <SVCSIdString></SVCSIdString>
- </TargetCommonOption>
- <CommonProperty>
- <UseCPPCompiler>0</UseCPPCompiler>
- <RVCTCodeConst>0</RVCTCodeConst>
- <RVCTZI>0</RVCTZI>
- <RVCTOtherData>0</RVCTOtherData>
- <ModuleSelection>0</ModuleSelection>
- <IncludeInBuild>1</IncludeInBuild>
- <AlwaysBuild>0</AlwaysBuild>
- <GenerateAssemblyFile>0</GenerateAssemblyFile>
- <AssembleAssemblyFile>0</AssembleAssemblyFile>
- <PublicsOnly>0</PublicsOnly>
- <StopOnExitCode>3</StopOnExitCode>
- <CustomArgument></CustomArgument>
- <IncludeLibraryModules></IncludeLibraryModules>
- </CommonProperty>
- <DllOption>
- <SimDllName>SARMCM3.DLL</SimDllName>
- <SimDllArguments></SimDllArguments>
- <SimDlgDll>DARMCM1.DLL</SimDlgDll>
- <SimDlgDllArguments></SimDlgDllArguments>
- <TargetDllName>SARMCM3.DLL</TargetDllName>
- <TargetDllArguments></TargetDllArguments>
- <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
- <TargetDlgDllArguments></TargetDlgDllArguments>
- </DllOption>
- <DebugOption>
- <OPTHX>
- <HexSelection>1</HexSelection>
- <HexRangeLowAddress>0</HexRangeLowAddress>
- <HexRangeHighAddress>0</HexRangeHighAddress>
- <HexOffset>0</HexOffset>
- <Oh166RecLen>16</Oh166RecLen>
- </OPTHX>
- <Simulator>
- <UseSimulator>1</UseSimulator>
- <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
- <RunToMain>1</RunToMain>
- <RestoreBreakpoints>1</RestoreBreakpoints>
- <RestoreWatchpoints>1</RestoreWatchpoints>
- <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
- <RestoreFunctions>1</RestoreFunctions>
- <RestoreToolbox>1</RestoreToolbox>
- <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
- </Simulator>
- <Target>
- <UseTarget>0</UseTarget>
- <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
- <RunToMain>0</RunToMain>
- <RestoreBreakpoints>1</RestoreBreakpoints>
- <RestoreWatchpoints>1</RestoreWatchpoints>
- <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
- <RestoreFunctions>0</RestoreFunctions>
- <RestoreToolbox>1</RestoreToolbox>
- </Target>
- <RunDebugAfterBuild>0</RunDebugAfterBuild>
- <TargetSelection>-1</TargetSelection>
- <SimDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
- </SimDlls>
- <TargetDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
- <Driver></Driver>
- </TargetDlls>
- </DebugOption>
- <Utilities>
- <Flash1>
- <UseTargetDll>0</UseTargetDll>
- <UseExternalTool>0</UseExternalTool>
- <RunIndependent>0</RunIndependent>
- <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
- <Capability>0</Capability>
- <DriverSelection>-1</DriverSelection>
- </Flash1>
- <Flash2></Flash2>
- <Flash3></Flash3>
- <Flash4></Flash4>
- </Utilities>
- <TargetArmAds>
- <ArmAdsMisc>
- <GenerateListings>0</GenerateListings>
- <asHll>1</asHll>
- <asAsm>1</asAsm>
- <asMacX>1</asMacX>
- <asSyms>1</asSyms>
- <asFals>1</asFals>
- <asDbgD>1</asDbgD>
- <asForm>1</asForm>
- <ldLst>0</ldLst>
- <ldmm>1</ldmm>
- <ldXref>1</ldXref>
- <BigEnd>0</BigEnd>
- <AdsALst>1</AdsALst>
- <AdsACrf>1</AdsACrf>
- <AdsANop>0</AdsANop>
- <AdsANot>0</AdsANot>
- <AdsLLst>1</AdsLLst>
- <AdsLmap>1</AdsLmap>
- <AdsLcgr>1</AdsLcgr>
- <AdsLsym>1</AdsLsym>
- <AdsLszi>1</AdsLszi>
- <AdsLtoi>1</AdsLtoi>
- <AdsLsun>1</AdsLsun>
- <AdsLven>1</AdsLven>
- <AdsLsxf>1</AdsLsxf>
- <RvctClst>0</RvctClst>
- <GenPPlst>0</GenPPlst>
- <AdsCpuType>"Cortex-M0+"</AdsCpuType>
- <RvctDeviceName></RvctDeviceName>
- <mOS>0</mOS>
- <uocRom>0</uocRom>
- <uocRam>0</uocRam>
- <hadIROM>0</hadIROM>
- <hadIRAM>0</hadIRAM>
- <hadXRAM>0</hadXRAM>
- <uocXRam>0</uocXRam>
- <RvdsVP>0</RvdsVP>
- <hadIRAM2>0</hadIRAM2>
- <hadIROM2>0</hadIROM2>
- <StupSel>1</StupSel>
- <useUlib>0</useUlib>
- <EndSel>1</EndSel>
- <uLtcg>0</uLtcg>
- <RoSelD>0</RoSelD>
- <RwSelD>5</RwSelD>
- <CodeSel>0</CodeSel>
- <OptFeed>0</OptFeed>
- <NoZi1>0</NoZi1>
- <NoZi2>0</NoZi2>
- <NoZi3>0</NoZi3>
- <NoZi4>0</NoZi4>
- <NoZi5>0</NoZi5>
- <Ro1Chk>1</Ro1Chk>
- <Ro2Chk>0</Ro2Chk>
- <Ro3Chk>0</Ro3Chk>
- <Ir1Chk>0</Ir1Chk>
- <Ir2Chk>0</Ir2Chk>
- <Ra1Chk>1</Ra1Chk>
- <Ra2Chk>0</Ra2Chk>
- <Ra3Chk>0</Ra3Chk>
- <Im1Chk>0</Im1Chk>
- <Im2Chk>0</Im2Chk>
- <OnChipMemories>
- <Ocm1>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm1>
- <Ocm2>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm2>
- <Ocm3>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm3>
- <Ocm4>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm4>
- <Ocm5>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm5>
- <Ocm6>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm6>
- <IRAM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </IRAM>
- <IROM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </IROM>
- <XRAM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </XRAM>
- <OCR_RVCT1>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT1>
- <OCR_RVCT2>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT2>
- <OCR_RVCT3>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT3>
- <OCR_RVCT4>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT4>
- <OCR_RVCT5>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT5>
- <OCR_RVCT6>
- <Type>0</Type>
- <StartAddress>0x20000000</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT6>
- <OCR_RVCT7>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT7>
- <OCR_RVCT8>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT8>
- <OCR_RVCT9>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT9>
- <OCR_RVCT10>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT10>
- </OnChipMemories>
- <RvctStartVector></RvctStartVector>
- </ArmAdsMisc>
- <Cads>
- <interw>1</interw>
- <Optim>4</Optim>
- <oTime>0</oTime>
- <SplitLS>0</SplitLS>
- <OneElfS>0</OneElfS>
- <Strict>0</Strict>
- <EnumInt>0</EnumInt>
- <PlainCh>0</PlainCh>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <wLevel>0</wLevel>
- <uThumb>0</uThumb>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define>CORTEX_M0PLUS</Define>
- <Undefine></Undefine>
- <IncludePath>..\..\..\..\software\cmsis\CMSIS\Include; ..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Include; ..\..\..\..\software\common\retarget</IncludePath>
- </VariousControls>
- </Cads>
- <Aads>
- <interw>1</interw>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <thumb>0</thumb>
- <SplitLS>0</SplitLS>
- <SwStkChk>0</SwStkChk>
- <NoWarn>0</NoWarn>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define></Define>
- <Undefine></Undefine>
- <IncludePath></IncludePath>
- </VariousControls>
- </Aads>
- <LDads>
- <umfTarg>1</umfTarg>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <noStLib>0</noStLib>
- <RepFail>1</RepFail>
- <useFile>0</useFile>
- <TextAddressRange>0x00000000</TextAddressRange>
- <DataAddressRange>0x00000000</DataAddressRange>
- <ScatterFile></ScatterFile>
- <IncludeLibs></IncludeLibs>
- <IncludeLibsPath></IncludeLibsPath>
- <Misc></Misc>
- <LinkerInputFile></LinkerInputFile>
- <DisabledWarnings></DisabledWarnings>
- </LDads>
- </TargetArmAds>
- </TargetOption>
- <Groups>
- <Group>
- <GroupName>Startup</GroupName>
- <Files>
- <File>
- <FileName>startup_CMSDK_CM0plus.s</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>Application</GroupName>
- <Files>
- <File>
- <FileName>uart_stdout.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\uart_stdout.c</FilePath>
- </File>
- <File>
- <FileName>retarget.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\retarget.c</FilePath>
- </File>
- <File>
- <FileName>gpio_tests.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\validation\gpio_tests.c</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>System</GroupName>
- <Files>
- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/makefile
deleted file mode 100644
index 74e83c0..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/gpio_tests/makefile
+++ /dev/null
@@ -1,253 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2011-01-25 10:05:56 +0000 (Tue, 25 Jan 2011) $
-#
-# Revision : $Revision: 159421 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = gpio_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
- armlink $(ARM_LINK_OPTIONS) -o $@ $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-$(TESTNAME).lst : $(TESTNAME).ELF makefile
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c \
- $(SOFTWARE_DIR)/common/retarget/retarget.c \
- $(SOFTWARE_DIR)/common/retarget/uart_stdout.c \
- $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget \
- -L $(LINKER_SCRIPT_PATH) \
- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-
-clean :
- @rm -rf *.o
- @if [ -e $(TESTNAME).hex ] ; then \
- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
- fi
- @if [ -e $(TESTNAME).ELF ] ; then \
- rm -rf $(TESTNAME).ELF ; \
- fi
- @if [ -e $(TESTNAME).bin ] ; then \
- rm -rf $(TESTNAME).bin ; \
- fi
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
- @rm -rf *.d
- @rm -rf *.lnp
- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
- @rm -rf *._ia
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/.project b/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/.project
deleted file mode 100644
index b4807ed..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/.project
+++ /dev/null
@@ -1,11 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
- <name>hello</name>
- <comment></comment>
- <projects>
- </projects>
- <buildSpec>
- </buildSpec>
- <natures>
- </natures>
-</projectDescription>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello.c b/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello.c
deleted file mode 100644
index ab9d771..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- *-----------------------------------------------------------------------------
- * The confidential and proprietary information contained in this file may
- * only be used by a person authorised under and to the extent permitted
- * by a subsisting licensing agreement from Arm Limited or its affiliates.
- *
- * (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
- * ALL RIGHTS RESERVED
- *
- * This entire notice must be reproduced on all copies of this file
- * and copies of this file may only be made by a person if such person is
- * permitted to do so under the terms of a subsisting license agreement
- * from Arm Limited or its affiliates.
- *
- * SVN Information
- *
- * Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
- *
- * Revision : $Revision: 371321 $
- *
- * Release Information : Cortex-M System Design Kit-r1p1-00rel0
- *-----------------------------------------------------------------------------
- */
-
-#ifdef CORTEX_M0
-#include "CMSDK_CM0.h"
-#include "core_cm0.h"
-#endif
-
-#ifdef CORTEX_M0PLUS
-#include "CMSDK_CM0plus.h"
-#include "core_cm0plus.h"
-#endif
-
-#include <stdio.h>
-#include "uart_stdout.h"
-
-int main (void)
-{
- // UART init
- UartStdOutInit();
-
- printf("Hello world\n");
-
- printf("** TEST PASSED **\n");
-
- // End simulation
- UartEndSimulation();
-
- return 0;
-}
-
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello_cm0.uvopt
deleted file mode 100644
index 5145b64..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello_cm0.uvopt
+++ /dev/null
@@ -1,261 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
-
- <SchemaVersion>1.0</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Extensions>
- <cExt>*.c</cExt>
- <aExt>*.s*; *.src; *.a*</aExt>
- <oExt>*.obj</oExt>
- <lExt>*.lib</lExt>
- <tExt>*.txt; *.h; *.inc</tExt>
- <pExt>*.plm</pExt>
- <CppX>*.cpp</CppX>
- </Extensions>
-
- <DaveTm>
- <dwLowDateTime>0</dwLowDateTime>
- <dwHighDateTime>0</dwHighDateTime>
- </DaveTm>
-
- <Target>
- <TargetName>Debug</TargetName>
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- <ToolsetName>ARM-ADS</ToolsetName>
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- <OPTTT>
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- <RunSim>1</RunSim>
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- <OPTLEX>
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- <ListingPath>.\</ListingPath>
- </OPTLEX>
- <ListingPage>
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- <CCode>0</CCode>
- <CListInc>0</CListInc>
- <CSymb>0</CSymb>
- <LinkerCodeListing>0</LinkerCodeListing>
- </ListingPage>
- <OPTXL>
- <LMap>1</LMap>
- <LComments>1</LComments>
- <LGenerateSymbols>1</LGenerateSymbols>
- <LLibSym>1</LLibSym>
- <LLines>1</LLines>
- <LLocSym>1</LLocSym>
- <LPubSym>1</LPubSym>
- <LXref>0</LXref>
- <LExpSel>0</LExpSel>
- </OPTXL>
- <OPTFL>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>1</IsCurrentTarget>
- </OPTFL>
- <CpuCode>255</CpuCode>
- <DllOpt>
- <SimDllName>SARMCM3.DLL</SimDllName>
- <SimDllArguments></SimDllArguments>
- <SimDlgDllName>DARMCM1.DLL</SimDlgDllName>
- <SimDlgDllArguments></SimDlgDllArguments>
- <TargetDllName>SARMCM3.DLL</TargetDllName>
- <TargetDllArguments></TargetDllArguments>
- <TargetDlgDllName>TARMCM1.DLL</TargetDlgDllName>
- <TargetDlgDllArguments></TargetDlgDllArguments>
- </DllOpt>
- <DebugOpt>
- <uSim>1</uSim>
- <uTrg>0</uTrg>
- <sLdApp>1</sLdApp>
- <sGomain>1</sGomain>
- <sRbreak>1</sRbreak>
- <sRwatch>1</sRwatch>
- <sRmem>1</sRmem>
- <sRfunc>1</sRfunc>
- <sRbox>1</sRbox>
- <tLdApp>1</tLdApp>
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- <sRunDeb>0</sRunDeb>
- <sLrtime>0</sLrtime>
- <nTsel>-1</nTsel>
- <sDll></sDll>
- <sDllPa></sDllPa>
- <sDlgDll></sDlgDll>
- <sDlgPa></sDlgPa>
- <sIfile></sIfile>
- <tDll></tDll>
- <tDllPa></tDllPa>
- <tDlgDll></tDlgDll>
- <tDlgPa></tDlgPa>
- <tIfile></tIfile>
- <pMon></pMon>
- </DebugOpt>
- <Breakpoint/>
- <DebugFlag>
- <trace>0</trace>
- <periodic>1</periodic>
- <aLwin>0</aLwin>
- <aCover>0</aCover>
- <aSer1>0</aSer1>
- <aSer2>0</aSer2>
- <aPa>0</aPa>
- <viewmode>0</viewmode>
- <vrSel>0</vrSel>
- <aSym>0</aSym>
- <aTbox>0</aTbox>
- <AscS1>0</AscS1>
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- <AscS3>0</AscS3>
- <aSer3>0</aSer3>
- <eProf>0</eProf>
- <aLa>0</aLa>
- <aPa1>0</aPa1>
- <AscS4>0</AscS4>
- <aSer4>0</aSer4>
- <StkLoc>0</StkLoc>
- <TrcWin>0</TrcWin>
- <newCpu>0</newCpu>
- <uProt>0</uProt>
- </DebugFlag>
- <Tracepoint>
- <THDelay>0</THDelay>
- </Tracepoint>
- <LintExecutable></LintExecutable>
- <LintConfigFile></LintConfigFile>
- </TargetOption>
- </Target>
-
- <Group>
- <GroupName>Startup</GroupName>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <cbSel>0</cbSel>
- <RteFlg>0</RteFlg>
- <File>
- <GroupNumber>1</GroupNumber>
- <FileNumber>1</FileNumber>
- <FileType>2</FileType>
- <tvExp>0</tvExp>
- <Focus>0</Focus>
- <ColumnNumber>0</ColumnNumber>
- <tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>0</TopLine>
- <CurrentLine>0</CurrentLine>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0\Source\ARM\startup_CMSDK_CM0.s</PathWithFileName>
- <FilenameWithoutPath>startup_CMSDK_CM0.s</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- </Group>
-
- <Group>
- <GroupName>Application</GroupName>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <cbSel>0</cbSel>
- <RteFlg>0</RteFlg>
- <File>
- <GroupNumber>2</GroupNumber>
- <FileNumber>2</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <Focus>0</Focus>
- <ColumnNumber>0</ColumnNumber>
- <tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>0</TopLine>
- <CurrentLine>0</CurrentLine>
- <bDave2>0</bDave2>
- <PathWithFileName>.\hello.c</PathWithFileName>
- <FilenameWithoutPath>hello.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>2</GroupNumber>
- <FileNumber>3</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <Focus>0</Focus>
- <ColumnNumber>0</ColumnNumber>
- <tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>0</TopLine>
- <CurrentLine>0</CurrentLine>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\..\..\software\common\retarget\retarget.c</PathWithFileName>
- <FilenameWithoutPath>retarget.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>2</GroupNumber>
- <FileNumber>4</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <Focus>0</Focus>
- <ColumnNumber>0</ColumnNumber>
- <tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>0</TopLine>
- <CurrentLine>0</CurrentLine>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\..\..\software\common\retarget\uart_stdout.c</PathWithFileName>
- <FilenameWithoutPath>uart_stdout.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- </Group>
-
- <Group>
- <GroupName>System</GroupName>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <cbSel>0</cbSel>
- <RteFlg>0</RteFlg>
- <File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>5</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <Focus>0</Focus>
- <ColumnNumber>0</ColumnNumber>
- <tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>0</TopLine>
- <CurrentLine>0</CurrentLine>
- <bDave2>0</bDave2>
- <PathWithFileName>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0\Source\system_CMSDK_CM0.c</PathWithFileName>
- <FilenameWithoutPath>system_CMSDK_CM0.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- </Group>
-
-</ProjectOpt>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello_cm0.uvproj
deleted file mode 100644
index 6baba57..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello_cm0.uvproj
+++ /dev/null
@@ -1,435 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
-
- <SchemaVersion>1.1</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Targets>
- <Target>
- <TargetName>Debug</TargetName>
- <ToolsetNumber>0x4</ToolsetNumber>
- <ToolsetName>ARM-ADS</ToolsetName>
- <TargetOption>
- <TargetCommonOption>
- <Device>Cortex-M0</Device>
- <Vendor>ARM</Vendor>
- <Cpu>CLOCK(12000000) CPUTYPE("Cortex-M0") ESEL ELITTLE</Cpu>
- <FlashUtilSpec></FlashUtilSpec>
- <StartupFile></StartupFile>
- <FlashDriverDll></FlashDriverDll>
- <DeviceId>4803</DeviceId>
- <RegisterFile></RegisterFile>
- <MemoryEnv></MemoryEnv>
- <Cmp></Cmp>
- <Asm></Asm>
- <Linker></Linker>
- <OHString></OHString>
- <InfinionOptionDll></InfinionOptionDll>
- <SLE66CMisc></SLE66CMisc>
- <SLE66AMisc></SLE66AMisc>
- <SLE66LinkerMisc></SLE66LinkerMisc>
- <SFDFile></SFDFile>
- <UseEnv>0</UseEnv>
- <BinPath></BinPath>
- <IncludePath></IncludePath>
- <LibPath></LibPath>
- <RegisterFilePath></RegisterFilePath>
- <DBRegisterFilePath></DBRegisterFilePath>
- <TargetStatus>
- <Error>0</Error>
- <ExitCodeStop>0</ExitCodeStop>
- <ButtonStop>0</ButtonStop>
- <NotGenerated>0</NotGenerated>
- <InvalidFlash>1</InvalidFlash>
- </TargetStatus>
- <OutputDirectory>.\</OutputDirectory>
- <OutputName>hello</OutputName>
- <CreateExecutable>1</CreateExecutable>
- <CreateLib>0</CreateLib>
- <CreateHexFile>0</CreateHexFile>
- <DebugInformation>1</DebugInformation>
- <BrowseInformation>1</BrowseInformation>
- <ListingPath>.\</ListingPath>
- <HexFormatSelection>1</HexFormatSelection>
- <Merge32K>0</Merge32K>
- <CreateBatchFile>0</CreateBatchFile>
- <BeforeCompile>
- <RunUserProg1>0</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- <nStopU1X>0</nStopU1X>
- <nStopU2X>0</nStopU2X>
- </BeforeCompile>
- <BeforeMake>
- <RunUserProg1>0</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- </BeforeMake>
- <AfterMake>
- <RunUserProg1>1</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name>$K\ARM\ARMCC\BIN\fromelf.exe #L --vhx --8x1 --output hello.hex</UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- </AfterMake>
- <SelectedForBatchBuild>0</SelectedForBatchBuild>
- <SVCSIdString></SVCSIdString>
- </TargetCommonOption>
- <CommonProperty>
- <UseCPPCompiler>0</UseCPPCompiler>
- <RVCTCodeConst>0</RVCTCodeConst>
- <RVCTZI>0</RVCTZI>
- <RVCTOtherData>0</RVCTOtherData>
- <ModuleSelection>0</ModuleSelection>
- <IncludeInBuild>1</IncludeInBuild>
- <AlwaysBuild>0</AlwaysBuild>
- <GenerateAssemblyFile>0</GenerateAssemblyFile>
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- <PublicsOnly>0</PublicsOnly>
- <StopOnExitCode>3</StopOnExitCode>
- <CustomArgument></CustomArgument>
- <IncludeLibraryModules></IncludeLibraryModules>
- </CommonProperty>
- <DllOption>
- <SimDllName>SARMCM3.DLL</SimDllName>
- <SimDllArguments></SimDllArguments>
- <SimDlgDll>DARMCM1.DLL</SimDlgDll>
- <SimDlgDllArguments></SimDlgDllArguments>
- <TargetDllName>SARMCM3.DLL</TargetDllName>
- <TargetDllArguments></TargetDllArguments>
- <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
- <TargetDlgDllArguments></TargetDlgDllArguments>
- </DllOption>
- <DebugOption>
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- <HexRangeLowAddress>0</HexRangeLowAddress>
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- <Oh166RecLen>16</Oh166RecLen>
- </OPTHX>
- <Simulator>
- <UseSimulator>1</UseSimulator>
- <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
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- <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
- </Simulator>
- <Target>
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- <RestoreToolbox>1</RestoreToolbox>
- <RestoreTracepoints>0</RestoreTracepoints>
- </Target>
- <RunDebugAfterBuild>0</RunDebugAfterBuild>
- <TargetSelection>-1</TargetSelection>
- <SimDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
- </SimDlls>
- <TargetDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
- <Driver></Driver>
- </TargetDlls>
- </DebugOption>
- <Utilities>
- <Flash1>
- <UseTargetDll>1</UseTargetDll>
- <UseExternalTool>0</UseExternalTool>
- <RunIndependent>0</RunIndependent>
- <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
- <Capability>0</Capability>
- <DriverSelection>-1</DriverSelection>
- </Flash1>
- <Flash2></Flash2>
- <Flash3>"" ()</Flash3>
- <Flash4></Flash4>
- </Utilities>
- <TargetArmAds>
- <ArmAdsMisc>
- <GenerateListings>0</GenerateListings>
- <asHll>1</asHll>
- <asAsm>1</asAsm>
- <asMacX>1</asMacX>
- <asSyms>1</asSyms>
- <asFals>1</asFals>
- <asDbgD>1</asDbgD>
- <asForm>1</asForm>
- <ldLst>0</ldLst>
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- <BigEnd>0</BigEnd>
- <AdsALst>1</AdsALst>
- <AdsACrf>1</AdsACrf>
- <AdsANop>0</AdsANop>
- <AdsANot>0</AdsANot>
- <AdsLLst>1</AdsLLst>
- <AdsLmap>1</AdsLmap>
- <AdsLcgr>1</AdsLcgr>
- <AdsLsym>1</AdsLsym>
- <AdsLszi>1</AdsLszi>
- <AdsLtoi>1</AdsLtoi>
- <AdsLsun>1</AdsLsun>
- <AdsLven>1</AdsLven>
- <AdsLsxf>1</AdsLsxf>
- <RvctClst>0</RvctClst>
- <GenPPlst>0</GenPPlst>
- <AdsCpuType>"Cortex-M0"</AdsCpuType>
- <RvctDeviceName></RvctDeviceName>
- <mOS>0</mOS>
- <uocRom>0</uocRom>
- <uocRam>0</uocRam>
- <hadIROM>0</hadIROM>
- <hadIRAM>0</hadIRAM>
- <hadXRAM>0</hadXRAM>
- <uocXRam>0</uocXRam>
- <RvdsVP>0</RvdsVP>
- <hadIRAM2>0</hadIRAM2>
- <hadIROM2>0</hadIROM2>
- <StupSel>1</StupSel>
- <useUlib>0</useUlib>
- <EndSel>1</EndSel>
- <uLtcg>0</uLtcg>
- <RoSelD>0</RoSelD>
- <RwSelD>5</RwSelD>
- <CodeSel>0</CodeSel>
- <OptFeed>0</OptFeed>
- <NoZi1>0</NoZi1>
- <NoZi2>0</NoZi2>
- <NoZi3>0</NoZi3>
- <NoZi4>0</NoZi4>
- <NoZi5>0</NoZi5>
- <Ro1Chk>1</Ro1Chk>
- <Ro2Chk>0</Ro2Chk>
- <Ro3Chk>0</Ro3Chk>
- <Ir1Chk>0</Ir1Chk>
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- <Ra1Chk>1</Ra1Chk>
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- <Ra3Chk>0</Ra3Chk>
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- <OnChipMemories>
- <Ocm1>
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- </Ocm1>
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/hello_cm0p.uvopt
deleted file mode 100644
index c39e058..0000000
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+++ /dev/null
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deleted file mode 100644
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+++ /dev/null
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- <AdsCpuType>"Cortex-M0+"</AdsCpuType>
- <RvctDeviceName></RvctDeviceName>
- <mOS>0</mOS>
- <uocRom>0</uocRom>
- <uocRam>0</uocRam>
- <hadIROM>0</hadIROM>
- <hadIRAM>0</hadIRAM>
- <hadXRAM>0</hadXRAM>
- <uocXRam>0</uocXRam>
- <RvdsVP>0</RvdsVP>
- <hadIRAM2>0</hadIRAM2>
- <hadIROM2>0</hadIROM2>
- <StupSel>1</StupSel>
- <useUlib>0</useUlib>
- <EndSel>1</EndSel>
- <uLtcg>0</uLtcg>
- <RoSelD>0</RoSelD>
- <RwSelD>5</RwSelD>
- <CodeSel>0</CodeSel>
- <OptFeed>0</OptFeed>
- <NoZi1>0</NoZi1>
- <NoZi2>0</NoZi2>
- <NoZi3>0</NoZi3>
- <NoZi4>0</NoZi4>
- <NoZi5>0</NoZi5>
- <Ro1Chk>1</Ro1Chk>
- <Ro2Chk>0</Ro2Chk>
- <Ro3Chk>0</Ro3Chk>
- <Ir1Chk>0</Ir1Chk>
- <Ir2Chk>0</Ir2Chk>
- <Ra1Chk>1</Ra1Chk>
- <Ra2Chk>0</Ra2Chk>
- <Ra3Chk>0</Ra3Chk>
- <Im1Chk>0</Im1Chk>
- <Im2Chk>0</Im2Chk>
- <OnChipMemories>
- <Ocm1>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm1>
- <Ocm2>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm2>
- <Ocm3>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm3>
- <Ocm4>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm4>
- <Ocm5>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm5>
- <Ocm6>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm6>
- <IRAM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </IRAM>
- <IROM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
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- <XRAM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </XRAM>
- <OCR_RVCT1>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT1>
- <OCR_RVCT2>
- <Type>1</Type>
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- </OCR_RVCT2>
- <OCR_RVCT3>
- <Type>1</Type>
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- <Size>0x0</Size>
- </OCR_RVCT3>
- <OCR_RVCT4>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT4>
- <OCR_RVCT5>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT5>
- <OCR_RVCT6>
- <Type>0</Type>
- <StartAddress>0x20000000</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT6>
- <OCR_RVCT7>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT7>
- <OCR_RVCT8>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT8>
- <OCR_RVCT9>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT9>
- <OCR_RVCT10>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT10>
- </OnChipMemories>
- <RvctStartVector></RvctStartVector>
- </ArmAdsMisc>
- <Cads>
- <interw>1</interw>
- <Optim>4</Optim>
- <oTime>0</oTime>
- <SplitLS>0</SplitLS>
- <OneElfS>0</OneElfS>
- <Strict>0</Strict>
- <EnumInt>0</EnumInt>
- <PlainCh>0</PlainCh>
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- <Rwpi>0</Rwpi>
- <wLevel>0</wLevel>
- <uThumb>0</uThumb>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define>CORTEX_M0PLUS</Define>
- <Undefine></Undefine>
- <IncludePath>..\..\..\..\software\cmsis\CMSIS\Include; ..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Include; ..\..\..\..\software\common\retarget</IncludePath>
- </VariousControls>
- </Cads>
- <Aads>
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- <SwStkChk>0</SwStkChk>
- <NoWarn>0</NoWarn>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define></Define>
- <Undefine></Undefine>
- <IncludePath></IncludePath>
- </VariousControls>
- </Aads>
- <LDads>
- <umfTarg>1</umfTarg>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <noStLib>0</noStLib>
- <RepFail>1</RepFail>
- <useFile>0</useFile>
- <TextAddressRange>0x00000000</TextAddressRange>
- <DataAddressRange>0x00000000</DataAddressRange>
- <ScatterFile></ScatterFile>
- <IncludeLibs></IncludeLibs>
- <IncludeLibsPath></IncludeLibsPath>
- <Misc></Misc>
- <LinkerInputFile></LinkerInputFile>
- <DisabledWarnings></DisabledWarnings>
- </LDads>
- </TargetArmAds>
- </TargetOption>
- <Groups>
- <Group>
- <GroupName>Startup</GroupName>
- <Files>
- <File>
- <FileName>startup_CMSDK_CM0plus.s</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>Application</GroupName>
- <Files>
- <File>
- <FileName>hello.c</FileName>
- <FileType>1</FileType>
- <FilePath>.\hello.c</FilePath>
- </File>
- <File>
- <FileName>retarget.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\retarget.c</FilePath>
- </File>
- <File>
- <FileName>uart_stdout.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\uart_stdout.c</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>System</GroupName>
- <Files>
- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/makefile
deleted file mode 100644
index e8ac4ee..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/hello/makefile
+++ /dev/null
@@ -1,255 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = hello
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-#ARM_CC_OPTIONS = -c -O3 -g -Otime -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
-# -I $(SOFTWARE_DIR)/common/retarget $(USER_DEFINE)
-#ARM_ASM_OPTIONS = -g
-#ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
-# --rw_base 0x30000000 --ro_base 0x00000000 --map --info sizes
-
-ARM_CC_OPTIONS = -c -O3 -Ospace -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget $(USER_DEFINE)
-ARM_ASM_OPTIONS =
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --no_debug --rw_base 0x30000000 --ro_base 0x00000000 --map --info sizes
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
- armlink $(ARM_LINK_OPTIONS) $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o -o $@
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-$(TESTNAME).lst : $(TESTNAME).ELF
- fromelf -c -d -e -s -z -v $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(TESTNAME).c \
- $(SOFTWARE_DIR)/common/retarget/retarget.c \
- $(SOFTWARE_DIR)/common/retarget/uart_stdout.c \
- $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget \
- -L $(LINKER_SCRIPT_PATH) \
- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-clean :
- @rm -rf *.o
- @if [ -e $(TESTNAME).hex ] ; then \
- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
- fi
- @if [ -e $(TESTNAME).ELF ] ; then \
- rm -rf $(TESTNAME).ELF ; \
- fi
- @if [ -e $(TESTNAME).bin ] ; then \
- rm -rf $(TESTNAME).bin ; \
- fi
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
- @rm -rf *.d
- @rm -rf *.lnp
- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
- @rm -rf *._ia
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/interrupt_demo_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/interrupt_demo_cm0.uvopt
deleted file mode 100644
index 08449be..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/interrupt_demo_cm0.uvopt
+++ /dev/null
@@ -1,277 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
-
- <SchemaVersion>1.0</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Extensions>
- <cExt>*.c</cExt>
- <aExt>*.s*; *.src; *.a*</aExt>
- <oExt>*.obj</oExt>
- <lExt>*.lib</lExt>
- <tExt>*.txt; *.h; *.inc</tExt>
- <pExt>*.plm</pExt>
- <CppX>*.cpp</CppX>
- </Extensions>
-
- <DaveTm>
- <dwLowDateTime>0</dwLowDateTime>
- <dwHighDateTime>0</dwHighDateTime>
- </DaveTm>
-
- <Target>
- <TargetName>Debug</TargetName>
- <ToolsetNumber>0x4</ToolsetNumber>
- <ToolsetName>ARM-ADS</ToolsetName>
- <TargetOption>
- <CLKADS>50000000</CLKADS>
- <OPTTT>
- <gFlags>1</gFlags>
- <BeepAtEnd>1</BeepAtEnd>
- <RunSim>1</RunSim>
- <RunTarget>0</RunTarget>
- </OPTTT>
- <OPTHX>
- <HexSelection>1</HexSelection>
- <FlashByte>65535</FlashByte>
- <HexRangeLowAddress>0</HexRangeLowAddress>
- <HexRangeHighAddress>0</HexRangeHighAddress>
- <HexOffset>0</HexOffset>
- </OPTHX>
- <OPTLEX>
- <PageWidth>79</PageWidth>
- <PageLength>66</PageLength>
- <TabStop>8</TabStop>
- <ListingPath>.\</ListingPath>
- </OPTLEX>
- <ListingPage>
- <CreateCListing>1</CreateCListing>
- <CreateAListing>1</CreateAListing>
- <CreateLListing>1</CreateLListing>
- <CreateIListing>0</CreateIListing>
- <AsmCond>1</AsmCond>
- <AsmSymb>1</AsmSymb>
- <AsmXref>0</AsmXref>
- <CCond>1</CCond>
- <CCode>0</CCode>
- <CListInc>0</CListInc>
- <CSymb>0</CSymb>
- <LinkerCodeListing>0</LinkerCodeListing>
- </ListingPage>
- <OPTXL>
- <LMap>1</LMap>
- <LComments>1</LComments>
- <LGenerateSymbols>1</LGenerateSymbols>
- <LLibSym>1</LLibSym>
- <LLines>1</LLines>
- <LLocSym>1</LLocSym>
- <LPubSym>1</LPubSym>
- <LXref>0</LXref>
- <LExpSel>0</LExpSel>
- </OPTXL>
- <OPTFL>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>1</IsCurrentTarget>
- </OPTFL>
- <CpuCode>255</CpuCode>
- <DllOpt>
- <SimDllName>SARMCM3.DLL</SimDllName>
- <SimDllArguments></SimDllArguments>
- <SimDlgDllName>DARMCM1.DLL</SimDlgDllName>
- <SimDlgDllArguments></SimDlgDllArguments>
- <TargetDllName>SARMCM3.DLL</TargetDllName>
- <TargetDllArguments></TargetDllArguments>
- <TargetDlgDllName>TARMCM1.DLL</TargetDlgDllName>
- <TargetDlgDllArguments></TargetDlgDllArguments>
- </DllOpt>
- <DebugOpt>
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- <sGomain>1</sGomain>
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- <sRfunc>1</sRfunc>
- <sRbox>1</sRbox>
- <tLdApp>1</tLdApp>
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- <tRbreak>1</tRbreak>
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- <tRmem>1</tRmem>
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- </DebugOpt>
- <Breakpoint/>
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- <uProt>0</uProt>
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- <Group>
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/interrupt_demo_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/interrupt_demo_cm0p.uvopt
deleted file mode 100644
index d09b1c7..0000000
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/interrupt_demo_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/interrupt_demo_cm0p.uvproj
deleted file mode 100644
index 58b9dd6..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/interrupt_demo_cm0p.uvproj
+++ /dev/null
@@ -1,437 +0,0 @@
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- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/makefile
deleted file mode 100644
index 7966b80..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/interrupt_demo/makefile
+++ /dev/null
@@ -1,255 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2011-01-25 10:05:56 +0000 (Tue, 25 Jan 2011) $
-#
-# Revision : $Revision: 159421 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = interrupt_demo
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/demos/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-CMSDK_driver.o : $(DEVICE_DIR)/Source/CMSDK_driver.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o CMSDK_driver.o
- armlink $(ARM_LINK_OPTIONS) -o $@ $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o CMSDK_driver.o
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-$(TESTNAME).lst : $(TESTNAME).ELF makefile
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(SOFTWARE_DIR)/common/demos/$(TESTNAME).c \
- $(SOFTWARE_DIR)/common/retarget/retarget.c \
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- $(DEVICE_DIR)/Source/CMSDK_driver.c \
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- -L $(LINKER_SCRIPT_PATH) \
- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-# ---------------------------------------------------------------------------------------
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-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
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-
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- @rm -rf *.o
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- rm -rf $(TESTNAME).hex ; \
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- rm -rf $(TESTNAME).lst ; \
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- @rm -rf *._ia
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/memory_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/memory_tests/makefile
deleted file mode 100644
index 0f01637..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/memory_tests/makefile
+++ /dev/null
@@ -1,251 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = memory_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
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-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
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-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
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-$(TESTNAME).o : $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c $(DEPS_LIST)
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-$(TESTNAME).hex : $(TESTNAME).ELF
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-$(TESTNAME).lst : $(TESTNAME).ELF makefile
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/memory_tests/memory_tests_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/memory_tests/memory_tests_cm0.uvopt
deleted file mode 100644
index e832157..0000000
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deleted file mode 100644
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deleted file mode 100644
index a339a79..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/memory_tests/memory_tests_cm0p.uvproj
+++ /dev/null
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/makefile
deleted file mode 100644
index b1b195a..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/makefile
+++ /dev/null
@@ -1,266 +0,0 @@
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-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
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-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0.uvopt
deleted file mode 100644
index f5deaa3..0000000
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0.uvproj
deleted file mode 100644
index 94e86e6..0000000
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0p.uvopt
deleted file mode 100644
index 1819e74..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0p.uvopt
+++ /dev/null
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0p.uvproj
deleted file mode 100644
index b3ed42c..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/romtable_tests/romtable_tests_cm0p.uvproj
+++ /dev/null
@@ -1,442 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/RTX_Config.c b/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/RTX_Config.c
deleted file mode 100644
index 262cc79..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/RTX_Config.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- *-----------------------------------------------------------------------------
- * The confidential and proprietary information contained in this file may
- * only be used by a person authorised under and to the extent permitted
- * by a subsisting licensing agreement from Arm Limited or its affiliates.
- *
- * (C) COPYRIGHT 2010-2011 Arm Limited or its affiliates.
- * ALL RIGHTS RESERVED
- *
- * This entire notice must be reproduced on all copies of this file
- * and copies of this file may only be made by a person if such person is
- * permitted to do so under the terms of a subsisting license agreement
- * from Arm Limited or its affiliates.
- *
- * SVN Information
- *
- * Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
- *
- * Revision : $Revision: 371321 $
- *
- * Release Information : Cortex-M System Design Kit-r1p1-00rel0
- *-----------------------------------------------------------------------------
- */
-
-/*----------------------------------------------------------------------------
- * R T L - K e r n e l
- *----------------------------------------------------------------------------
- * Name: RTX_CONFIG.C
- * Purpose: Configuration of RTX Kernel for Cortex-M
- * Rev.: V3.40
- *----------------------------------------------------------------------------
-*/
-
-#include <RTL.h>
-
-/*----------------------------------------------------------------------------
- * RTX User configuration part BEGIN
- *---------------------------------------------------------------------------*/
-
-//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
-//
-// <h>Task Definitions
-// ===================
-//
-// <o>Number of concurrent running tasks <0-250>
-// <i> Define max. number of tasks that will run at the same time.
-// <i> Default: 6
-#ifndef OS_TASKCNT
- #define OS_TASKCNT 6
-#endif
-
-// <o>Number of tasks with user-provided stack <0-250>
-// <i> Define the number of tasks that will use a bigger stack.
-// <i> The memory space for the stack is provided by the user.
-// <i> Default: 0
-#ifndef OS_PRIVCNT
- #define OS_PRIVCNT 0
-#endif
-
-// <o>Task stack size [bytes] <20-4096:8><#/4>
-// <i> Set the stack size for tasks which is assigned by the system.
-// <i> Default: 200
-#ifndef OS_STKSIZE
- #define OS_STKSIZE 200
-#endif
-
-// <q>Check for the stack overflow
-// ===============================
-// <i> Include the stack checking code for a stack overflow.
-// <i> Note that additional code reduces the Kernel performance.
-#ifndef OS_STKCHECK
- #define OS_STKCHECK 1
-#endif
-
-// <q>Run in privileged mode
-// =========================
-// <i> Run all Tasks in privileged mode.
-// <i> Default: Unprivileged
-#ifndef OS_RUNPRIV
- #define OS_RUNPRIV 0
-#endif
-
-// <o>Number of user timers <0-250>
-// <i> Define max. number of user timers that will run at the same time.
-// <i> Default: 0 (User timers disabled)
-#ifndef OS_TIMERCNT
- #define OS_TIMERCNT 0
-#endif
-
-// </h>
-// <h>SysTick Timer Configuration
-// =============================
-// <o>Timer clock value [Hz] <1-1000000000>
-// <i> Set the timer clock value for selected timer.
-// <i> Default: 6000000 (6MHz)
-#ifndef OS_CLOCK
- #define OS_CLOCK 50000000
-#endif
-
-// <o>Timer tick value [us] <1-1000000>
-// <i> Set the timer tick value for selected timer.
-// <i> Default: 10000 (10ms)
-#ifndef OS_TICK
- #define OS_TICK 200
-#endif
-
-// </h>
-// <e>Round-Robin Task switching
-// =============================
-// <i> Enable Round-Robin Task switching.
-#ifndef OS_ROBIN
- #define OS_ROBIN 1
-#endif
-
-// <o>Round-Robin Timeout [ticks] <1-1000>
-// <i> Define how long a task will execute before a task switch.
-// <i> Default: 5
-#ifndef OS_ROBINTOUT
- #define OS_ROBINTOUT 5
-#endif
-
-// </e>
-
-//------------- <<< end of configuration section >>> -----------------------
-
-// Standard library system mutexes
-// ===============================
-// Define max. number system mutexes that are used to protect
-// the arm standard runtime library. For microlib they are not used.
-#ifndef OS_MUTEXCNT
- #define OS_MUTEXCNT 8
-#endif
-
-/*----------------------------------------------------------------------------
- * RTX User configuration part END
- *---------------------------------------------------------------------------*/
-
-#define OS_TRV ((U32)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
-
-/*----------------------------------------------------------------------------
- * Global Functions
- *---------------------------------------------------------------------------*/
-
-/*--------------------------- os_idle_demon ---------------------------------*/
-
-__task void os_idle_demon (void) {
- /* The idle demon is a system task, running when no other task is ready */
- /* to run. The 'os_xxx' function calls are not allowed from this task. */
-
- for (;;) {
- /* HERE: include optional user code to be executed when no task runs.*/
- }
-}
-
-
-/*--------------------------- os_tmr_call -----------------------------------*/
-
-void os_tmr_call (U16 info) {
- /* This function is called when the user timer has expired. Parameter */
- /* 'info' holds the value, defined when the timer was created. */
-
- /* HERE: include optional user code to be executed on timeout. */
-}
-
-
-/*--------------------------- os_stk_overflow -------------------------------*/
-
-void os_stk_overflow (OS_TID task_id) {
- /* This function is called when a stack overflow is detected. Parameter */
- /* 'task_id' holds the id of this task. You can use 'RTX Kernel' dialog,*/
- /* page 'Active Tasks' to check, which task needs a bigger stack. */
-
- /* HERE: include optional code to be executed on stack overflow. */
- for (;;);
-}
-
-
-/*----------------------------------------------------------------------------
- * RTX Configuration Functions
- *---------------------------------------------------------------------------*/
-
-#include <RTX_lib.c>
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
-
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/makefile
deleted file mode 100644
index b1edfa2..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/makefile
+++ /dev/null
@@ -1,101 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-TESTNAME = rtx_demo
-
-CPU_PRODUCT = CORTEX_M0PLUS
-HEXFILE = rtx_demo_cm0.hex
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0)
- HEXFILE = rtx_demo_cm0.hex
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- HEXFILE = rtx_demo_cm0p.hex
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-hexfile_select:
- @if [ -e $(HEXFILE) ] ; then \
- cp $(HEXFILE) rtx_demo.hex ; \
- fi
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-all_ds5 : hexfile_select
- @if [ -e $(TESTNAME).hex ] ; then \
- echo "Found rtx_demo.hex ... use existing hex file. Continue ..." ; \
- else \
- echo "RTX demo compilation not available for DS-5." ; \
- echo "Please compile RTX demo in Keil MDK and press ENTER when ready" ; \
- read dummy ; \
- fi
-
-# ---------------------------------------------------------------------------------------
-# gcc
-#
-all_gcc: hexfile_select
- @if [ -e $(TESTNAME).hex ] ; then \
- echo "Found rtx_demo.hex ... use existing hex file. Continue ..." ; \
- else \
- echo "RTX demo compilation not available for gcc." ;\
- echo "Please compile RTX demo in Keil MDK and press ENTER when ready" ; \
- read dummy ; \
- fi
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
- cp $(HEXFILE) rtx_demo.hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-clean :
- @rm -rf *.o
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
- @rm -rf *.d
- @rm -rf *.lnp
- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.uvgui.*
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo.c b/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo.c
deleted file mode 100644
index 9e885b7..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- *-----------------------------------------------------------------------------
- * The confidential and proprietary information contained in this file may
- * only be used by a person authorised under and to the extent permitted
- * by a subsisting licensing agreement from Arm Limited or its affiliates.
- *
- * (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
- * ALL RIGHTS RESERVED
- *
- * This entire notice must be reproduced on all copies of this file
- * and copies of this file may only be made by a person if such person is
- * permitted to do so under the terms of a subsisting license agreement
- * from Arm Limited or its affiliates.
- *
- * SVN Information
- *
- * Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
- *
- * Revision : $Revision: 371321 $
- *
- * Release Information : Cortex-M System Design Kit-r1p1-00rel0
- *-----------------------------------------------------------------------------
- */
-
-/* Simple demonstration of booting up an RTOS : Keil RTX */
-
-#include <RTL.h>
-#ifdef CORTEX_M0
-#include "CMSDK_CM0.h"
-#endif
-#ifdef CORTEX_M0PLUS
-#include "CMSDK_CM0plus.h"
-#endif
-#include <stdio.h>
-#include "uart_stdout.h"
-
-OS_TID t_task1; // Declare a task ID for task1 : Event generator
-OS_TID t_task2; // Declare a task ID for task2 : Event receiver
-int num = 0; // Counter
-
-__task void task1(void) { // Task 1 - Event generator
- while (1) {
- os_dly_wait(1);
- puts("task 1 ->");
- os_evt_set (0x0001, t_task2); // Send a event 0x0001 to task 2
- }
- }
-
-__task void task2(void) { // Task 2 - Event receiver
- while(1) {
- os_evt_wait_and (0x0001, 0xffff); // wait for an event flag 0x0001
- num ++;
- printf (" task 2, %d\n", num);
- if (num>=3) { /* Execute 3 times and stop simulation */
- puts("Tasks ran 3 times.");
- puts("** TEST PASSED ** \n");
- UartEndSimulation();
- }
- }
- }
-
-/* Initialize tasks */
-__task void init (void) {
- t_task1 = os_tsk_create (task1, 1); // Create a task "task1" with priority 1
- t_task2 = os_tsk_create (task2, 1); // Create a task "task2" with priority 1
- os_tsk_delete_self ();
-}
-
-
-int main(void)
-{
- // Starting from CMSIS 1.3,
- // CMSIS System Initialization function SystemInit() is called from startup code.
- // So there is no need to call it in here. (This test is based on CMSIS 2.0).
-
- SysTick->VAL=0; /* Initialize SysTick timer value */
-
- // UART init
- UartStdOutInit();
-
- // Test banner message and revision number
- puts("\nCortex Microcontroller System Design Kit - RTX Demo - revision $Revision: 371321 $\n");
- puts("- Execute task 1 -> task 2 sequence three times\n");
-
- os_sys_init(init); // Initialize OS
-} // end main
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0.hex b/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0.hex
deleted file mode 100644
index 1ab6c31..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0.hex
+++ /dev/null
@@ -1,4996 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0.uvopt
deleted file mode 100644
index ff858fa..0000000
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0.uvproj
deleted file mode 100644
index 6c7674d..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0.uvproj
+++ /dev/null
@@ -1,440 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0p.hex b/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0p.hex
deleted file mode 100644
index 1ab6c31..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0p.hex
+++ /dev/null
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deleted file mode 100644
index a123b28..0000000
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-
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- <FilenameWithoutPath>RTX_Config.c</FilenameWithoutPath>
- </File>
- <File>
- <GroupNumber>3</GroupNumber>
- <FileNumber>6</FileNumber>
- <FileType>1</FileType>
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- <FilenameWithoutPath>system_CMSDK_CM0plus.c</FilenameWithoutPath>
- </File>
- </Group>
-
-</ProjectOpt>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0p.uvproj
deleted file mode 100644
index 2093cad..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/rtx_demo/rtx_demo_cm0p.uvproj
+++ /dev/null
@@ -1,437 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
-
- <SchemaVersion>1.1</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Targets>
- <Target>
- <TargetName>Debug</TargetName>
- <ToolsetNumber>0x4</ToolsetNumber>
- <ToolsetName>ARM-ADS</ToolsetName>
- <TargetOption>
- <TargetCommonOption>
- <Device>Cortex-M0+</Device>
- <Vendor>ARM</Vendor>
- <Cpu>CLOCK(12000000) CPUTYPE("Cortex-M0+") ESEL ELITTLE</Cpu>
- <FlashUtilSpec></FlashUtilSpec>
- <StartupFile></StartupFile>
- <FlashDriverDll></FlashDriverDll>
- <DeviceId>6268</DeviceId>
- <RegisterFile></RegisterFile>
- <MemoryEnv></MemoryEnv>
- <Cmp></Cmp>
- <Asm></Asm>
- <Linker></Linker>
- <OHString></OHString>
- <InfinionOptionDll></InfinionOptionDll>
- <SLE66CMisc></SLE66CMisc>
- <SLE66AMisc></SLE66AMisc>
- <SLE66LinkerMisc></SLE66LinkerMisc>
- <SFDFile></SFDFile>
- <UseEnv>0</UseEnv>
- <BinPath></BinPath>
- <IncludePath></IncludePath>
- <LibPath></LibPath>
- <RegisterFilePath></RegisterFilePath>
- <DBRegisterFilePath></DBRegisterFilePath>
- <TargetStatus>
- <Error>0</Error>
- <ExitCodeStop>0</ExitCodeStop>
- <ButtonStop>0</ButtonStop>
- <NotGenerated>0</NotGenerated>
- <InvalidFlash>1</InvalidFlash>
- </TargetStatus>
- <OutputDirectory>.\</OutputDirectory>
- <OutputName>rtx_demo</OutputName>
- <CreateExecutable>1</CreateExecutable>
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- <CreateHexFile>0</CreateHexFile>
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- <CreateBatchFile>0</CreateBatchFile>
- <BeforeCompile>
- <RunUserProg1>0</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- <nStopU1X>0</nStopU1X>
- <nStopU2X>0</nStopU2X>
- </BeforeCompile>
- <BeforeMake>
- <RunUserProg1>0</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- </BeforeMake>
- <AfterMake>
- <RunUserProg1>1</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name>$K\ARM\ARMCC\BIN\fromelf.exe #L --vhx --8x1 --output rtx_demo_cm0p.hex</UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- </AfterMake>
- <SelectedForBatchBuild>0</SelectedForBatchBuild>
- <SVCSIdString></SVCSIdString>
- </TargetCommonOption>
- <CommonProperty>
- <UseCPPCompiler>0</UseCPPCompiler>
- <RVCTCodeConst>0</RVCTCodeConst>
- <RVCTZI>0</RVCTZI>
- <RVCTOtherData>0</RVCTOtherData>
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- <IncludeInBuild>1</IncludeInBuild>
- <AlwaysBuild>0</AlwaysBuild>
- <GenerateAssemblyFile>0</GenerateAssemblyFile>
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- <PublicsOnly>0</PublicsOnly>
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- <CustomArgument></CustomArgument>
- <IncludeLibraryModules></IncludeLibraryModules>
- </CommonProperty>
- <DllOption>
- <SimDllName>SARMCM3.DLL</SimDllName>
- <SimDllArguments></SimDllArguments>
- <SimDlgDll>DARMCM1.DLL</SimDlgDll>
- <SimDlgDllArguments></SimDlgDllArguments>
- <TargetDllName>SARMCM3.DLL</TargetDllName>
- <TargetDllArguments></TargetDllArguments>
- <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
- <TargetDlgDllArguments></TargetDlgDllArguments>
- </DllOption>
- <DebugOption>
- <OPTHX>
- <HexSelection>1</HexSelection>
- <HexRangeLowAddress>0</HexRangeLowAddress>
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- <HexOffset>0</HexOffset>
- <Oh166RecLen>16</Oh166RecLen>
- </OPTHX>
- <Simulator>
- <UseSimulator>1</UseSimulator>
- <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
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- <RestoreBreakpoints>1</RestoreBreakpoints>
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- <RestoreFunctions>1</RestoreFunctions>
- <RestoreToolbox>1</RestoreToolbox>
- <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
- </Simulator>
- <Target>
- <UseTarget>0</UseTarget>
- <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
- <RunToMain>0</RunToMain>
- <RestoreBreakpoints>1</RestoreBreakpoints>
- <RestoreWatchpoints>1</RestoreWatchpoints>
- <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
- <RestoreFunctions>0</RestoreFunctions>
- <RestoreToolbox>1</RestoreToolbox>
- </Target>
- <RunDebugAfterBuild>0</RunDebugAfterBuild>
- <TargetSelection>-1</TargetSelection>
- <SimDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
- </SimDlls>
- <TargetDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
- <Driver></Driver>
- </TargetDlls>
- </DebugOption>
- <Utilities>
- <Flash1>
- <UseTargetDll>0</UseTargetDll>
- <UseExternalTool>0</UseExternalTool>
- <RunIndependent>0</RunIndependent>
- <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
- <Capability>0</Capability>
- <DriverSelection>-1</DriverSelection>
- </Flash1>
- <Flash2></Flash2>
- <Flash3></Flash3>
- <Flash4></Flash4>
- </Utilities>
- <TargetArmAds>
- <ArmAdsMisc>
- <GenerateListings>0</GenerateListings>
- <asHll>1</asHll>
- <asAsm>1</asAsm>
- <asMacX>1</asMacX>
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- <asDbgD>1</asDbgD>
- <asForm>1</asForm>
- <ldLst>0</ldLst>
- <ldmm>1</ldmm>
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- <AdsLcgr>1</AdsLcgr>
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- <AdsLszi>1</AdsLszi>
- <AdsLtoi>1</AdsLtoi>
- <AdsLsun>1</AdsLsun>
- <AdsLven>1</AdsLven>
- <AdsLsxf>1</AdsLsxf>
- <RvctClst>0</RvctClst>
- <GenPPlst>0</GenPPlst>
- <AdsCpuType>"Cortex-M0+"</AdsCpuType>
- <RvctDeviceName></RvctDeviceName>
- <mOS>1</mOS>
- <uocRom>0</uocRom>
- <uocRam>0</uocRam>
- <hadIROM>0</hadIROM>
- <hadIRAM>0</hadIRAM>
- <hadXRAM>0</hadXRAM>
- <uocXRam>0</uocXRam>
- <RvdsVP>0</RvdsVP>
- <hadIRAM2>0</hadIRAM2>
- <hadIROM2>0</hadIROM2>
- <StupSel>1</StupSel>
- <useUlib>0</useUlib>
- <EndSel>1</EndSel>
- <uLtcg>0</uLtcg>
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- <CodeSel>0</CodeSel>
- <OptFeed>0</OptFeed>
- <NoZi1>0</NoZi1>
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- <NoZi5>0</NoZi5>
- <Ro1Chk>1</Ro1Chk>
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- </OCR_RVCT1>
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- </OCR_RVCT4>
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- </OCR_RVCT5>
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- <Type>0</Type>
- <StartAddress>0x20000000</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT6>
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- <StartAddress>0x0</StartAddress>
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- </OCR_RVCT7>
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- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT8>
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- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT9>
- <OCR_RVCT10>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT10>
- </OnChipMemories>
- <RvctStartVector></RvctStartVector>
- </ArmAdsMisc>
- <Cads>
- <interw>1</interw>
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- <oTime>0</oTime>
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- <MiscControls></MiscControls>
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- <Undefine></Undefine>
- <IncludePath>..\..\..\..\software\cmsis\CMSIS\Include; ..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Include; ..\..\..\..\software\common\retarget</IncludePath>
- </VariousControls>
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- <IncludePath></IncludePath>
- </VariousControls>
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- <Misc></Misc>
- <LinkerInputFile></LinkerInputFile>
- <DisabledWarnings></DisabledWarnings>
- </LDads>
- </TargetArmAds>
- </TargetOption>
- <Groups>
- <Group>
- <GroupName>Startup</GroupName>
- <Files>
- <File>
- <FileName>startup_CMSDK_CM0plus.s</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>Application</GroupName>
- <Files>
- <File>
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- <FileType>1</FileType>
- <FilePath>.\rtx_demo.c</FilePath>
- </File>
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- <FileName>uart_stdout.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\uart_stdout.c</FilePath>
- </File>
- <File>
- <FileName>retarget.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\retarget.c</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>System</GroupName>
- <Files>
- <File>
- <FileName>RTX_Config.c</FileName>
- <FileType>1</FileType>
- <FilePath>.\RTX_Config.c</FilePath>
- </File>
- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/makefile
deleted file mode 100644
index c8c4fb6..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/makefile
+++ /dev/null
@@ -1,251 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = self_reset_demo
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option (DS-5)
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime -I $(CORE_DIR) -I $(DEVICE_DIR)/Include \
- -I $(SOFTWARE_DIR)/common/retarget $(USER_DEFINE)
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/self_reset_demo_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/self_reset_demo_cm0.uvopt
deleted file mode 100644
index 5b72456..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/self_reset_demo_cm0.uvopt
+++ /dev/null
@@ -1,261 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/self_reset_demo_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/self_reset_demo_cm0.uvproj
deleted file mode 100644
index c4b4745..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/self_reset_demo_cm0.uvproj
+++ /dev/null
@@ -1,435 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/self_reset_demo_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/self_reset_demo_cm0p.uvopt
deleted file mode 100644
index 549db58..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/self_reset_demo/self_reset_demo_cm0p.uvopt
+++ /dev/null
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deleted file mode 100644
index d891cfc..0000000
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- </ArmAdsMisc>
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- </File>
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-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/makefile
deleted file mode 100644
index 504d509..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/makefile
+++ /dev/null
@@ -1,256 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2010-08-06 12:28:21 +0100 (Fri, 06 Aug 2010) $
-#
-# Revision : $Revision: 145378 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = sleep_demo
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option (DS-5)
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/demos/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-CMSDK_driver.o : $(DEVICE_DIR)/Source/CMSDK_driver.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o CMSDK_driver.o
- armlink $(ARM_LINK_OPTIONS) -o $@ $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o CMSDK_driver.o
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-$(TESTNAME).lst : $(TESTNAME).ELF makefile
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(SOFTWARE_DIR)/common/demos/$(TESTNAME).c \
- $(SOFTWARE_DIR)/common/retarget/retarget.c \
- $(SOFTWARE_DIR)/common/retarget/uart_stdout.c \
- $(DEVICE_DIR)/Source/CMSDK_driver.c \
- $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget \
- -L $(LINKER_SCRIPT_PATH) \
- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-
-# ---------------------------------------------------------------------------------------
-# Clean
-
-clean :
- @rm -rf *.o
- @if [ -e $(TESTNAME).hex ] ; then \
- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
- fi
- @if [ -e $(TESTNAME).ELF ] ; then \
- rm -rf $(TESTNAME).ELF ; \
- fi
- @if [ -e $(TESTNAME).bin ] ; then \
- rm -rf $(TESTNAME).bin ; \
- fi
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
- @rm -rf *.d
- @rm -rf *.lnp
- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
- @rm -rf *._ia
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/sleep_demo_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/sleep_demo_cm0.uvopt
deleted file mode 100644
index e742bfa..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/sleep_demo_cm0.uvopt
+++ /dev/null
@@ -1,277 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
-
- <SchemaVersion>1.0</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Extensions>
- <cExt>*.c</cExt>
- <aExt>*.s*; *.src; *.a*</aExt>
- <oExt>*.obj</oExt>
- <lExt>*.lib</lExt>
- <tExt>*.txt; *.h; *.inc</tExt>
- <pExt>*.plm</pExt>
- <CppX>*.cpp</CppX>
- </Extensions>
-
- <DaveTm>
- <dwLowDateTime>0</dwLowDateTime>
- <dwHighDateTime>0</dwHighDateTime>
- </DaveTm>
-
- <Target>
- <TargetName>Debug</TargetName>
- <ToolsetNumber>0x4</ToolsetNumber>
- <ToolsetName>ARM-ADS</ToolsetName>
- <TargetOption>
- <CLKADS>50000000</CLKADS>
- <OPTTT>
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deleted file mode 100644
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/sleep_demo_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/sleep_demo_cm0p.uvopt
deleted file mode 100644
index f87fdd6..0000000
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+++ /dev/null
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/sleep_demo_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/sleep_demo_cm0p.uvproj
deleted file mode 100644
index 02c40bb..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/sleep_demo/sleep_demo_cm0p.uvproj
+++ /dev/null
@@ -1,437 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_driver_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_driver_tests/makefile
deleted file mode 100644
index 7fa0fa3..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_driver_tests/makefile
+++ /dev/null
@@ -1,254 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2011-01-25 10:05:56 +0000 (Tue, 25 Jan 2011) $
-#
-# Revision : $Revision: 159421 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
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-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
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-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = timer_driver_tests
-
-# Endian Option
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-
-# Configuration
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- USER_DEFINE = -DCORTEX_M0
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- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
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- SYSTEM_FILE = system_CMSDK_CM0plus
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- STARTUP_FILE = startup_CMSDK_CM0
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-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
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- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
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-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
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-
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deleted file mode 100644
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_driver_tests/timer_driver_tests_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_driver_tests/timer_driver_tests_cm0p.uvopt
deleted file mode 100644
index a7ff673..0000000
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_driver_tests/timer_driver_tests_cm0p.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_driver_tests/timer_driver_tests_cm0p.uvproj
deleted file mode 100644
index 2d1ed68..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_driver_tests/timer_driver_tests_cm0p.uvproj
+++ /dev/null
@@ -1,437 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_tests/makefile
deleted file mode 100644
index 7133f7f..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_tests/makefile
+++ /dev/null
@@ -1,250 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = timer_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
- armlink $(ARM_LINK_OPTIONS) -o $@ $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-$(TESTNAME).lst : $(TESTNAME).ELF makefile
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_tests/timer_tests_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/timer_tests/timer_tests_cm0.uvproj
deleted file mode 100644
index b12e58d..0000000
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+++ /dev/null
@@ -1,435 +0,0 @@
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-
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_driver_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_driver_tests/makefile
deleted file mode 100644
index 1d02777..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_driver_tests/makefile
+++ /dev/null
@@ -1,255 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2011-01-25 10:05:56 +0000 (Tue, 25 Jan 2011) $
-#
-# Revision : $Revision: 159421 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = uart_driver_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime $(USER_DEFINE) \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) -I $(SOFTWARE_DIR)/common/retarget
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-CMSDK_driver.o : $(DEVICE_DIR)/Source/CMSDK_driver.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o CMSDK_driver.o
- armlink $(ARM_LINK_OPTIONS) -o $@ $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o CMSDK_driver.o
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-$(TESTNAME).lst : $(TESTNAME).ELF makefile
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(SOFTWARE_DIR)/common/validation/$(TESTNAME).c \
- $(SOFTWARE_DIR)/common/retarget/retarget.c \
- $(SOFTWARE_DIR)/common/retarget/uart_stdout.c \
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- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
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- @read dummy
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-
-clean :
- @rm -rf *.o
- @if [ -e $(TESTNAME).hex ] ; then \
- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
- fi
- @if [ -e $(TESTNAME).ELF ] ; then \
- rm -rf $(TESTNAME).ELF ; \
- fi
- @if [ -e $(TESTNAME).bin ] ; then \
- rm -rf $(TESTNAME).bin ; \
- fi
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
- @rm -rf *.d
- @rm -rf *.lnp
- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_driver_tests/uart_driver_tests_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_driver_tests/uart_driver_tests_cm0.uvopt
deleted file mode 100644
index dde1fbb..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_driver_tests/uart_driver_tests_cm0.uvopt
+++ /dev/null
@@ -1,277 +0,0 @@
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deleted file mode 100644
index cf69fa2..0000000
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_tests/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_tests/makefile
deleted file mode 100644
index e645bc4..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_tests/makefile
+++ /dev/null
@@ -1,251 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2011-01-25 10:05:56 +0000 (Tue, 25 Jan 2011) $
-#
-# Revision : $Revision: 159421 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
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-#
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-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
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-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
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-
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- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = uart_tests
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
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- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
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- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
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-
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- SYSTEM_FILE = system_CMSDK_CM0plus
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- SYSTEM_FILE = system_CMSDK_CM0
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-
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-
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deleted file mode 100644
index 2ae0b81..0000000
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_tests/uart_tests_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/uart_tests/uart_tests_cm0.uvproj
deleted file mode 100644
index 627ff29..0000000
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deleted file mode 100644
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deleted file mode 100644
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- <BeforeCompile>
- <RunUserProg1>0</RunUserProg1>
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- <UserProg1Name></UserProg1Name>
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- <UserProg1Name>$K\ARM\ARMCC\BIN\fromelf.exe #L --vhx --8x1 --output uart_tests.hex</UserProg1Name>
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- <SelectedForBatchBuild>0</SelectedForBatchBuild>
- <SVCSIdString></SVCSIdString>
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- <CommonProperty>
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- <Simulator>
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- <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
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- <RestoreToolbox>1</RestoreToolbox>
- <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
- </Simulator>
- <Target>
- <UseTarget>0</UseTarget>
- <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
- <RunToMain>0</RunToMain>
- <RestoreBreakpoints>1</RestoreBreakpoints>
- <RestoreWatchpoints>1</RestoreWatchpoints>
- <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
- <RestoreFunctions>0</RestoreFunctions>
- <RestoreToolbox>1</RestoreToolbox>
- </Target>
- <RunDebugAfterBuild>0</RunDebugAfterBuild>
- <TargetSelection>-1</TargetSelection>
- <SimDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
- </SimDlls>
- <TargetDlls>
- <CpuDll></CpuDll>
- <CpuDllArguments></CpuDllArguments>
- <PeripheralDll></PeripheralDll>
- <PeripheralDllArguments></PeripheralDllArguments>
- <InitializationFile></InitializationFile>
- <Driver></Driver>
- </TargetDlls>
- </DebugOption>
- <Utilities>
- <Flash1>
- <UseTargetDll>0</UseTargetDll>
- <UseExternalTool>0</UseExternalTool>
- <RunIndependent>0</RunIndependent>
- <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
- <Capability>0</Capability>
- <DriverSelection>-1</DriverSelection>
- </Flash1>
- <Flash2></Flash2>
- <Flash3></Flash3>
- <Flash4></Flash4>
- </Utilities>
- <TargetArmAds>
- <ArmAdsMisc>
- <GenerateListings>0</GenerateListings>
- <asHll>1</asHll>
- <asAsm>1</asAsm>
- <asMacX>1</asMacX>
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- <AdsLszi>1</AdsLszi>
- <AdsLtoi>1</AdsLtoi>
- <AdsLsun>1</AdsLsun>
- <AdsLven>1</AdsLven>
- <AdsLsxf>1</AdsLsxf>
- <RvctClst>0</RvctClst>
- <GenPPlst>0</GenPPlst>
- <AdsCpuType>"Cortex-M0+"</AdsCpuType>
- <RvctDeviceName></RvctDeviceName>
- <mOS>0</mOS>
- <uocRom>0</uocRom>
- <uocRam>0</uocRam>
- <hadIROM>0</hadIROM>
- <hadIRAM>0</hadIRAM>
- <hadXRAM>0</hadXRAM>
- <uocXRam>0</uocXRam>
- <RvdsVP>0</RvdsVP>
- <hadIRAM2>0</hadIRAM2>
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- <StupSel>1</StupSel>
- <useUlib>0</useUlib>
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- <Ro1Chk>1</Ro1Chk>
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- <Ro3Chk>0</Ro3Chk>
- <Ir1Chk>0</Ir1Chk>
- <Ir2Chk>0</Ir2Chk>
- <Ra1Chk>1</Ra1Chk>
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- <Ra3Chk>0</Ra3Chk>
- <Im1Chk>0</Im1Chk>
- <Im2Chk>0</Im2Chk>
- <OnChipMemories>
- <Ocm1>
- <Type>0</Type>
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- <Size>0x0</Size>
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- <Ocm2>
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- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm2>
- <Ocm3>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm3>
- <Ocm4>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm4>
- <Ocm5>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm5>
- <Ocm6>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm6>
- <IRAM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </IRAM>
- <IROM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </IROM>
- <XRAM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </XRAM>
- <OCR_RVCT1>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT1>
- <OCR_RVCT2>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT2>
- <OCR_RVCT3>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT3>
- <OCR_RVCT4>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT4>
- <OCR_RVCT5>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT5>
- <OCR_RVCT6>
- <Type>0</Type>
- <StartAddress>0x20000000</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT6>
- <OCR_RVCT7>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT7>
- <OCR_RVCT8>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT8>
- <OCR_RVCT9>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT9>
- <OCR_RVCT10>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT10>
- </OnChipMemories>
- <RvctStartVector></RvctStartVector>
- </ArmAdsMisc>
- <Cads>
- <interw>1</interw>
- <Optim>4</Optim>
- <oTime>0</oTime>
- <SplitLS>0</SplitLS>
- <OneElfS>0</OneElfS>
- <Strict>0</Strict>
- <EnumInt>0</EnumInt>
- <PlainCh>0</PlainCh>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <wLevel>0</wLevel>
- <uThumb>0</uThumb>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define>CORTEX_M0PLUS</Define>
- <Undefine></Undefine>
- <IncludePath>..\..\..\..\software\cmsis\CMSIS\Include; ..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Include; ..\..\..\..\software\common\retarget</IncludePath>
- </VariousControls>
- </Cads>
- <Aads>
- <interw>1</interw>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <thumb>0</thumb>
- <SplitLS>0</SplitLS>
- <SwStkChk>0</SwStkChk>
- <NoWarn>0</NoWarn>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define></Define>
- <Undefine></Undefine>
- <IncludePath></IncludePath>
- </VariousControls>
- </Aads>
- <LDads>
- <umfTarg>1</umfTarg>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <noStLib>0</noStLib>
- <RepFail>1</RepFail>
- <useFile>0</useFile>
- <TextAddressRange>0x00000000</TextAddressRange>
- <DataAddressRange>0x00000000</DataAddressRange>
- <ScatterFile></ScatterFile>
- <IncludeLibs></IncludeLibs>
- <IncludeLibsPath></IncludeLibsPath>
- <Misc></Misc>
- <LinkerInputFile></LinkerInputFile>
- <DisabledWarnings></DisabledWarnings>
- </LDads>
- </TargetArmAds>
- </TargetOption>
- <Groups>
- <Group>
- <GroupName>Startup</GroupName>
- <Files>
- <File>
- <FileName>startup_CMSDK_CM0plus.s</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>Application</GroupName>
- <Files>
- <File>
- <FileName>uart_stdout.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\uart_stdout.c</FilePath>
- </File>
- <File>
- <FileName>retarget.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\retarget.c</FilePath>
- </File>
- <File>
- <FileName>uart_tests.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\validation\uart_tests.c</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>System</GroupName>
- <Files>
- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/makefile b/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/makefile
deleted file mode 100644
index d7c2ba5..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/makefile
+++ /dev/null
@@ -1,250 +0,0 @@
-#-----------------------------------------------------------------------------
-# The confidential and proprietary information contained in this file may
-# only be used by a person authorised under and to the extent permitted
-# by a subsisting licensing agreement from Arm Limited or its affiliates.
-#
-# (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
-# ALL RIGHTS RESERVED
-#
-# This entire notice must be reproduced on all copies of this file
-# and copies of this file may only be made by a person if such person is
-# permitted to do so under the terms of a subsisting license agreement
-# from Arm Limited or its affiliates.
-#
-# SVN Information
-#
-# Checked In : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
-#
-# Revision : $Revision: 371321 $
-#
-# Release Information : Cortex-M System Design Kit-r1p1-00rel0
-#-----------------------------------------------------------------------------
-#
-# Cortex-M System Design Kit software compilation make file
-#
-#-----------------------------------------------------------------------------
-#
-# Configurations
-#
-# Choose the core instantiated, can be
-# - CORTEX_M0
-# - CORTEX_M0PLUS
-CPU_PRODUCT = CORTEX_M0PLUS
-
-# Shared software directory
-SOFTWARE_DIR = ../../../../software
-CMSIS_DIR = $(SOFTWARE_DIR)/cmsis
-CORE_DIR = $(CMSIS_DIR)/CMSIS/Include
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0plus
-else
- DEVICE_DIR = $(CMSIS_DIR)/Device/ARM/CMSDK_CM0
-endif
-
-# Program file
-TESTNAME = watchdog_demo
-
-# Endian Option
-COMPILE_BIGEND = 0
-
-# Configuration
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- USER_DEFINE = -DCORTEX_M0PLUS
-else
- USER_DEFINE = -DCORTEX_M0
-endif
-
-DEPS_LIST = makefile
-
-# Tool chain : ds5 / gcc / keil
-TOOL_CHAIN = ds5
-
-ifeq ($(TOOL_CHAIN),ds5)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = --cpu Cortex-M0plus
- else
- CPU_TYPE = --cpu Cortex-M0
- endif
-endif
-
-ifeq ($(TOOL_CHAIN),gcc)
- ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- CPU_TYPE = -mcpu=cortex-m0plus
- else
- CPU_TYPE = -mcpu=cortex-m0
- endif
-endif
-
-# Startup code directory for DS-5
-ifeq ($(TOOL_CHAIN),ds5)
- STARTUP_DIR = $(DEVICE_DIR)/Source/ARM
-endif
-
-# Startup code directory for gcc
-ifeq ($(TOOL_CHAIN),gcc)
- STARTUP_DIR = $(DEVICE_DIR)/Source/GCC
-endif
-
-ifeq ($(CPU_PRODUCT),CORTEX_M0PLUS)
- STARTUP_FILE = startup_CMSDK_CM0plus
- SYSTEM_FILE = system_CMSDK_CM0plus
-else
- STARTUP_FILE = startup_CMSDK_CM0
- SYSTEM_FILE = system_CMSDK_CM0
-endif
-
-# ---------------------------------------------------------------------------------------
-# DS-5 options
-
-# MicroLIB option (DS-5)
-COMPILE_MICROLIB = 0
-
-# Small Multiply (Cortex-M0/M0+ has small multiplier option)
-COMPILE_SMALLMUL = 0
-
-ARM_CC_OPTIONS = -c -O3 -g -Otime -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget $(USER_DEFINE)
-ARM_ASM_OPTIONS = -g
-ARM_LINK_OPTIONS = "--keep=$(STARTUP_FILE).o(RESET)" "--first=$(STARTUP_FILE).o(RESET)" \
- --rw_base 0x30000000 --ro_base 0x00000000 --map
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- ARM_CC_OPTIONS += --bigend
- ARM_ASM_OPTIONS += --bigend
- ARM_LINK_OPTIONS += --be8
-endif
-
-ifeq ($(COMPILE_MICROLIB),1)
- # MicroLIB
- ARM_CC_OPTIONS += --library_type=microlib
- ARM_ASM_OPTIONS += --library_type=microlib --pd "__MICROLIB SETA 1"
- ARM_LINK_OPTIONS += --library_type=microlib
-endif
-
-ifeq ($(COMPILE_SMALLMUL),1)
- # In Cortex-M0, small multiply takes 32 cycles
- ARM_CC_OPTIONS += --multiply_latency=32
-endif
-
-# ---------------------------------------------------------------------------------------
-# gcc options
-
-GNG_CC = arm-none-eabi-gcc
-GNU_OBJDUMP = arm-none-eabi-objdump
-GNU_OBJCOPY = arm-none-eabi-objcopy
-
-LINKER_SCRIPT_PATH = $(SOFTWARE_DIR)/common/scripts
-LINKER_SCRIPT = $(LINKER_SCRIPT_PATH)/cmsdk_cm0.ld
-
-GNU_CC_FLAGS = -g -O3 -mthumb $(CPU_TYPE)
-
-ifeq ($(COMPILE_BIGEND),1)
- # Big Endian
- GNU_CC_FLAGS += -mbig-endian
-endif
-
-# ---------------------------------------------------------------------------------------
-all: all_$(TOOL_CHAIN)
-
-# ---------------------------------------------------------------------------------------
-# DS-5
-all_ds5 : $(TESTNAME).hex $(TESTNAME).lst
-
-$(TESTNAME).o : $(SOFTWARE_DIR)/common/demos/$(TESTNAME).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(SYSTEM_FILE).o : $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-retarget.o : $(SOFTWARE_DIR)/common/retarget/retarget.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-uart_stdout.o : $(SOFTWARE_DIR)/common/retarget/uart_stdout.c $(DEPS_LIST)
- armcc $(ARM_CC_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(STARTUP_FILE).o : $(STARTUP_DIR)/$(STARTUP_FILE).s $(DEPS_LIST)
- armasm $(ARM_ASM_OPTIONS) $(CPU_TYPE) $< -o $@
-
-$(TESTNAME).ELF : $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o
- armlink $(ARM_LINK_OPTIONS) $(TESTNAME).o $(SYSTEM_FILE).o $(STARTUP_FILE).o retarget.o uart_stdout.o -o $@
-
-$(TESTNAME).hex : $(TESTNAME).ELF
- fromelf --vhx --8x1 $< --output $@
-
-
-$(TESTNAME).lst : $(TESTNAME).ELF
- fromelf -c -d -e -s $< --output $@
-
-# ---------------------------------------------------------------------------------------
-# gcc
-all_gcc:
- $(GNG_CC) $(GNU_CC_FLAGS) $(STARTUP_DIR)/$(STARTUP_FILE).s \
- $(SOFTWARE_DIR)/common/demos/$(TESTNAME).c \
- $(SOFTWARE_DIR)/common/retarget/retarget.c \
- $(SOFTWARE_DIR)/common/retarget/uart_stdout.c \
- $(DEVICE_DIR)/Source/$(SYSTEM_FILE).c \
- -I $(DEVICE_DIR)/Include -I $(CORE_DIR) \
- -I $(SOFTWARE_DIR)/common/retarget \
- -L $(LINKER_SCRIPT_PATH) \
- -D__STACK_SIZE=0x200 \
- -D__HEAP_SIZE=0x1000 \
- $(USER_DEFINE) -T $(LINKER_SCRIPT) -o $(TESTNAME).o
- # Generate disassembly code
- $(GNU_OBJDUMP) -S $(TESTNAME).o > $(TESTNAME).lst
- # Generate binary file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O binary $(TESTNAME).bin
- # Generate hex file
- $(GNU_OBJCOPY) -S $(TESTNAME).o -O verilog $(TESTNAME).hex
-
-# Note:
-# If the version of object copy you are using does not support verilog hex file output,
-# you can generate the hex file from binary file using the following command
-# od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-
-# ---------------------------------------------------------------------------------------
-# Keil MDK
-
-all_keil:
- @echo "Please compile your project code and press ENTER when ready"
- @read dummy
-
-# ---------------------------------------------------------------------------------------
-# Binary
-
-all_bin: $(TESTNAME).bin
- # Generate hex file from binary
- od -v -A n -t x1 --width=1 $(TESTNAME).bin > $(TESTNAME).hex
-
-# ---------------------------------------------------------------------------------------
-# Clean
-clean :
- @rm -rf *.o
- @if [ -e $(TESTNAME).hex ] ; then \
- rm -rf $(TESTNAME).hex ; \
- fi
- @if [ -e $(TESTNAME).lst ] ; then \
- rm -rf $(TESTNAME).lst ; \
- fi
- @if [ -e $(TESTNAME).ELF ] ; then \
- rm -rf $(TESTNAME).ELF ; \
- fi
- @if [ -e $(TESTNAME).bin ] ; then \
- rm -rf $(TESTNAME).bin ; \
- fi
- @rm -rf *.crf
- @rm -rf *.plg
- @rm -rf *.tra
- @rm -rf *.htm
- @rm -rf *.map
- @rm -rf *.dep
- @rm -rf *.d
- @rm -rf *.lnp
- @rm -rf *.bak
- @rm -rf *.lst
- @rm -rf *.axf
- @rm -rf *.sct
- @rm -rf *.__i
- @rm -rf *._ia
diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/watchdog_demo_cm0.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/watchdog_demo_cm0.uvopt
deleted file mode 100644
index d037b58..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/watchdog_demo_cm0.uvopt
+++ /dev/null
@@ -1,261 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
-
- <SchemaVersion>1.0</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Extensions>
- <cExt>*.c</cExt>
- <aExt>*.s*; *.src; *.a*</aExt>
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/watchdog_demo_cm0.uvproj b/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/watchdog_demo_cm0.uvproj
deleted file mode 100644
index 1c90f5d..0000000
--- a/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/watchdog_demo_cm0.uvproj
+++ /dev/null
@@ -1,435 +0,0 @@
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diff --git a/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/watchdog_demo_cm0p.uvopt b/Cortex-M0/nanosoc/systems/mcu/testcodes/watchdog_demo/watchdog_demo_cm0p.uvopt
deleted file mode 100644
index 5b4434b..0000000
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deleted file mode 100644
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- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT5>
- <OCR_RVCT6>
- <Type>0</Type>
- <StartAddress>0x20000000</StartAddress>
- <Size>0x10000</Size>
- </OCR_RVCT6>
- <OCR_RVCT7>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT7>
- <OCR_RVCT8>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT8>
- <OCR_RVCT9>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT9>
- <OCR_RVCT10>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT10>
- </OnChipMemories>
- <RvctStartVector></RvctStartVector>
- </ArmAdsMisc>
- <Cads>
- <interw>1</interw>
- <Optim>4</Optim>
- <oTime>0</oTime>
- <SplitLS>0</SplitLS>
- <OneElfS>0</OneElfS>
- <Strict>0</Strict>
- <EnumInt>0</EnumInt>
- <PlainCh>0</PlainCh>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <wLevel>0</wLevel>
- <uThumb>0</uThumb>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define>CORTEX_M0PLUS</Define>
- <Undefine></Undefine>
- <IncludePath>..\..\..\..\software\cmsis\CMSIS\Include; ..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Include; ..\..\..\..\software\common\retarget</IncludePath>
- </VariousControls>
- </Cads>
- <Aads>
- <interw>1</interw>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <thumb>0</thumb>
- <SplitLS>0</SplitLS>
- <SwStkChk>0</SwStkChk>
- <NoWarn>0</NoWarn>
- <VariousControls>
- <MiscControls></MiscControls>
- <Define></Define>
- <Undefine></Undefine>
- <IncludePath></IncludePath>
- </VariousControls>
- </Aads>
- <LDads>
- <umfTarg>1</umfTarg>
- <Ropi>0</Ropi>
- <Rwpi>0</Rwpi>
- <noStLib>0</noStLib>
- <RepFail>1</RepFail>
- <useFile>0</useFile>
- <TextAddressRange>0x00000000</TextAddressRange>
- <DataAddressRange>0x00000000</DataAddressRange>
- <ScatterFile></ScatterFile>
- <IncludeLibs></IncludeLibs>
- <IncludeLibsPath></IncludeLibsPath>
- <Misc></Misc>
- <LinkerInputFile></LinkerInputFile>
- <DisabledWarnings></DisabledWarnings>
- </LDads>
- </TargetArmAds>
- </TargetOption>
- <Groups>
- <Group>
- <GroupName>Startup</GroupName>
- <Files>
- <File>
- <FileName>startup_CMSDK_CM0plus.s</FileName>
- <FileType>2</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\ARM\startup_CMSDK_CM0plus.s</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>Application</GroupName>
- <Files>
- <File>
- <FileName>watchdog_demo.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\demos\watchdog_demo.c</FilePath>
- </File>
- <File>
- <FileName>uart_stdout.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\uart_stdout.c</FilePath>
- </File>
- <File>
- <FileName>retarget.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\common\retarget\retarget.c</FilePath>
- </File>
- </Files>
- </Group>
- <Group>
- <GroupName>System</GroupName>
- <Files>
- <File>
- <FileName>system_CMSDK_CM0plus.c</FileName>
- <FileType>1</FileType>
- <FilePath>..\..\..\..\software\cmsis\Device\ARM\CMSDK_CM0plus\Source\system_CMSDK_CM0plus.c</FilePath>
- </File>
- </Files>
- </Group>
- </Groups>
- </Target>
- </Targets>
-
-</Project>
diff --git a/FPGALIB/pads/verilog/PAD_INOUT8MA_NOE.v b/FPGALIB/pads/verilog/PAD_INOUT8MA_NOE.v
deleted file mode 100644
index fa92fec..0000000
--- a/FPGALIB/pads/verilog/PAD_INOUT8MA_NOE.v
+++ /dev/null
@@ -1,37 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_INOUT8MA_NOE (
- // Inouts
- PAD,
- // Outputs
- I,
- // Inputs
- O,
- NOE
- );
- inout PAD;
- output I;
- input O;
- input NOE;
-
- IOBUF #(
- .IOSTANDARD ("LVCMOS33"),
- .DRIVE(8)
- ) IOBUF3V3 (
- .O(I),
- .IO(PAD),
- .I(O),
- .T(NOE)
- );
-
-endmodule // PAD_INOUT8MA_NOE
diff --git a/FPGALIB/pads/verilog/PAD_VDDIO.v b/FPGALIB/pads/verilog/PAD_VDDIO.v
deleted file mode 100644
index 4fd7137..0000000
--- a/FPGALIB/pads/verilog/PAD_VDDIO.v
+++ /dev/null
@@ -1,29 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_VDDIO (
- // Inouts
- PAD
- );
- inout PAD;
-
- IOBUF #(
- .IOSTANDARD ("LVCMOS33"),
- .DRIVE(8)
- ) IOBUF3V3 (
- .O( ),
- .IO(PAD),
- .I(1'b1),
- .T(1'b1)
- );
-
-endmodule // PAD_VDDIO
diff --git a/FPGALIB/pads/verilog/PAD_VDDSOC.v b/FPGALIB/pads/verilog/PAD_VDDSOC.v
deleted file mode 100644
index 80f6a72..0000000
--- a/FPGALIB/pads/verilog/PAD_VDDSOC.v
+++ /dev/null
@@ -1,29 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_VDDSOC (
- // Inouts
- PAD
- );
- inout PAD;
-
- IOBUF #(
- .IOSTANDARD ("LVCMOS33"),
- .DRIVE(8)
- ) IOBUF3V3 (
- .O( ),
- .IO(PAD),
- .I(1'b1),
- .T(1'b1)
- );
-
-endmodule // PAD_VDDSOC
diff --git a/FPGALIB/pads/verilog/PAD_VSS.v b/FPGALIB/pads/verilog/PAD_VSS.v
deleted file mode 100644
index 046a389..0000000
--- a/FPGALIB/pads/verilog/PAD_VSS.v
+++ /dev/null
@@ -1,29 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_VSS (
- // Inouts
- PAD
- );
- inout PAD;
-
- IOBUF #(
- .IOSTANDARD ("LVCMOS33"),
- .DRIVE(8)
- ) IOBUF3V3 (
- .O( ),
- .IO(PAD),
- .I(1'b1),
- .T(1'b1)
- );
-
-endmodule // PAD_VSS
diff --git a/FPGALIB/pads/verilog/PAD_VSSIO.v b/FPGALIB/pads/verilog/PAD_VSSIO.v
deleted file mode 100644
index 6bfb333..0000000
--- a/FPGALIB/pads/verilog/PAD_VSSIO.v
+++ /dev/null
@@ -1,29 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_VSSIO (
- // Inouts
- PAD
- );
- inout PAD;
-
- IOBUF #(
- .IOSTANDARD ("LVCMOS33"),
- .DRIVE(8)
- ) IOBUF3V3 (
- .O( ),
- .IO(PAD),
- .I(1'b1),
- .T(1'b1)
- );
-
-endmodule // PAD_VSSIO
diff --git a/GLIB/mem/verilog/SROM_Ax32.v b/GLIB/mem/verilog/SROM_Ax32.v
deleted file mode 100644
index f2c3a9a..0000000
--- a/GLIB/mem/verilog/SROM_Ax32.v
+++ /dev/null
@@ -1,127 +0,0 @@
-//-----------------------------------------------------------------------------
-//
-// Synthesizable byte-write addressible R/W (random-access) memory
-//
-// Synchronous data write, flow-though (non-pipeline registered) read data
-//
-// Auto-gernerates a synthesizable verilog ROM design
-// and binary text file for custom ROM via programming
-//
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2021-3, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module SROM_Ax32
- #(parameter ADDRWIDTH = 10,
- parameter filename = "rom32.hex",
- parameter romgen = 0
- )
- (input wire CLK,
- input wire [ADDRWIDTH-1:0] ADDR, //Address Input
- input wire SEL, //Select (active-high)
- output wire [31:0] RDATA); //Read Data
-
- localparam MEMDEPTH = (1 << (ADDRWIDTH)-1)-1;
- localparam romgenfile = "bootrom.v";
- localparam bingenfile = "bootrom.bintxt";
-
- // Reg declarations
- reg [7:0] rombyte0 [0:MEMDEPTH];
- reg [7:0] rombyte1 [0:MEMDEPTH];
- reg [7:0] rombyte2 [0:MEMDEPTH];
- reg [7:0] rombyte3 [0:MEMDEPTH];
-
- reg [ADDRWIDTH-1:0] addr_r; // registered Address for read access
-
-// optional simulation RAM_INIT option to suppress 'X' initial contents
-`ifdef MEM_INIT
- reg [7:0] fileimage [((4<<ADDRWIDTH)-1):0];
- function [31:0] NoX32; input [31:0] n; NoX32 = (((^n) === 1'bx) ? 32'h0 : n); endfunction
- integer fd; // file descriptor for file output
- integer fd2; // file descriptor for file 2 output
- integer i;
- reg [39:0] today [0:1];
-
-initial
- begin
- $system("date +%y%m%d%H%M >date_file"); //format yymmdd
- $readmemh("date_file", today);
- $display("data_file: %x", today[0]);
-
- for (i=0; i<= MEMDEPTH; i=i+1) begin
- rombyte0[i] <= 8'he5;
- rombyte1[i] <= 8'he5;
- rombyte2[i] <= 8'he5;
- rombyte3[i] <= 8'he5;
- end
- if (filename != "") begin
- $readmemh(filename, fileimage);
- for (i = 0; i <= MEMDEPTH; i=i+1) begin
- rombyte0[i] <= fileimage[(i<<2)+0];
- rombyte1[i] <= fileimage[(i<<2)+1];
- rombyte2[i] <= fileimage[(i<<2)+2];
- rombyte3[i] <= fileimage[(i<<2)+3];
- end
- end
- if (romgen != 0)
- begin
- fd = $fopen(romgenfile);
- fd2 = $fopen(bingenfile);
- if ((fd == 0) || (fd2 == 0)) begin
- $display("rom32gen: Error, zero returned in response to $fopen\n");
- end
- else begin
- $display(fd,"rom32gen: Generating output file\n");
- $fwrite(fd,"//------------------------------------------------------------------------------------\n");
- $fwrite(fd,"// customised auto-generated synthesizable ROM module abstraction\n");
- $fwrite(fd,"// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.\n");
- $fwrite(fd,"//\n");
- $fwrite(fd,"// Contributors\n");
- $fwrite(fd,"//\n");
- $fwrite(fd,"// David Flynn (d.w.flynn@soton.ac.uk)\n");
- $fwrite(fd,"// Date: %x\n", today[0]);
- $fwrite(fd,"// Copyright (c) 2021-2, SoC Labs (www.soclabs.org)\n");
- $fwrite(fd,"//------------------------------------------------------------------------------------\n");
- $fwrite(fd,"module bootrom (\n");
- $fwrite(fd," input wire CLK,\n");
- $fwrite(fd," input wire EN,\n");
- $fwrite(fd," input wire [%0d:2] ADDR,\n", ADDRWIDTH+1);
- $fwrite(fd," output reg [31:0] RDATA );\n");
- $fwrite(fd,"reg [%0d:2] addr_r;\n", ADDRWIDTH+1);
- $fwrite(fd,"always @(posedge CLK) if (EN) addr_r <= ADDR;\n");
- $fwrite(fd,"always @(addr_r)");
- $fwrite(fd," case(addr_r[%0d:2]) \n", ADDRWIDTH+1);
- if (ADDRWIDTH > 8)
- for (i = 0; i < 4 << (ADDRWIDTH); i=i+4) begin
- $fwrite(fd," %2d'h%3x : RDATA <= 32'h%8x; // 0x%04x\n", ADDRWIDTH, i>>2, NoX32({fileimage[i+3],fileimage[i+2],fileimage[i+1],fileimage[i+0]}), i );
- $fwrite(fd2,"%32b\n",NoX32({fileimage[i+3],fileimage[i+2],fileimage[i+1],fileimage[i+0]}));
- end
- else
- for (i = 0; i < 4 << (ADDRWIDTH); i=i+4) begin
- $fwrite(fd," %2d'h%2x : RDATA <= 32'h%8x; // 0x%04x\n", ADDRWIDTH, i>>2, NoX32({fileimage[i+3],fileimage[i+2],fileimage[i+1],fileimage[i+0]}), i );
- $fwrite(fd2,"%32b\n",NoX32({fileimage[i+3],fileimage[i+2],fileimage[i+1],fileimage[i+0]}));
- end
- $fwrite(fd," default : RDATA <=32'h0;\n");
- $fwrite(fd," endcase\n");
- $fwrite(fd,"endmodule\n");
- $fclose(fd);
- $fclose(fd2);
- end
- end
- end
-`endif
-
-// synchonous address and control
-
- always @(posedge CLK) // update on any byte lane read
- if (SEL)
- addr_r <= ADDR[ADDRWIDTH-1:0];
-
- assign RDATA = {rombyte3[addr_r],rombyte2[addr_r],rombyte1[addr_r],rombyte0[addr_r]};
-
-endmodule
diff --git a/GLIB/pads/verilog/GLIB_PADLIB.v b/GLIB/pads/verilog/GLIB_PADLIB.v
deleted file mode 100755
index bc10d2b..0000000
--- a/GLIB/pads/verilog/GLIB_PADLIB.v
+++ /dev/null
@@ -1,139 +0,0 @@
-// GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_INOUT8MA_NOE (
- // Inouts
- PAD,
- // Outputs
- O,
- // Inputs
- I,
- NOE
- );
- inout PAD;
- output I;
- input O;
- input NOE;
-
-`ifdef BEHAVIORAL_PADS
- assign I = PAD;
- assign PAD = ~NOE ? O : 1'bz;
-`else
- bufif1 #2 (PAD, O, ~NOE);
- buf #1 (I, PAD);
- always @(PAD)
- begin
- if (($countdrivers(PAD) > 1) && (PAD === 1'bx))
- $display("%t ++BUS CONFLICT++ : %m", $realtime);
- end
-`endif // ifdef BEHAVIORAL_PADS
-endmodule // PAD_INOUT8MA_NOE
-
-module PAD_INOUT8MA_OE (
- // Inouts
- PAD,
- // Outputs
- O,
- // Inputs
- I,
- OE
- );
- inout PAD;
- output I;
- input O;
- input OE;
-`ifdef BEHAVIORAL_PADS
- assign I = PAD;
- assign PAD = OE ? O : 1'bz;
-`else
- bufif1 #2 (PAD, O, OE);
- buf #1 (I, PAD);
-
- always @(PAD)
- begin
- if (($countdrivers(PAD) > 1) && (PAD === 1'bx))
- $display("%t ++BUS CONFLICT++ : %m", $realtime);
- end
-`endif // ifdef BEHAVIORAL_PADS
-endmodule // PAD_INOUT8MA_OE
-
-module PAD_VDDIO (
- PAD
- );
- inout PAD;
-endmodule // PAD_VDDIO
-
-module PAD_VSSIO (
- PAD
- );
- inout PAD;
-endmodule // PAD_VSSSIO
-
-// core logic supply rails (1V0, 0V)
-module PAD_VDDSOC (
- PAD
- );
- inout PAD;
-endmodule // PAD_VDDSOC
-
-module PAD_VSS (
- PAD
- );
- inout PAD;
-endmodule // PAD_VSS
-
-// VDDISOL
-module PAD_ANALOG (
- PAD
- );
- inout PAD;
-endmodule // PAD_ANALOG
-
-`ifdef TSMC_PADS
-
-// VDDSOC
-module PVDD1CDG (
- inout wire VDD
- );
-endmodule // PVDD1CDG
-
-//VDDIO
-module PVDD2CDG (
- inout wire VDDPST
- );
-endmodule // PVDD2CDG
-
-module PVDD2POC (
- inout wire VDDPST
- );
-endmodule // PVDD2CDG
-
-module PVSS3CDG (
- inout wire VSS
- );
-endmodule // PVSS3CDG
-
-// VDDISOL
-module PVDD1ANA (
- inout wire AVDD
- );
-endmodule // PVDD1ANA
-
-
-module PCORNER ( ); endmodule
-module PFILLER20 ( ); endmodule
-module PFILLER1 ( ); endmodule
-module PFILLER0005 ( ); endmodule
-
-module PAD60LU ( ); endmodule
-
-`endif
diff --git a/GLIB/pads/verilog/PAD_ANALOG.v b/GLIB/pads/verilog/PAD_ANALOG.v
deleted file mode 100644
index 2715fb3..0000000
--- a/GLIB/pads/verilog/PAD_ANALOG.v
+++ /dev/null
@@ -1,18 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-// VDDISOL
-module PAD_ANALOG (
- PAD
- );
- inout PAD;
-endmodule // PAD_ANALOG
diff --git a/GLIB/pads/verilog/PAD_INOUT8MA_NOE.v b/GLIB/pads/verilog/PAD_INOUT8MA_NOE.v
deleted file mode 100644
index 42123e8..0000000
--- a/GLIB/pads/verilog/PAD_INOUT8MA_NOE.v
+++ /dev/null
@@ -1,39 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_INOUT8MA_NOE (
- // Inouts
- PAD,
- // Outputs
- O,
- // Inputs
- I,
- NOE
- );
- inout PAD;
- output I;
- input O;
- input NOE;
-
-`ifdef BEHAVIORAL_PADS
- assign I = PAD;
- assign PAD = ~NOE ? O : 1'bz;
-`else
- bufif1 #2 (PAD, O, ~NOE);
- buf #1 (I, PAD);
- always @(PAD)
- begin
- if (($countdrivers(PAD) > 1) && (PAD === 1'bx))
- $display("%t ++BUS CONFLICT++ : %m", $realtime);
- end
-`endif // ifdef BEHAVIORAL_PADS
-endmodule // PAD_INOUT8MA_NOE
diff --git a/GLIB/pads/verilog/PAD_INOUT8MA_OE.v b/GLIB/pads/verilog/PAD_INOUT8MA_OE.v
deleted file mode 100644
index 12d3009..0000000
--- a/GLIB/pads/verilog/PAD_INOUT8MA_OE.v
+++ /dev/null
@@ -1,39 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_INOUT8MA_OE (
- // Inouts
- PAD,
- // Outputs
- O,
- // Inputs
- I,
- OE
- );
- inout PAD;
- output I;
- input O;
- input OE;
-`ifdef BEHAVIORAL_PADS
- assign I = PAD;
- assign PAD = OE ? O : 1'bz;
-`else
- bufif1 #2 (PAD, O, OE);
- buf #1 (I, PAD);
-
- always @(PAD)
- begin
- if (($countdrivers(PAD) > 1) && (PAD === 1'bx))
- $display("%t ++BUS CONFLICT++ : %m", $realtime);
- end
-`endif // ifdef BEHAVIORAL_PADS
-endmodule // PAD_INOUT8MA_OE
diff --git a/GLIB/pads/verilog/PAD_VDDIO.v b/GLIB/pads/verilog/PAD_VDDIO.v
deleted file mode 100644
index e8eda59..0000000
--- a/GLIB/pads/verilog/PAD_VDDIO.v
+++ /dev/null
@@ -1,18 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_VDDIO (
- PAD
- );
- inout PAD;
- assign PAD = 1'b1;
- endmodule // PAD_VDDIO
diff --git a/GLIB/pads/verilog/PAD_VDDSOC.v b/GLIB/pads/verilog/PAD_VDDSOC.v
deleted file mode 100644
index 02de9e9..0000000
--- a/GLIB/pads/verilog/PAD_VDDSOC.v
+++ /dev/null
@@ -1,19 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-// core logic supply rails (1V0, 0V)
-module PAD_VDDSOC (
- PAD
- );
- inout PAD;
- assign PAD = 1'b1;
-endmodule // PAD_VDDSOC
diff --git a/GLIB/pads/verilog/PAD_VSS.v b/GLIB/pads/verilog/PAD_VSS.v
deleted file mode 100644
index ea07cca..0000000
--- a/GLIB/pads/verilog/PAD_VSS.v
+++ /dev/null
@@ -1,18 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_VSS (
- PAD
- );
- inout PAD;
- assign PAD = 1'b0;
-endmodule // PAD_VSS
diff --git a/GLIB/pads/verilog/PAD_VSSIO.v b/GLIB/pads/verilog/PAD_VSSIO.v
deleted file mode 100644
index 42d9edb..0000000
--- a/GLIB/pads/verilog/PAD_VSSIO.v
+++ /dev/null
@@ -1,19 +0,0 @@
-// from GLIB_PADLIB.v
-//-----------------------------------------------------------------------------
-// soclabs generic IO pad model
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module PAD_VSSIO (
- PAD
- );
- inout PAD;
- assign PAD = 1'b0;
-endmodule // PAD_VSSIO
-
diff --git a/GLIB/sync/verilog/SYNCHRONIZER_EDGES.v b/GLIB/sync/verilog/SYNCHRONIZER_EDGES.v
deleted file mode 100644
index c669ec1..0000000
--- a/GLIB/sync/verilog/SYNCHRONIZER_EDGES.v
+++ /dev/null
@@ -1,42 +0,0 @@
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Flynn (d.w.flynn@soton.ac.uk)
-//
-// Copyright © 2022, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-
-module SYNCHRONIZER_EDGES (
- input wire testmode_i
- ,input wire clk_i
- ,input wire reset_n_i
- ,input wire asyn_i
- ,output wire syn_o
- ,output wire syn_del_o
- ,output wire posedge_o
- ,output wire negedge_o
- );
-
-reg sync_stage1;
-reg sync_stage2;
-reg sync_stage3;
-
- always @(posedge clk_i or negedge reset_n_i)
- if(~reset_n_i) begin
- sync_stage1 <= 1'b0;
- sync_stage2 <= 1'b0;
- sync_stage3 <= 1'b0;
- end
- else begin
- sync_stage1 <= asyn_i;
- sync_stage2 <= sync_stage1;
- sync_stage3 <= sync_stage2;
- end
-
-assign syn_o = (testmode_i) ? asyn_i : sync_stage2;
-assign syn_del_o = (testmode_i) ? asyn_i : sync_stage3;
-assign posedge_o = (testmode_i) ? asyn_i : ( sync_stage2 & !sync_stage3);
-assign negedge_o = (testmode_i) ? asyn_i : (!sync_stage2 & sync_stage3);
-
-endmodule
diff --git a/Cortex-M0/nanosoc/software/cmsis/CMSIS/Include/core_cm0.h b/software/cmsis/CMSIS/Include/core_cm0.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/CMSIS/Include/core_cm0.h
rename to software/cmsis/CMSIS/Include/core_cm0.h
diff --git a/Cortex-M0/nanosoc/software/cmsis/CMSIS/Include/core_cm0plus.h b/software/cmsis/CMSIS/Include/core_cm0plus.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/CMSIS/Include/core_cm0plus.h
rename to software/cmsis/CMSIS/Include/core_cm0plus.h
diff --git a/Cortex-M0/nanosoc/software/cmsis/CMSIS/Include/core_cmFunc.h b/software/cmsis/CMSIS/Include/core_cmFunc.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/CMSIS/Include/core_cmFunc.h
rename to software/cmsis/CMSIS/Include/core_cmFunc.h
diff --git a/Cortex-M0/nanosoc/software/cmsis/CMSIS/Include/core_cmInstr.h b/software/cmsis/CMSIS/Include/core_cmInstr.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/CMSIS/Include/core_cmInstr.h
rename to software/cmsis/CMSIS/Include/core_cmInstr.h
diff --git a/Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Include/CMSDK_CM0.h b/software/cmsis/Device/ARM/CMSDK_CM0/Include/CMSDK_CM0.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Include/CMSDK_CM0.h
rename to software/cmsis/Device/ARM/CMSDK_CM0/Include/CMSDK_CM0.h
diff --git a/Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Include/CMSDK_driver.h b/software/cmsis/Device/ARM/CMSDK_CM0/Include/CMSDK_driver.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Include/CMSDK_driver.h
rename to software/cmsis/Device/ARM/CMSDK_CM0/Include/CMSDK_driver.h
diff --git a/Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Include/system_CMSDK_CM0.h b/software/cmsis/Device/ARM/CMSDK_CM0/Include/system_CMSDK_CM0.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Include/system_CMSDK_CM0.h
rename to software/cmsis/Device/ARM/CMSDK_CM0/Include/system_CMSDK_CM0.h
diff --git a/Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Source/ARM/startup_CMSDK_CM0.s b/software/cmsis/Device/ARM/CMSDK_CM0/Source/ARM/startup_CMSDK_CM0.s
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Source/ARM/startup_CMSDK_CM0.s
rename to software/cmsis/Device/ARM/CMSDK_CM0/Source/ARM/startup_CMSDK_CM0.s
diff --git a/Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Source/CMSDK_driver.c b/software/cmsis/Device/ARM/CMSDK_CM0/Source/CMSDK_driver.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Source/CMSDK_driver.c
rename to software/cmsis/Device/ARM/CMSDK_CM0/Source/CMSDK_driver.c
diff --git a/Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Source/GCC/startup_CMSDK_CM0.s b/software/cmsis/Device/ARM/CMSDK_CM0/Source/GCC/startup_CMSDK_CM0.s
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Source/GCC/startup_CMSDK_CM0.s
rename to software/cmsis/Device/ARM/CMSDK_CM0/Source/GCC/startup_CMSDK_CM0.s
diff --git a/Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Source/system_CMSDK_CM0.c b/software/cmsis/Device/ARM/CMSDK_CM0/Source/system_CMSDK_CM0.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/cmsis/Device/ARM/CMSDK_CM0/Source/system_CMSDK_CM0.c
rename to software/cmsis/Device/ARM/CMSDK_CM0/Source/system_CMSDK_CM0.c
diff --git a/Cortex-M0/nanosoc/software/common/bootloader/bootloader.c b/software/common/bootloader/bootloader.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/bootloader/bootloader.c
rename to software/common/bootloader/bootloader.c
diff --git a/Cortex-M0/nanosoc/software/common/debug_tests/debug_tests.c b/software/common/debug_tests/debug_tests.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/debug_tests/debug_tests.c
rename to software/common/debug_tests/debug_tests.c
diff --git a/Cortex-M0/nanosoc/software/common/debug_tests/debug_tests.h b/software/common/debug_tests/debug_tests.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/debug_tests/debug_tests.h
rename to software/common/debug_tests/debug_tests.h
diff --git a/Cortex-M0/nanosoc/software/common/demos/dualtimer_demo.c b/software/common/demos/dualtimer_demo.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/demos/dualtimer_demo.c
rename to software/common/demos/dualtimer_demo.c
diff --git a/Cortex-M0/nanosoc/software/common/demos/interrupt_demo.c b/software/common/demos/interrupt_demo.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/demos/interrupt_demo.c
rename to software/common/demos/interrupt_demo.c
diff --git a/Cortex-M0/nanosoc/software/common/demos/self_reset_demo.c b/software/common/demos/self_reset_demo.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/demos/self_reset_demo.c
rename to software/common/demos/self_reset_demo.c
diff --git a/Cortex-M0/nanosoc/software/common/demos/sleep_demo.c b/software/common/demos/sleep_demo.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/demos/sleep_demo.c
rename to software/common/demos/sleep_demo.c
diff --git a/Cortex-M0/nanosoc/software/common/demos/watchdog_demo.c b/software/common/demos/watchdog_demo.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/demos/watchdog_demo.c
rename to software/common/demos/watchdog_demo.c
diff --git a/Cortex-M0/nanosoc/software/common/dhry/dhry.h b/software/common/dhry/dhry.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/dhry/dhry.h
rename to software/common/dhry/dhry.h
diff --git a/Cortex-M0/nanosoc/software/common/dhry/dhry_1.c b/software/common/dhry/dhry_1.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/dhry/dhry_1.c
rename to software/common/dhry/dhry_1.c
diff --git a/Cortex-M0/nanosoc/software/common/dhry/dhry_2.c b/software/common/dhry/dhry_2.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/dhry/dhry_2.c
rename to software/common/dhry/dhry_2.c
diff --git a/Cortex-M0/nanosoc/software/common/retarget/retarget.c b/software/common/retarget/retarget.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/retarget/retarget.c
rename to software/common/retarget/retarget.c
diff --git a/Cortex-M0/nanosoc/software/common/retarget/uart_stdout.c b/software/common/retarget/uart_stdout.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/retarget/uart_stdout.c
rename to software/common/retarget/uart_stdout.c
diff --git a/Cortex-M0/nanosoc/software/common/retarget/uart_stdout.h b/software/common/retarget/uart_stdout.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/retarget/uart_stdout.h
rename to software/common/retarget/uart_stdout.h
diff --git a/Cortex-M0/nanosoc/software/common/romtable_tests/romtable_tests.c b/software/common/romtable_tests/romtable_tests.c
similarity index 100%
rename from Cortex-M0/nanosoc/software/common/romtable_tests/romtable_tests.c
rename to software/common/romtable_tests/romtable_tests.c
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similarity index 100%
rename from Cortex-M0/nanosoc/software/common/romtable_tests/romtable_tests.h
rename to software/common/romtable_tests/romtable_tests.h
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similarity index 100%
rename from Cortex-M0/nanosoc/software/common/scripts/cmsdk_bootloader.ld
rename to software/common/scripts/cmsdk_bootloader.ld
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rename from Cortex-M0/nanosoc/software/common/scripts/cmsdk_cm0.ld
rename to software/common/scripts/cmsdk_cm0.ld
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rename from Cortex-M0/nanosoc/software/common/scripts/debugtester.ld
rename to software/common/scripts/debugtester.ld
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rename from Cortex-M0/nanosoc/software/common/scripts/lib-nosys.ld
rename to software/common/scripts/lib-nosys.ld
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rename to software/common/scripts/lib-rdimon.ld
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rename to software/common/scripts/sections.ld
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rename to software/common/validation/apb_mux_tests.c
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rename to software/common/validation/bitband_tests.c
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rename to software/common/validation/default_slaves_tests.c
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rename to software/common/validation/dma_tests.c
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rename to software/common/validation/ext_sys_tests.c
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rename to software/common/validation/gpio_driver_tests.c
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rename to software/common/validation/gpio_tests.c
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rename to software/common/validation/memory_tests.c
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rename to software/common/validation/timer_tests.c
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rename to software/common/validation/uart_tests.c
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rename from Cortex-M0/nanosoc/software/debug_tester/system_cmsdk_debugtester.c
rename to software/debug_tester/system_cmsdk_debugtester.c
diff --git a/Cortex-M0/nanosoc/software/debug_tester/system_cmsdk_debugtester.h b/software/debug_tester/system_cmsdk_debugtester.h
similarity index 100%
rename from Cortex-M0/nanosoc/software/debug_tester/system_cmsdk_debugtester.h
rename to software/debug_tester/system_cmsdk_debugtester.h
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0.v b/systems/adp_control/verilog/ADPcontrol_v1_0.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0.v
rename to systems/adp_control/verilog/ADPcontrol_v1_0.v
diff --git a/IPLIB/ADPcontrol_v1_0/ADPmanager.v b/systems/adp_control/verilog/ADPmanager.v
similarity index 100%
rename from IPLIB/ADPcontrol_v1_0/ADPmanager.v
rename to systems/adp_control/verilog/ADPmanager.v
diff --git a/IPLIB/axi_stream_io_v1_0/axi_stream_io_v1_0.v b/systems/axi_stream_io/verilog/axi_stream_io_v1_0.v
similarity index 100%
rename from IPLIB/axi_stream_io_v1_0/axi_stream_io_v1_0.v
rename to systems/axi_stream_io/verilog/axi_stream_io_v1_0.v
diff --git a/IPLIB/axi_stream_io_v1_0/axi_stream_io_v1_0_axi_s.v b/systems/axi_stream_io/verilog/axi_stream_io_v1_0_axi_s.v
similarity index 100%
rename from IPLIB/axi_stream_io_v1_0/axi_stream_io_v1_0_axi_s.v
rename to systems/axi_stream_io/verilog/axi_stream_io_v1_0_axi_s.v
diff --git a/IPLIB/FT1248_streamio_v1_0/ft1248_streamio_v1_0.v b/systems/ft1248_stream_io/verilog/ft1248_stream_io_v1_0.v
similarity index 96%
rename from IPLIB/FT1248_streamio_v1_0/ft1248_streamio_v1_0.v
rename to systems/ft1248_stream_io/verilog/ft1248_stream_io_v1_0.v
index b5b8d4b..00cf6c4 100755
--- a/IPLIB/FT1248_streamio_v1_0/ft1248_streamio_v1_0.v
+++ b/systems/ft1248_stream_io/verilog/ft1248_stream_io_v1_0.v
@@ -6,10 +6,10 @@
//
// David Flynn (d.w.flynn@soton.ac.uk)
//
-// Copyright � 2022, SoC Labs (www.soclabs.org)
+// Copyright � 2022, SoC Labs (www.soclabs.org)
//-----------------------------------------------------------------------------
-module ft1248_streamio_v1_0 #
+module ft1248_stream_io_v1_0 #
(
// Users to add parameters here
// FTDI Interface 1,2,4 width supported
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/CI_verification/.gitkeep b/systems/mcu/fpga_imp/CI_verification/.gitkeep
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/CI_verification/.gitkeep
rename to systems/mcu/fpga_imp/CI_verification/.gitkeep
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/CI_verification/load_bitfile.py b/systems/mcu/fpga_imp/CI_verification/load_bitfile.py
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/CI_verification/load_bitfile.py
rename to systems/mcu/fpga_imp/CI_verification/load_bitfile.py
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/CI_verification/load_file_output b/systems/mcu/fpga_imp/CI_verification/load_file_output
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/CI_verification/load_file_output
rename to systems/mcu/fpga_imp/CI_verification/load_file_output
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/CI_verification/run_ADP_verification.py b/systems/mcu/fpga_imp/CI_verification/run_ADP_verification.py
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/CI_verification/run_ADP_verification.py
rename to systems/mcu/fpga_imp/CI_verification/run_ADP_verification.py
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/build_fpga_pynq_z2.scr b/systems/mcu/fpga_imp/build_fpga_pynq_z2.scr
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/build_fpga_pynq_z2.scr
rename to systems/mcu/fpga_imp/build_fpga_pynq_z2.scr
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/build_fpga_pynq_zcu104.scr b/systems/mcu/fpga_imp/build_fpga_pynq_zcu104.scr
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/build_fpga_pynq_zcu104.scr
rename to systems/mcu/fpga_imp/build_fpga_pynq_zcu104.scr
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/clean_fpga.scr b/systems/mcu/fpga_imp/clean_fpga.scr
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/clean_fpga.scr
rename to systems/mcu/fpga_imp/clean_fpga.scr
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/bd/bd.tcl b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/bd/bd.tcl
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/bd/bd.tcl
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/bd/bd.tcl
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/component.xml b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/component.xml
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/component.xml
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/component.xml
diff --git a/IPLIB/ADPcontrol_v1_0/ADPcontrol_v1_0.v b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0.v
similarity index 100%
rename from IPLIB/ADPcontrol_v1_0/ADPcontrol_v1_0.v
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_com_rx.v b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_com_rx.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_com_rx.v
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_com_rx.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_com_tx.v b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_com_tx.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_com_tx.v
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_com_tx.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_stdio_rx.v b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_stdio_rx.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_stdio_rx.v
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_stdio_rx.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_stdio_tx.v b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_stdio_tx.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_stdio_tx.v
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/hdl/ADPcontrol_v1_0_stdio_tx.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/soclabs.org_user_ADPcontrol_1.0.zip b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/soclabs.org_user_ADPcontrol_1.0.zip
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/soclabs.org_user_ADPcontrol_1.0.zip
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/soclabs.org_user_ADPcontrol_1.0.zip
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/src/ADPcontrol_v1_0.v b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/src/ADPcontrol_v1_0.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/src/ADPcontrol_v1_0.v
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/src/ADPcontrol_v1_0.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/src/ADPmanager.v b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/src/ADPmanager.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/src/ADPmanager.v
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/src/ADPmanager.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/xgui/ADPcontrol_v1_0.tcl b/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/xgui/ADPcontrol_v1_0.tcl
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/xgui/ADPcontrol_v1_0.tcl
rename to systems/mcu/fpga_imp/ip_repo/ADPcontrol_1.0/xgui/ADPcontrol_v1_0.tcl
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/bd/bd.tcl b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/bd/bd.tcl
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/bd/bd.tcl
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/bd/bd.tcl
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/component.xml b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/component.xml
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/component.xml
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/component.xml
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.mdd b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.mdd
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.mdd
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.mdd
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.tcl b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.tcl
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.tcl
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/data/axi_stream_io.tcl
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/Makefile b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/Makefile
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/Makefile
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/Makefile
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.c b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.c
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.c
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.c
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.h b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.h
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.h
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io.h
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io_selftest.c b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io_selftest.c
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io_selftest.c
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/drivers/axi_stream_io_v1_0/src/axi_stream_io_selftest.c
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/soclabs.org_user_axi_stream_io_1.0.zip b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/soclabs.org_user_axi_stream_io_1.0.zip
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/soclabs.org_user_axi_stream_io_1.0.zip
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/soclabs.org_user_axi_stream_io_1.0.zip
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/src/axi_stream_io_v1_0_axi_s.v b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/src/axi_stream_io_v1_0_axi_s.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/src/axi_stream_io_v1_0_axi_s.v
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/src/axi_stream_io_v1_0_axi_s.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/xgui/axi_stream_io_v1_0.tcl b/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/xgui/axi_stream_io_v1_0.tcl
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/xgui/axi_stream_io_v1_0.tcl
rename to systems/mcu/fpga_imp/ip_repo/axi_stream_io_1.0/xgui/axi_stream_io_v1_0.tcl
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/bd/bd.tcl b/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/bd/bd.tcl
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/bd/bd.tcl
rename to systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/bd/bd.tcl
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/component.xml b/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/component.xml
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/component.xml
rename to systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/component.xml
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/ft1248x1_to_axi_streamio_0_2.xcix b/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/ft1248x1_to_axi_streamio_0_2.xcix
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/ft1248x1_to_axi_streamio_0_2.xcix
rename to systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/ft1248x1_to_axi_streamio_0_2.xcix
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/SYNCHRONIZER_EDGES.v b/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/SYNCHRONIZER_EDGES.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/SYNCHRONIZER_EDGES.v
rename to systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/SYNCHRONIZER_EDGES.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0.v b/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0.v
rename to systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0_rxd8.v b/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0_rxd8.v
similarity index 100%
rename from Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0_rxd8.v
rename to systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0_rxd8.v
diff --git a/Cortex-M0/nanosoc/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0_txd8.v b/systems/mcu/fpga_imp/ip_repo/ft1248x1_to_axi_streamio_1.0/hdl/ft1248x1_to_axi_streamio_v1_0_txd8.v
similarity index 100%
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/gen_soclabs_4x7_AhbMatrix.scr b/systems/mcu/verilog/gen_ahb_busmatrix/gen_soclabs_4x7_AhbMatrix.scr
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/ipxact/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix.xml b/systems/mcu/verilog/gen_ahb_busmatrix/ipxact/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix.xml
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/soclabs_ahb32_4x7.log b/systems/mcu/verilog/gen_ahb_busmatrix/soclabs_ahb32_4x7.log
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix_default_slave.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_AhbMatrix_default_slave.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_Arbiter.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_Arbiter.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MasterInput.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MasterInput.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_adp.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_adp.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_cpu.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_cpu.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_dma.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_dma.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_dma2.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_MatrixDecode_dma2.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_SlaveOutput.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix/soclabs_4x7_SlaveOutput.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_burst_arb.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_burst_arb.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_decode.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_decode.v
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diff --git a/Cortex-M0/nanosoc/systems/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_default_slave.v b/systems/mcu/verilog/gen_ahb_busmatrix/verilog/src/cmsdk_ahb_bm_default_slave.v
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