From 00f386cb75268daa5009380d0c4bb13a1f960dce Mon Sep 17 00:00:00 2001
From: Daniel Newbrook <dwn1c21@soton.ac.uk>
Date: Mon, 3 Jul 2023 20:45:16 +0100
Subject: [PATCH] Update CI/CD for new structure
---
.gitlab-ci.yml | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 5bd1e29..8051159 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -26,14 +26,14 @@ compile-bootrom:
stage: compile
script:
- source ./set_env.sh
- - mkdir -p $SOCLABS_NANOSOC_TECH_DIR/nanosoc/src/bootrom
- - make -C $SOCLABS_NANOSOC_TECH_DIR/system bootrom SIM_TOP_DIR=$SOCLABS_NANOSOC_TECH_DIR/sim BOOTROM_BUILD_DIR=$SOCLABS_NANOSOC_TECH_DIR/nanosoc/src/bootrom TOOL_CHAIN=ds5
+ - mkdir -p $SOCLABS_NANOSOC_TECH_DIR/system/src/bootrom
+ - make -C $SOCLABS_NANOSOC_TECH_DIR/system bootrom SIM_TOP_DIR=$SOCLABS_NANOSOC_TECH_DIR/sim BOOTROM_BUILD_DIR=$SOCLABS_NANOSOC_TECH_DIR/system/src/bootrom TOOL_CHAIN=ds5
artifacts:
paths:
- ./sim/bootloader/bootloader.hex
- ./nanosoc/testcodes/bootloader/bootloader.hex
- - ./nanosoc/src/bootrom/verilog/bootrom.v
- - ./nanosoc/src/bootrom/bintxt/bootrom.bintxt
+ - ./nanosoc/system/src/bootrom/verilog/bootrom.v
+ - ./nanosoc/system/src/bootrom/bintxt/bootrom.bintxt
tags:
- ds5
@@ -50,8 +50,8 @@ build-job-Z2: # This job runs in the build stage, which runs first.
stage: build
script:
# move to fpga_imp directory and run the fpga build script for pynq z2
- - cd ./nanosoc/fpga_imp/
- - source ../../set_env.sh
+ - cd .nanosoc_tech/fpga_imp/
+ - source ../set_env.sh
- if source ./build_fpga_pynq_z2.scr; then echo "Vivado Finished"; fi
- FILE=./pynq_export/pz2/pynq/overlays/soclabs/design_1.bit
- if test -f "$FILE"; then
@@ -63,8 +63,8 @@ build-job-Z2: # This job runs in the build stage, which runs first.
artifacts:
paths:
# Keep the generated bit and hwh file from fpga build script
- - ./nanosoc/fpga_imp/pynq_export/pz2/pynq/overlays/soclabs/design_1.bit
- - ./nanosoc/fpga_imp/pynq_export/pz2/pynq/overlays/soclabs/design_1.hwh
+ - ./nanosoc_tech/fpga_imp/pynq_export/pz2/pynq/overlays/soclabs/design_1.bit
+ - ./nanosoc_tech/fpga_imp/pynq_export/pz2/pynq/overlays/soclabs/design_1.hwh
tags:
- Vivado2021.1
@@ -72,7 +72,7 @@ build-job-ZCU104: # This job runs in the build stage, which runs first.
stage: build
script:
# move to fpga_imp directory and run the fpga build script for pynq z2
- - cd ./nanosoc/fpga_imp/
+ - cd ./nanosoc_tech/fpga_imp/
- source ../../set_env.sh
- if source ./build_fpga_pynq_zcu104.scr; then echo "Vivado Finished"; fi
- FILE=./pynq_export/pz104/pynq/overlays/soclabs/design_1.bit
@@ -85,8 +85,8 @@ build-job-ZCU104: # This job runs in the build stage, which runs first.
artifacts:
paths:
# Keep the generated bit and hwh file from fpga build script
- - ./nanosoc/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.bit
- - ./nanosoc/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.hwh
+ - ./nanosoc_tech/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.bit
+ - ./nanosoc_tech/fpga_imp/pynq_export/pz104/pynq/overlays/soclabs/design_1.hwh
tags:
- Vivado2021.1
--
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