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nanosoc_ip.flist 3.18 KiB
//-----------------------------------------------------------------------------
// NanoSoC IP Filelist
// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
//
// Contributors
//
// David Mapstone (d.a.mapstone@soton.ac.uk)
//
// Copyright � 2021-3, SoC Labs (www.soclabs.org)
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// Abstract : Verilog Command File for NanoSoC IP
//-----------------------------------------------------------------------------

// ============= Verilog library extensions ===========
+libext+.v+.vlib

// =============    NanoSoC IP search path    =============

// NanoSoC Chip Pads Level
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v

// NanoSoC Chip Level
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_chip/chip/verilog/nanosoc_chip.v

// NanoSoC System Level
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_system/verilog/nanosoc_system.v

// NanoSoC Subsystems
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/cpu/verilog/nanosoc_ss_cpu.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/debug/verilog/nanosoc_ss_debug.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/expansion/verilog/nanosoc_ss_expansion.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/systemctrl/verilog/nanosoc_ss_systemctrl.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/interconnect/verilog/nanosoc_ss_interconnect.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_subsystems/dma/verilog/nanosoc_ss_dma.v

// Bus Matrix
-f $(SOCLABS_NANOSOC_TECH_DIR)/flist/nanosoc_busmatrix_ip.flist

// NanoSoC Regions - Bootrom
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/bootrom_0/verilog/nanosoc_bootrom_cpu_0.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/bootrom_0/verilog/nanosoc_region_bootrom_0.v

// NanoSoC Regions - CPU Memories
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/dmem_0/verilog/nanosoc_region_dmem_0.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/imem_0/verilog/nanosoc_region_imem_0.v

// NanoSoC Regions - Expansion Regions
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/exp/verilog/nanosoc_region_exp.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/expram_h/verilog/nanosoc_region_expram_h.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/expram_l/verilog/nanosoc_region_expram_l.v

// NanoSoC Regions - Sysio Region
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysctrl.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_apb_ss.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v

// NanoSoC Regions - SysTable Region
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/systable/verilog/nanosoc_coresight_systable.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_regions/systable/verilog/nanosoc_region_systable.v

// NanoSoC Control
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_control/verilog/nanosoc_clkctrl.v
$(SOCLABS_NANOSOC_TECH_DIR)/nanosoc/nanosoc_control/verilog/nanosoc_pin_mux.v