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  • asic_lib_mem_ip.flist 998 B
    //-----------------------------------------------------------------------------
    // FPGA Library Memory Filelist
    // A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
    //
    // Contributors
    //
    // Daniel Newbrook (d.newbrook@soton.ac.uk)
    //
    // Copyright � 2021-3, SoC Labs (www.soclabs.org)
    //-----------------------------------------------------------------------------
    //-----------------------------------------------------------------------------
    // Abstract : Verilog Command File for NanoSoC Testbench
    //-----------------------------------------------------------------------------
    
    // ============= Verilog library extensions ===========
    +libext+.v+.vlib
    
    // =============    NanoSoC Testbench search path    =============
    // +incdir+$(SOCLABS_ASIC_LIB_TECH_DIR)/sram/verilog/
    
    // - Top-level testbench
    $(SOCLABS_ASIC_LIB_TECH_DIR)/sram/verilog/sl_ahb_sram.v
    $(SOCLABS_ASIC_LIB_TECH_DIR)/sram/verilog/sl_sram.v
    $(SOCLABS_ASIC_LIB_TECH_DIR)/rom/verilog/bootrom.v