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Signals index

L
 last_d_charstrobe : cmsdk_debug_tester : reg
 load_reg : soclabs_4x7_MasterInput : wire
 LOCKUP : cmsdk_mcu_clkctrl : input
Connects up to:nanosoc_chip:u_cmsdk_mcu_clkctrl:LOCKUP 
 LOCKUP : cmsdk_mcu_sysctrl : input
Connects up to:nanosoc_sysio:u_cmsdk_mcu_sysctrl:LOCKUP 
 LOCKUP : CORTEXM0INTEGRATION : output
Connects down to:CORTEXM0:u_cortexm0:LOCKUP 
Connects up to:nanosoc_cpu:u_cortex_m0_integration:LOCKUP 
 LOCKUP : nanosoc_chip : wire
Connects down to:cmsdk_mcu_clkctrl:u_cmsdk_mcu_clkctrl:LOCKUP , nanosoc_cpu:u_nanosoc_cpu:LOCKUP , nanosoc_sysio:u_nanosoc_sysio:LOCKUP 
 LOCKUP : nanosoc_cpu : output
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:LOCKUP 
Connects up to:nanosoc_chip:u_nanosoc_cpu:LOCKUP 
 LOCKUP : nanosoc_sysio : input
Connects down to:cmsdk_mcu_sysctrl:u_cmsdk_mcu_sysctrl:LOCKUP 
Connects up to:nanosoc_chip:u_nanosoc_sysio:LOCKUP 
 LOCKUPRESET : cmsdk_mcu_clkctrl : input
Connects up to:nanosoc_chip:u_cmsdk_mcu_clkctrl:LOCKUPRESET 
 LOCKUPRESET : cmsdk_mcu_sysctrl : output
Connects up to:nanosoc_sysio:u_cmsdk_mcu_sysctrl:LOCKUPRESET 
 LOCKUPRESET : nanosoc_chip : wire
Connects down to:cmsdk_mcu_clkctrl:u_cmsdk_mcu_clkctrl:LOCKUPRESET , nanosoc_sysio:u_nanosoc_sysio:LOCKUPRESET 
 LOCKUPRESET : nanosoc_cpu : wire
 LOCKUPRESET : nanosoc_sysio : output
Connects down to:cmsdk_mcu_sysctrl:u_cmsdk_mcu_sysctrl:LOCKUPRESET 
Connects up to:nanosoc_chip:u_nanosoc_sysio:LOCKUPRESET 
 log_file : cmsdk_uart_capture : reg
 loop1 : cmsdk_iop_gpio : integer
 loop2 : cmsdk_iop_gpio : integer
 loop3 : cmsdk_iop_gpio : integer
 loop4 : cmsdk_iop_gpio : integer
 loop5 : cmsdk_iop_gpio : integer
 loop6 : cmsdk_iop_gpio : integer
 low_level_int : cmsdk_iop_gpio : wire
M
 mapped_cntr_f : cmsdk_apb_usrt : wire
 mask : cortexm0_wic : reg
 mask_en : cortexm0_wic : wire
 master_enable : pl230_ahb_ctrl : input
Connects up to:pl230_udma:u_pl230_ahb_ctrl:master_enable 
 master_enable : pl230_apb_regs : output
Connects up to:pl230_udma:u_pl230_apb_regs:master_enable 
 master_enable : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:master_enable , pl230_ahb_ctrl:u_pl230_ahb_ctrl:master_enable 
 master_ip : soclabs_4x7_MasterInput : output reg
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_MasterInput_0:i_master0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_MasterInput_1:i_master1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_MasterInput_2:i_master2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_MasterInput_3:i_master3 
 master_op0 : soclabs_4x7_SlaveOutput : input wire
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_0:i_master0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_1:i_master0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_2:i_master0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_3:i_master0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_4:i_master0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_5:i_master0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_6:i_master0 
 master_op1 : soclabs_4x7_SlaveOutput : input wire
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_0:i_master1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_1:i_master1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_2:i_master1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_3:i_master1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_4:i_master1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_5:i_master1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_6:i_master1 
 master_op2 : soclabs_4x7_SlaveOutput : input wire
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_0:i_master2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_1:i_master2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_2:i_master2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_3:i_master2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_4:i_master2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_5:i_master2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_6:i_master2 
 master_op3 : soclabs_4x7_SlaveOutput : input wire
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_0:i_master3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_1:i_master3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_2:i_master3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_3:i_master3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_4:i_master3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_5:i_master3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_6:i_master3 
 mastlock_ip : soclabs_4x7_MasterInput : output reg
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_MasterInput_0:i_mastlock0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_MasterInput_1:i_mastlock1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_MasterInput_2:i_mastlock2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_MasterInput_3:i_mastlock3 
 mastlock_op0 : soclabs_4x7_SlaveOutput : input wire
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_0:i_mastlock0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_1:i_mastlock0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_2:i_mastlock0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_3:i_mastlock0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_4:i_mastlock0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_5:i_mastlock0 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_6:i_mastlock0 
 mastlock_op1 : soclabs_4x7_SlaveOutput : input wire
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_0:i_mastlock1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_1:i_mastlock1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_2:i_mastlock1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_3:i_mastlock1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_4:i_mastlock1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_5:i_mastlock1 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_6:i_mastlock1 
 mastlock_op2 : soclabs_4x7_SlaveOutput : input wire
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_0:i_mastlock2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_1:i_mastlock2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_2:i_mastlock2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_3:i_mastlock2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_4:i_mastlock2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_5:i_mastlock2 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_6:i_mastlock2 
 mastlock_op3 : soclabs_4x7_SlaveOutput : input wire
Connects up to:soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_0:i_mastlock3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_1:i_mastlock3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_2:i_mastlock3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_3:i_mastlock3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_4:i_mastlock3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_5:i_mastlock3 , soclabs_4x7_AhbMatrix:u_soclabs_4x7_slaveoutput_6:i_mastlock3 
 mcd : cmsdk_uart_capture : integer
 merge1 : cmsdk_ahb_to_sram : wire
 mux_hready : cmsdk_ahb_slave_mux : wire
 mux_inc : pl230_ahb_ctrl : wire
 mux_size : pl230_ahb_ctrl : wire
N
 new_masked_int : cmsdk_iop_gpio : wire
 new_raw_int : cmsdk_iop_gpio : wire
 next_burst_count : soclabs_4x7_Arbiter : reg
 next_burst_hold : soclabs_4x7_Arbiter : reg
 next_early_term_count : soclabs_4x7_Arbiter : wire
 next_hsel_lock : soclabs_4x7_SlaveOutput : wire
 next_state : cmsdk_ahb_default_slave : wire
 next_state : cmsdk_ahb_to_apb : reg
 next_useburst : pl230_ahb_ctrl : wire
 NMI : CORTEXM0INTEGRATION : input
Connects up to:nanosoc_cpu:u_cortex_m0_integration:NMI 
 NMI : nanosoc_cpu : input
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:NMI 
Connects up to:nanosoc_chip:u_nanosoc_cpu:intnmi_cm0 
 nmi_pend : CORTEXM0INTEGRATION : wire
Connects down to:CORTEXM0:u_cortexm0:NMI 
 NOE : PAD_INOUT8MA_NOE : input
Connects up to:nanosoc_chip_pads:uPAD_P0_00:p0_z , nanosoc_chip_pads:uPAD_P0_01:p0_z , nanosoc_chip_pads:uPAD_P0_02:p0_z , nanosoc_chip_pads:uPAD_P0_03:p0_z , nanosoc_chip_pads:uPAD_P0_04:p0_z , nanosoc_chip_pads:uPAD_P0_05:p0_z , nanosoc_chip_pads:uPAD_P0_06:p0_z , nanosoc_chip_pads:uPAD_P0_07:p0_z , nanosoc_chip_pads:uPAD_P0_08:p0_z , nanosoc_chip_pads:uPAD_P0_09:p0_z , nanosoc_chip_pads:uPAD_P0_10:p0_z , nanosoc_chip_pads:uPAD_P0_11:p0_z , nanosoc_chip_pads:uPAD_P0_12:p0_z , nanosoc_chip_pads:uPAD_P0_13:p0_z , nanosoc_chip_pads:uPAD_P0_14:p0_z , nanosoc_chip_pads:uPAD_P0_15:p0_z , nanosoc_chip_pads:uPAD_P1_00:p1_z , nanosoc_chip_pads:uPAD_P1_01:p1_z , nanosoc_chip_pads:uPAD_P1_02:p1_z , nanosoc_chip_pads:uPAD_P1_03:p1_z , nanosoc_chip_pads:uPAD_P1_04:p1_z , nanosoc_chip_pads:uPAD_P1_05:p1_z , nanosoc_chip_pads:uPAD_P1_06:p1_z , nanosoc_chip_pads:uPAD_P1_07:p1_z , nanosoc_chip_pads:uPAD_P1_08:p1_z , nanosoc_chip_pads:uPAD_P1_09:p1_z , nanosoc_chip_pads:uPAD_P1_10:p1_z , nanosoc_chip_pads:uPAD_P1_11:p1_z , nanosoc_chip_pads:uPAD_P1_12:p1_z , nanosoc_chip_pads:uPAD_P1_13:p1_z , nanosoc_chip_pads:uPAD_P1_14:p1_z , nanosoc_chip_pads:uPAD_P1_15:p1_z , nanosoc_chip_pads:uPAD_SWDIO_I:swdio_z , nanosoc_chip_pads:uPAD_XTAL_I:tiehi , nanosoc_chip_pads:uPAD_NRST_I:tiehi , nanosoc_chip_pads:uPAD_SWDCLK_I:tiehi , nanosoc_chip_pads:uPAD_XTAL_O:tielo 
 no_port : soclabs_4x7_Arbiter : output reg
Connects up to:soclabs_4x7_SlaveOutput:u_output_arb:no_port 
 no_port : soclabs_4x7_SlaveOutput : wire
Connects down to:soclabs_4x7_Arbiter:u_output_arb:no_port 
 no_port_next : soclabs_4x7_Arbiter : reg
 nRESET : cortexm0_wic : input (used in @negedge)
Connects up to:CORTEXM0INTEGRATION:u_wic:HRESETn 
 NRST : cmsdk_clkreset : output
Connects up to:tb_cmsdk_mcu:u_cmsdk_clkreset:NRST 
 NRST : cmsdk_mcu_clkctrl : input (used in @negedge)
Connects up to:nanosoc_chip:u_cmsdk_mcu_clkctrl:nrst_in 
 NRST : nanosoc_chip_pads : inout
Connects down to:PAD_INOUT8MA_NOE:uPAD_NRST_I:PAD 
Connects up to:tb_cmsdk_mcu:u_nanosoc_chip_pads:NRST 
 NRST : tb_cmsdk_mcu : wire (used in @negedge)
Connects down to:nanosoc_chip_pads:u_nanosoc_chip_pads:NRST , cmsdk_clkreset:u_cmsdk_clkreset:NRST , cmsdk_uart_capture:u_cmsdk_uart_capture:RESETn , cmsdk_uart_capture:u_cmsdk_uart_capture1:RESETn , cmsdk_uart_capture:u_cmsdk_uart_capture2:RESETn , cmsdk_debug_tester:u_cmsdk_debug_tester:PORESETn 
 nrst_i : nanosoc_chip : input
Connects up to:nanosoc_chip_pads:u_nanosoc_chip:nrst_i 
 nrst_i : nanosoc_chip_pads : wire
Connects down to:nanosoc_chip:u_nanosoc_chip:nrst_i , PAD_INOUT8MA_NOE:uPAD_NRST_I:I 
 nrst_in : nanosoc_chip : wire (used in @negedge)
Connects down to:cmsdk_mcu_clkctrl:u_cmsdk_mcu_clkctrl:NRST , cortexm0_rst_ctl:u_rst_ctl:GLOBALRESETn 
 nTDOEN : CORTEXM0INTEGRATION : output
 nTRST : cmsdk_debug_tester : output
Connects up to:tb_cmsdk_mcu:u_cmsdk_debug_tester:nTRST 
 nTRST : cmsdk_mcu_pin_mux : input
Connects up to:nanosoc_chip:u_pin_mux:nTRST 
 nTRST : CORTEXM0INTEGRATION : input
Connects down to:CORTEXM0DAP:u_dap:nTRST 
 nTRST : nanosoc_chip : wire
Connects down to:cmsdk_mcu_pin_mux:u_pin_mux:nTRST 
 nTRST : tb_cmsdk_mcu : wire
Connects down to:cmsdk_debug_tester:u_cmsdk_debug_tester:nTRST 
 numberofchannels : pl230_apb_regs : integer
 nxt_baud_cntr_f : cmsdk_apb_usrt : wire
 nxt_baud_cntr_i : cmsdk_apb_usrt : wire
 nxt_be_swap_ctrl : cmsdk_apb_subsystem : wire
 nxt_byte_strobe : cmsdk_mcu_sysctrl : wire
 nxt_cdbgpwrupack : cortexm0_pmu : wire
Connects down to:cm0_pmu_cdc_send_reset:u_cdbgpwrupack:REGDI 
 nxt_dbg_iso : cortexm0_pmu : wire
Connects down to:cm0_pmu_cdc_send_reset:u_dbgisolaten:REGDI 
 nxt_dbg_pdn : cortexm0_pmu : wire
Connects down to:cm0_pmu_cdc_send_set:u_dbgpwrdown:REGDI 
 nxt_dbg_st : cortexm0_pmu : reg
 nxt_dout_padded : cmsdk_iop_gpio : wire
 nxt_end_simulation : cmsdk_debug_tester : reg
 nxt_end_simulation : cmsdk_uart_capture : reg
 nxt_hsel_reg : cmsdk_ahb_slave_mux : wire
 nxt_mask : cortexm0_wic : wire
 nxt_pend : cortexm0_wic : wire
 nxt_prst : cmsdk_mcu_clkctrl : wire
 nxt_resetinfo : cmsdk_mcu_sysctrl : wire
 nxt_reset_sync : cmsdk_mcu_clkctrl : wire
 nxt_rxd_lpf : cmsdk_apb_usrt : wire
 nxt_rx_buf : cmsdk_apb_usrt : wire
 nxt_rx_buf_full : cmsdk_apb_usrt : wire
 nxt_rx_overrun : cmsdk_apb_usrt : wire
 nxt_rx_shift : cmsdk_uart_capture : wire
 nxt_rx_shift_buf : cmsdk_apb_usrt : wire
 nxt_rx_state : cmsdk_apb_usrt : reg
 nxt_rx_tick_cnt : cmsdk_apb_usrt : wire
 nxt_sys_iso : cortexm0_pmu : wire
Connects down to:cm0_pmu_cdc_send_reset:u_sysisolaten:REGDI 
 nxt_sys_pdn : cortexm0_pmu : wire
Connects down to:cm0_pmu_cdc_send_reset:u_syspwrdown:REGDI 
 nxt_sys_rtn : cortexm0_pmu : wire
Connects down to:cm0_pmu_cdc_send_reset:u_sysretainn:REGDI 
 nxt_sys_st : cortexm0_pmu : reg
 nxt_txd : cmsdk_apb_usrt : wire
 nxt_tx_overrun : cmsdk_apb_usrt : wire
 nxt_tx_shift_buf : cmsdk_apb_usrt : wire
 nxt_tx_state : cmsdk_apb_usrt : reg
 nxt_tx_tick_cnt : cmsdk_apb_usrt : wire
 n_complete : pl230_ahb_ctrl : reg
 n_complete_en : pl230_ahb_ctrl : wire
 n_complete_nxt : pl230_ahb_ctrl : wire
 n_count : pl230_ahb_ctrl : reg
 n_count_en : pl230_ahb_ctrl : wire
 n_count_nxt : pl230_ahb_ctrl : wire
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