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V |
W |
Connects down to: | cortexm0_wic:u_wic:WAKEUP |
Connects up to: | nanosoc_cpu:u_cortex_m0_integration:WAKEUP |
Connects down to: | cm0_pmu_sync_reset:u_dbg_wakeup_sync:SYNCDI |
Connects up to: | nanosoc_chip:u_cortexm0_pmu:WAKEUP |
Connects up to: | CORTEXM0INTEGRATION:u_wic:WAKEUP |
Connects down to: | cortexm0_pmu:u_cortexm0_pmu:WAKEUP , nanosoc_cpu:u_nanosoc_cpu:WAKEUP |
Connects down to: | CORTEXM0INTEGRATION:u_cortex_m0_integration:WAKEUP |
Connects up to: | nanosoc_chip:u_nanosoc_cpu:WAKEUP |
Connects down to: | cm0_pmu_sync_reset:u_dbg_wakeup_sync:SYNCDO |
Connects up to: | nanosoc_sysio:u_apb_subsystem:SYS_NMI |
Connects down to: | cmsdk_apb_slave_mux:u_apb_slave_mux:PRDATA8 |
Connects down to: | cmsdk_apb_slave_mux:u_apb_slave_mux:PREADY8 |
Connects down to: | cmsdk_apb_slave_mux:u_apb_slave_mux:PSEL8 |
Connects down to: | cmsdk_apb_slave_mux:u_apb_slave_mux:PSLVERR8 |
Connects up to: | nanosoc_sysio:u_apb_subsystem:WDOGRESETREQ |
Connects up to: | nanosoc_chip:u_fpga_ram2:wdata_ram2 |
Connects up to: | nanosoc_chip:u_fpga_ram3:wdata_ram3 , nanosoc_chip:u_fpga_ram8:wdata_ram8 , nanosoc_chip:u_fpga_ram9:wdata_ram9 |
Connects down to: | cmsdk_ahb_to_sram:u_ahb_to_sram2:SRAMWDATA , cmsdk_fpga_rom:u_fpga_ram2:WDATA |
Connects down to: | cmsdk_ahb_to_sram:u_ahb_to_sram3:SRAMWDATA , cmsdk_fpga_sram:u_fpga_ram3:WDATA |
Connects down to: | cmsdk_ahb_to_sram:u_ahb_to_sram8:SRAMWDATA , cmsdk_fpga_sram:u_fpga_ram8:WDATA |
Connects down to: | cmsdk_ahb_to_sram:u_ahb_to_sram9:SRAMWDATA , cmsdk_fpga_sram:u_fpga_ram9:WDATA |
Connects up to: | nanosoc_sysio:u_cmsdk_mcu_sysctrl:WDOGRESETREQ |
Connects down to: | nanosoc_cpu:u_nanosoc_cpu:WDOGRESETREQ , nanosoc_sysio:u_nanosoc_sysio:WDOGRESETREQ |
Connects up to: | nanosoc_chip:u_nanosoc_cpu:WDOGRESETREQ |
Connects down to: | cmsdk_mcu_sysctrl:u_cmsdk_mcu_sysctrl:WDOGRESETREQ , cmsdk_apb_subsystem:u_apb_subsystem:watchdog_reset |
Connects up to: | nanosoc_chip:u_nanosoc_sysio:WDOGRESETREQ |
Connects down to: | cmsdk_ahb_to_sram:u_ahb_to_sram2:SRAMWEN , cmsdk_fpga_rom:u_fpga_ram2:WREN |
Connects down to: | cmsdk_ahb_to_sram:u_ahb_to_sram3:SRAMWEN , cmsdk_fpga_sram:u_fpga_ram3:WREN |
Connects down to: | cmsdk_ahb_to_sram:u_ahb_to_sram8:SRAMWEN , cmsdk_fpga_sram:u_fpga_ram8:WREN |
Connects down to: | cmsdk_ahb_to_sram:u_ahb_to_sram9:SRAMWEN , cmsdk_fpga_sram:u_fpga_ram9:WREN |
Connects up to: | CORTEXM0INTEGRATION:u_wic:wic_clear |
Connects up to: | CORTEXM0INTEGRATION:u_wic:wic_ds_ack_n |
Connects up to: | CORTEXM0INTEGRATION:u_wic:wic_ds_req_n |
Connects down to: | cortexm0_wic:u_wic:WICENACK |
Connects up to: | nanosoc_cpu:u_cortex_m0_integration:WICENACK |
Connects down to: | cm0_pmu_sync_reset:u_dbg_wicenack_sync:SYNCDI |
Connects up to: | nanosoc_chip:u_cortexm0_pmu:WICENACK |
Connects up to: | CORTEXM0INTEGRATION:u_wic:WICENACK |
Connects down to: | cortexm0_pmu:u_cortexm0_pmu:WICENACK , nanosoc_cpu:u_nanosoc_cpu:WICENACK |
Connects down to: | CORTEXM0INTEGRATION:u_cortex_m0_integration:WICENACK |
Connects up to: | nanosoc_chip:u_nanosoc_cpu:WICENACK |
Connects down to: | cm0_pmu_sync_reset:u_dbg_wicenack_sync:SYNCDO |
Connects down to: | cortexm0_wic:u_wic:WICENREQ |
Connects up to: | nanosoc_cpu:u_cortex_m0_integration:WICENREQ |
Connects up to: | nanosoc_chip:u_cortexm0_pmu:WICENREQ |
Connects up to: | CORTEXM0INTEGRATION:u_wic:WICENREQ |
Connects down to: | cortexm0_pmu:u_cortexm0_pmu:WICENREQ , nanosoc_cpu:u_nanosoc_cpu:WICENREQ |
Connects down to: | CORTEXM0INTEGRATION:u_cortex_m0_integration:WICENREQ |
Connects up to: | nanosoc_chip:u_nanosoc_cpu:WICENREQ |
Connects up to: | CORTEXM0INTEGRATION:u_wic:wic_int |
Connects up to: | CORTEXM0INTEGRATION:u_wic:wic_load |
Connects up to: | CORTEXM0INTEGRATION:u_wic:wic_mask |
Connects up to: | CORTEXM0INTEGRATION:u_wic:wic_pend |
Connects up to: | nanosoc_cpu:u_cortex_m0_integration:WICSENSE |
Connects up to: | CORTEXM0INTEGRATION:u_wic:wic_sense |
Connects down to: | CORTEXM0INTEGRATION:u_cortex_m0_integration:WICSENSE |
Connects down to: | CORTEXM0:u_cortexm0:WICCLEAR , cortexm0_wic:u_wic:WICCLEAR |
Connects down to: | CORTEXM0:u_cortexm0:WICDSACKn , cortexm0_wic:u_wic:WICDSACKn |
Connects down to: | CORTEXM0:u_cortexm0:WICDSREQn , cortexm0_wic:u_wic:WICDSREQn |
Connects down to: | cortexm0_wic:u_wic:WICINT |
Connects down to: | CORTEXM0:u_cortexm0:WICLOAD , cortexm0_wic:u_wic:WICLOAD |
Connects down to: | cortexm0_wic:u_wic:WICMASK |
Connects down to: | CORTEXM0:u_cortexm0:WICMASKISR |
Connects down to: | CORTEXM0:u_cortexm0:WICMASKNMI |
Connects down to: | CORTEXM0:u_cortexm0:WICMASKRXEV |
Connects down to: | cortexm0_wic:u_wic:WICPEND |
Connects down to: | cortexm0_wic:u_wic:WICSENSE |
Connects up to: | nanosoc_chip:u_fpga_ram2:wen_ram2 |
Connects up to: | nanosoc_chip:u_fpga_ram3:wen_ram3 , nanosoc_chip:u_fpga_ram8:wen_ram8 , nanosoc_chip:u_fpga_ram9:wen_ram9 |
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This page: | Created: | Wed Feb 22 13:33:07 2023 |
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