diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000000000000000000000000000000000000..c33874293d489c5bf605a963425764cd52ff54f2 --- /dev/null +++ b/.gitignore @@ -0,0 +1,4 @@ +.socinit +.metadata +CheckResults.log +CoherencyCheckConfiguration.config \ No newline at end of file diff --git a/.gitmodules b/.gitmodules new file mode 100644 index 0000000000000000000000000000000000000000..1c1b06e88db165b8c1c1ddab4bb017771fc0dd0b --- /dev/null +++ b/.gitmodules @@ -0,0 +1,6 @@ +[submodule "expansion_subsystem_tech"] + path = expansion_subsystem_tech + url = https://git.soton.ac.uk/soclabs/expansion_subsystem_tech.git +[submodule "megasoc_tech"] + path = megasoc_tech + url = https://git.soton.ac.uk/soclabs/megasoc_tech.git diff --git a/.slprojroot b/.slprojroot new file mode 100644 index 0000000000000000000000000000000000000000..e88cb3343527fe89a1fdfc777745ce9a037b7456 --- /dev/null +++ b/.slprojroot @@ -0,0 +1,11 @@ +#----------------------------------------------------------------------------- +# SoC Labs Project Root Marker +# - This file tells environment setter that this is root of a SoC Labs Project +# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +# +# Contributors +# +# David Mapstone (d.a.mapstone@soton.ac.uk) +# +# Copyright 2023, SoC Labs (www.soclabs.org) +#----------------------------------------------------------------------------- \ No newline at end of file diff --git a/env/dependency_env.sh b/env/dependency_env.sh new file mode 100644 index 0000000000000000000000000000000000000000..7ec5183d02dee867e7b1cf806063fc3ed0f67fb3 --- /dev/null +++ b/env/dependency_env.sh @@ -0,0 +1,28 @@ +#----------------------------------------------------------------------------- +# SoC Labs Dependency Repository Environment Setup Script +# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +# +# Contributors +# +# David Mapstone (d.a.mapstone@soton.ac.uk) +# +# Copyright 2023, SoC Labs (www.soclabs.org) +#----------------------------------------------------------------------------- +#!/bin/bash + +#----------------------------------------------------------------------------- +# Technologies +#----------------------------------------------------------------------------- + +# MilliSoC Tech +export SOCLABS_MEGASOC_TECH_DIR="$SOCLABS_PROJECT_DIR/millisoc_tech" + +# MilliSoC Expansion Tech +export SOCLABS_MEGASOC_EXP_TECH_DIR="$SOCLABS_PROJECT_DIR/expansion_subsystem_tech" + +#----------------------------------------------------------------------------- +# Flows +#----------------------------------------------------------------------------- + +# SoCTools - Toolkit of scripts related to SoCLabs projects +export SOCLABS_SOCTOOLS_FLOW_DIR="$SOCLABS_PROJECT_DIR/soctools_flow" diff --git a/expansion_subsystem_tech b/expansion_subsystem_tech new file mode 160000 index 0000000000000000000000000000000000000000..9fae73198dcf7e9b44b4a62815821b1585ac9f18 --- /dev/null +++ b/expansion_subsystem_tech @@ -0,0 +1 @@ +Subproject commit 9fae73198dcf7e9b44b4a62815821b1585ac9f18 diff --git a/flist/megasoc_project.flist b/flist/megasoc_project.flist new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/make.cfg b/make.cfg new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/makefile b/makefile new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/megasoc_chip/chip/logical/millisoc_chip.v b/megasoc_chip/chip/logical/millisoc_chip.v new file mode 100644 index 0000000000000000000000000000000000000000..7073420d85278f1a6d5cedbffa203470b2c31f64 --- /dev/null +++ b/megasoc_chip/chip/logical/millisoc_chip.v @@ -0,0 +1,20 @@ +//----------------------------------------------------------------------------- +// MegaSoC Chip +// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +// +// Contributors +// +// Daniel Newbrook (d.newbrook@soton.ac.uk) +// +// Copyright � 2021-4, SoC Labs (www.soclabs.org) +//----------------------------------------------------------------------------- +// Modules instantiated: +// megasoc_system + +module megasoc_chip( + +); + + + +endmodule \ No newline at end of file diff --git a/megasoc_chip/pads/cln28ht/logical/megasoc_chip_pads.v b/megasoc_chip/pads/cln28ht/logical/megasoc_chip_pads.v new file mode 100644 index 0000000000000000000000000000000000000000..02cc030c1693c92cf744a25ebb29de7166a0239a --- /dev/null +++ b/megasoc_chip/pads/cln28ht/logical/megasoc_chip_pads.v @@ -0,0 +1,22 @@ +//----------------------------------------------------------------------------- +// MegaSoC Chip Pads for TSMC 28nm node +// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +// +// Contributors +// +// Daniel Newbrook (d.newbrook@soton.ac.uk) +// +// Copyright � 2021-4, SoC Labs (www.soclabs.org) +//----------------------------------------------------------------------------- +// Modules instantiated: +// megasoc_chip + +module megasoc_chip_pads( + +); + +megasoc_chip u_megasoc_chip( + +); + +endmodule diff --git a/megasoc_chip/pads/glib/logical/megasoc_chip_pads.v b/megasoc_chip/pads/glib/logical/megasoc_chip_pads.v new file mode 100644 index 0000000000000000000000000000000000000000..4048dc442a0f7bfef7e08fd3ebd417533ee5aa14 --- /dev/null +++ b/megasoc_chip/pads/glib/logical/megasoc_chip_pads.v @@ -0,0 +1,24 @@ +//----------------------------------------------------------------------------- +// MegaSoC Chip Pads for Generic Libraries +// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +// +// Contributors +// +// Daniel Newbrook (d.newbrook@soton.ac.uk) +// +// Copyright � 2021-4, SoC Labs (www.soclabs.org) +//----------------------------------------------------------------------------- +// Modules instantiated: +// megasoc_chip + +module megasoc_chip_pads( + +); + + +megasoc_chip u_megasoc_chip( + +); + + +endmodule \ No newline at end of file diff --git a/megasoc_system/logical/megasoc_system.v b/megasoc_system/logical/megasoc_system.v new file mode 100644 index 0000000000000000000000000000000000000000..87c0dba565c93e8d5fe1e6b5fdce5849daf7d002 --- /dev/null +++ b/megasoc_system/logical/megasoc_system.v @@ -0,0 +1,29 @@ +//----------------------------------------------------------------------------- +// MegaSoC System +// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +// +// Contributors +// +// Daniel Newbrook (d.newbrook@soton.ac.uk) +// +// Copyright � 2021-4, SoC Labs (www.soclabs.org) +//----------------------------------------------------------------------------- +// Modules instantiated: +// megasoc_tech_wrapper +// expansion_subsystem_wrapper + +module megasoc_system( + +); + + + +megasoc_tech_wrapper u_megasoc_tech_wrapper( + +); + +expansion_subsystem_wrapper u_megasoc_expansion_wrapper( + +); + +endmodule diff --git a/megasoc_tech b/megasoc_tech new file mode 160000 index 0000000000000000000000000000000000000000..3f666e24aae6e227d0d5f87ca718c9e01744df3f --- /dev/null +++ b/megasoc_tech @@ -0,0 +1 @@ +Subproject commit 3f666e24aae6e227d0d5f87ca718c9e01744df3f diff --git a/projbranch b/projbranch new file mode 100644 index 0000000000000000000000000000000000000000..5852ecc0a4d47de9014d11c004ad8104a52aa079 --- /dev/null +++ b/projbranch @@ -0,0 +1,17 @@ +#----------------------------------------------------------------------------- +# SoC Labs Sub repository branch setup +# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +# +# Contributors +# +# David Mapstone (d.a.mapstone@soton.ac.uk) +# +# Copyright 2023, SoC Labs (www.soclabs.org) +#----------------------------------------------------------------------------- +# Each Repo needs to have its branch set manually in here - they will defaultly be checked out to main +# Project Repository Subrepository Branch Index +# Add your Accelerator Repository here + +megasoc_tech: main +expansion_subsystem_tech: main +soctools_flow: main diff --git a/set_env.sh b/set_env.sh new file mode 100644 index 0000000000000000000000000000000000000000..9ee7ce95bf4ba46c89586a88ee072b2a65b4763e --- /dev/null +++ b/set_env.sh @@ -0,0 +1,15 @@ +#----------------------------------------------------------------------------- +# SoC Labs Environment Setup Script +# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +# +# Contributors +# +# David Mapstone (d.a.mapstone@soton.ac.uk) +# +# Copyright 2023, SoC Labs (www.soclabs.org) +#----------------------------------------------------------------------------- +#!/bin/bash + +# Source set_env script from soctools_flow +source soctools_flow/bin/project_setup.sh $@ + diff --git a/verif/testbench/logical/megasoc_project_tb.v b/verif/testbench/logical/megasoc_project_tb.v new file mode 100644 index 0000000000000000000000000000000000000000..649f56d41a8636bb4373fc5d4c4b27d80abb973c --- /dev/null +++ b/verif/testbench/logical/megasoc_project_tb.v @@ -0,0 +1,25 @@ +//----------------------------------------------------------------------------- +// MegaSoC Chip testbench +// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license. +// +// Contributors +// +// Daniel Newbrook (d.newbrook@soton.ac.uk) +// +// Copyright � 2021-4, SoC Labs (www.soclabs.org) +//----------------------------------------------------------------------------- +// Modules instantiated: +// megasoc_chip_pads +`timescale 1ns/1ps + +module megasoc_chip_tb + + + + +megasoc_chip_pads u_megasoc_chip_pads( + +) + + +endmodule