From 69e79bf881a73af0b3ee04e25835450ed2635718 Mon Sep 17 00:00:00 2001
From: dam1n19 <dam1n19@soton.ac.uk>
Date: Sat, 29 Apr 2023 14:51:36 +0100
Subject: [PATCH] SOC1-167: Added newline to romgeneration in srom file
---
mem/verilog/SROM_Ax32.v | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mem/verilog/SROM_Ax32.v b/mem/verilog/SROM_Ax32.v
index f7d7bbc..52ff660 100644
--- a/mem/verilog/SROM_Ax32.v
+++ b/mem/verilog/SROM_Ax32.v
@@ -94,7 +94,7 @@ initial
$fwrite(fd," output reg [31:0] RDATA );\n");
$fwrite(fd,"reg [%0d:2] addr_r;\n", ADDRWIDTH+1);
$fwrite(fd,"always @(posedge CLK) if (EN) addr_r <= ADDR;\n");
- $fwrite(fd,"always @(addr_r)");
+ $fwrite(fd,"always @(addr_r)\n");
$fwrite(fd," case(addr_r[%0d:2]) \n", ADDRWIDTH+1);
if (ADDRWIDTH > 8)
for (i = 0; i < 4 << (ADDRWIDTH); i=i+4) begin
--
GitLab