diff --git a/mem/verilog/SROM_Ax32.v b/mem/verilog/SROM_Ax32.v
index f7d7bbc5c555992052712b55e6432771f56da5fb..52ff660864403d0081f6d6538ac4033f12a47f5f 100644
--- a/mem/verilog/SROM_Ax32.v
+++ b/mem/verilog/SROM_Ax32.v
@@ -94,7 +94,7 @@ initial
          $fwrite(fd,"  output reg [31:0] RDATA );\n");
          $fwrite(fd,"reg [%0d:2] addr_r;\n", ADDRWIDTH+1);
          $fwrite(fd,"always @(posedge CLK) if (EN) addr_r <= ADDR;\n");
-         $fwrite(fd,"always @(addr_r)");
+         $fwrite(fd,"always @(addr_r)\n");
          $fwrite(fd,"  case(addr_r[%0d:2]) \n", ADDRWIDTH+1);
          if (ADDRWIDTH > 8)
            for (i = 0; i < 4 << (ADDRWIDTH); i=i+4) begin