From debf53293e2345a7e64cd5c8581b2a950f998902 Mon Sep 17 00:00:00 2001
From: dwf1m12 <d.w.flynn@soton.ac.uk>
Date: Fri, 21 Jan 2022 16:39:57 +0000
Subject: [PATCH] remove HPROT redundant interface port

---
 .../systems/cortex_m0_mcu/verilog/ahb_bootrom__mangled.v       | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/ahb_bootrom__mangled.v b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/ahb_bootrom__mangled.v
index 6094639..54d6c36 100644
--- a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/ahb_bootrom__mangled.v
+++ b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/ahb_bootrom__mangled.v
@@ -20,13 +20,12 @@
 */
 
 /* Source file "tokens.v", line 14 */
-module ahb_bootrom__mangled(HCLK, HRESETn, HSEL, HADDR, HTRANS, HSIZE, HPROT, HWRITE,
+module ahb_bootrom__mangled(HCLK, HRESETn, HSEL, HADDR, HTRANS, HSIZE, HWRITE,
 	HWDATA, HREADY, HREADYOUT, HRDATA, HRESP);
 
 	input	[9:0]		HADDR;
 	input	[1:0]		HTRANS;
 	input	[2:0]		HSIZE;
-	input	[3:0]		HPROT;
 	input	[31:0]		HWDATA;
 	output	[31:0]		HRDATA;
 	input			HCLK;
-- 
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