diff --git a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/v2html_doc.tgz b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/v2html_doc.tgz index 7d54b2eae9576fe16c452a799b0ee71395ac6658..64a53d2a0ae16bb11179ff28ddd5ceadcec49747 100644 Binary files a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/v2html_doc.tgz and b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/v2html_doc.tgz differ diff --git a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/tb_cmsdk_mcu.v b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/tb_cmsdk_mcu.v index 2d07dad96a674624790385bede92a87497b40c63..f443feb3ab9006f10775cca720d89b81fafebc11 100644 --- a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/tb_cmsdk_mcu.v +++ b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/tb_cmsdk_mcu.v @@ -64,12 +64,15 @@ module tb_cmsdk_mcu; wire debug_running; // indicate debug test is running wire debug_err; // indicate debug test has error + wire debug_test_en1; + wire debug_test_en2; wire debug_test_en; // To enable the debug tester connection to MCU GPIO P0 // This signal is controlled by software, // Use "UartPutc((char) 0x1B)" to send ESCAPE code to start // the command, use "UartPutc((char) 0x11)" to send debug test // enable command, use "UartPutc((char) 0x12)" to send debug test // disable command. Refer to tb_uart_capture.v file for detail + assign debug_test_en = debug_test_en1 | debug_test_en2; // FT1248 or UART2 control `ifdef ARM_CMSDK_INCLUDE_CLKGATE parameter CLKGATE_PRESENT = 1; @@ -356,7 +359,7 @@ reg baud_clk_del; .RESETn (NRST), .CLK (uart_clk), //PCLK), .RXD (UARTXD), // UART 2 use for StdOut - .DEBUG_TESTER_ENABLE (debug_test_en), + .DEBUG_TESTER_ENABLE (debug_test_en2), .SIMULATIONEND (), // This signal set to 1 at the end of simulation. .AUXCTRL () ); @@ -396,7 +399,7 @@ wire ft_txd2uart; .RESETn (NRST), .CLK (ft_clk2uart), .RXD (ft_rxd2uart), - .DEBUG_TESTER_ENABLE ( ), + .DEBUG_TESTER_ENABLE (debug_test_en1), .SIMULATIONEND (), // This signal set to 1 at the end of simulation. .AUXCTRL () );