From 3af73ae96cc85a2cdb2470c1d5afa9375e9cf617 Mon Sep 17 00:00:00 2001
From: dwf1m12 <d.w.flynn@soton.ac.uk>
Date: Sat, 3 Sep 2022 09:52:57 +0100
Subject: [PATCH] pad out start of boot message to fix boot rom with ft1248
interface
---
.../software/common/bootloader/bootloader.c | 4 ++--
.../systems/cortex_m0_mcu/verilog/bootrom.v | 20 +++++++++----------
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/Cortex-M0/soclabs_demo/software/common/bootloader/bootloader.c b/Cortex-M0/soclabs_demo/software/common/bootloader/bootloader.c
index 59a41cc..60a111e 100644
--- a/Cortex-M0/soclabs_demo/software/common/bootloader/bootloader.c
+++ b/Cortex-M0/soclabs_demo/software/common/bootloader/bootloader.c
@@ -123,8 +123,8 @@ int main (void)
// UART init
UartStdOutInit();
- UartPuts("\nSOCLABS: ARM Cortex-M0 SDK\n"); // CMSDK boot loader\n");
- UartPuts(" - load flash\n\n");
+ UartPuts("\n\n\nSOCLABS: ARM Cortex-M0 SDK\n"); // CMSDK boot loader\n");
+ UartPuts(" - load flash\n");
FlashLoader();
return 0;
}
diff --git a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/bootrom.v b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/bootrom.v
index 4069059..812ac7d 100644
--- a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/bootrom.v
+++ b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/bootrom.v
@@ -5,7 +5,7 @@
// Contributors
//
// David Flynn (d.w.flynn@soton.ac.uk)
-// Date: 2207051707
+// Date: 2209012137
// Copyright (c) 2021-2, SoC Labs (www.soclabs.org)
//------------------------------------------------------------------------------------
module bootrom (
@@ -200,18 +200,18 @@ always @(addr_r) case(addr_r[9:2])
8'hb5 : RDATA <= 32'h63205041; // 0x02d4
8'hb6 : RDATA <= 32'h7261656c; // 0x02d8
8'hb7 : RDATA <= 32'h000a6465; // 0x02dc
- 8'hb8 : RDATA <= 32'h434f530a; // 0x02e0
- 8'hb9 : RDATA <= 32'h5342414c; // 0x02e4
- 8'hba : RDATA <= 32'h5241203a; // 0x02e8
- 8'hbb : RDATA <= 32'h6f43204d; // 0x02ec
- 8'hbc : RDATA <= 32'h78657472; // 0x02f0
- 8'hbd : RDATA <= 32'h20304d2d; // 0x02f4
- 8'hbe : RDATA <= 32'h0a4b4453; // 0x02f8
- 8'hbf : RDATA <= 32'h00000000; // 0x02fc
+ 8'hb8 : RDATA <= 32'h530a0a0a; // 0x02e0
+ 8'hb9 : RDATA <= 32'h414c434f; // 0x02e4
+ 8'hba : RDATA <= 32'h203a5342; // 0x02e8
+ 8'hbb : RDATA <= 32'h204d5241; // 0x02ec
+ 8'hbc : RDATA <= 32'h74726f43; // 0x02f0
+ 8'hbd : RDATA <= 32'h4d2d7865; // 0x02f4
+ 8'hbe : RDATA <= 32'h44532030; // 0x02f8
+ 8'hbf : RDATA <= 32'h00000a4b; // 0x02fc
8'hc0 : RDATA <= 32'h6c202d20; // 0x0300
8'hc1 : RDATA <= 32'h2064616f; // 0x0304
8'hc2 : RDATA <= 32'h73616c66; // 0x0308
- 8'hc3 : RDATA <= 32'h000a0a68; // 0x030c
+ 8'hc3 : RDATA <= 32'h00000a68; // 0x030c
8'hc4 : RDATA <= 32'h48034904; // 0x0310
8'hc5 : RDATA <= 32'h47706008; // 0x0314
8'hc6 : RDATA <= 32'h48014902; // 0x0318
--
GitLab