From 0e40afa434bf105d92117b5d2447501b9a24d384 Mon Sep 17 00:00:00 2001
From: dwf1m12 <d.w.flynn@soton.ac.uk>
Date: Thu, 25 Nov 2021 16:03:23 +0000
Subject: [PATCH] fix dma configuration to pass tests

---
 .../soclabs_demo/systems/cortex_m0_mcu/verilog/cmsdk_mcu.v  | 4 ++--
 .../soclabs_demo/systems/cortex_m0_mcu/verilog/pl230_defs.v | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/cmsdk_mcu.v b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/cmsdk_mcu.v
index 0691918..e64768d 100644
--- a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/cmsdk_mcu.v
+++ b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/cmsdk_mcu.v
@@ -92,10 +92,10 @@ module cmsdk_mcu #(
 `ifdef ARM_CMSDK_INCLUDE_DMA
   parameter INCLUDE_DMA = 1, // Include instantiation of DMA-230
   // This option also add a number of bus components
-  parameter DMA_CHANNEL_NUM = 4,
+  parameter DMA_CHANNEL_NUM = 1,
 `else
   parameter INCLUDE_DMA = 0,
-  parameter DMA_CHANNEL_NUM = 4,
+  parameter DMA_CHANNEL_NUM = 1,
 `endif
 
 `ifdef ARM_CMSDK_INCLUDE_BITBAND
diff --git a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/pl230_defs.v b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/pl230_defs.v
index 287056d..c061b99 100644
--- a/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/pl230_defs.v
+++ b/Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/verilog/pl230_defs.v
@@ -38,9 +38,9 @@
 `endif
 
 // Set the number of channels implemented
-`define PL230_CHNLS                     4
-`define PL230_CHNL_BITS                 2
-`define PL230_ONE_CHNL
+`define PL230_CHNLS                     1
+`define PL230_CHNL_BITS                 1
+//`define PL230_ONE_CHNL
 
 // Include Integration Test Logic
 `define PL230_INCLUDE_TEST
-- 
GitLab