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Signals index

B
 baseaddr : CORTEXM0INTEGRATION : wire
Connects down to:CORTEXM0DAP:u_dap:BASEADDR 
 baudclken : tb_cmsdk_mcu : wire
 bauddiv : tb_cmsdk_mcu : reg
 BAUDTICK : cmsdk_apb_uart_streamio : output
 baudx16_clk : tb_cmsdk_mcu : wire (used in @posedge)
 baud_clk : tb_cmsdk_mcu : wire
 baud_clk_del : tb_cmsdk_mcu : reg
 baud_div_en : cmsdk_apb_uart_streamio : wire
 baud_updated : cmsdk_apb_uart_streamio : reg
 bigendian : cmsdk_apb_subsystem : wire
 bigendian : cmsdk_iop_gpio : wire
 bigendian : cmsdk_mcu_sysctrl : wire
 boot_hrdata : cmsdk_mcu_chip : wire
Connects down to:cmsdk_mcu_system:u_cmsdk_mcu_system:boot_hrdata , ahb_bootrom:u_ahb_bootloader:HRDATA 
 boot_hrdata : cmsdk_mcu_system : input
Connects down to:cmsdk_ahb_slave_mux:u_ahb_slave_mux_sys_bus:HRDATA2 
Connects up to:cmsdk_mcu_chip:u_cmsdk_mcu_system:boot_hrdata 
 boot_hreadyout : cmsdk_mcu_chip : wire
Connects down to:cmsdk_mcu_system:u_cmsdk_mcu_system:boot_hreadyout , ahb_bootrom:u_ahb_bootloader:HREADYOUT 
 boot_hreadyout : cmsdk_mcu_system : input
Connects down to:cmsdk_ahb_slave_mux:u_ahb_slave_mux_sys_bus:HREADYOUT2 
Connects up to:cmsdk_mcu_chip:u_cmsdk_mcu_system:boot_hreadyout 
 boot_hresp : cmsdk_mcu_chip : wire
Connects down to:cmsdk_mcu_system:u_cmsdk_mcu_system:boot_hresp , ahb_bootrom:u_ahb_bootloader:HRESP 
 boot_hresp : cmsdk_mcu_system : input
Connects down to:cmsdk_ahb_slave_mux:u_ahb_slave_mux_sys_bus:HRESP2 
Connects up to:cmsdk_mcu_chip:u_cmsdk_mcu_system:boot_hresp 
 boot_hsel : cmsdk_mcu_addr_decode : output
Connects up to:cmsdk_mcu_system:u_addr_decode:boot_hsel 
 boot_hsel : cmsdk_mcu_chip : wire
Connects down to:cmsdk_mcu_system:u_cmsdk_mcu_system:boot_hsel , ahb_bootrom:u_ahb_bootloader:HSEL 
 boot_hsel : cmsdk_mcu_system : output
Connects down to:cmsdk_mcu_addr_decode:u_addr_decode:boot_hsel , cmsdk_ahb_slave_mux:u_ahb_slave_mux_sys_bus:HSEL2 
Connects up to:cmsdk_mcu_chip:u_cmsdk_mcu_system:boot_hsel 
 bus_request : cmsdk_ahb_master_mux : wire
 BYPASS : cm0_pmu_acg : input
Connects up to:cortexm0_pmu:u_hclk:CGBYPASS , cortexm0_pmu:u_dclk:CGBYPASS , cortexm0_pmu:u_fclk:CGBYPASS 
 byte_control : pl230_dma_data : wire
 byte_sel0 : pl230_dma_data : wire
 byte_sel1 : pl230_dma_data : wire
 byte_sel2 : pl230_dma_data : wire
 byte_sel3 : pl230_dma_data : wire
C
 can_pdw_dbg : cortexm0_pmu : wire
 can_pdw_sys : cortexm0_pmu : wire
 CDBGPWRUPACK : cmsdk_mcu_chip : wire
Connects down to:cortexm0_pmu:u_cortexm0_pmu:CDBGPWRUPACK , cmsdk_mcu_system:u_cmsdk_mcu_system:CDBGPWRUPACK 
 CDBGPWRUPACK : cmsdk_mcu_system : input
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:CDBGPWRUPACK 
Connects up to:cmsdk_mcu_chip:u_cmsdk_mcu_system:CDBGPWRUPACK 
 CDBGPWRUPACK : CORTEXM0INTEGRATION : input
Connects up to:cmsdk_mcu_system:u_cortex_m0_integration:CDBGPWRUPACK 
 CDBGPWRUPACK : cortexm0_pmu : output
Connects down to:cm0_pmu_cdc_send_reset:u_cdbgpwrupack:REGDO 
Connects up to:cmsdk_mcu_chip:u_cortexm0_pmu:CDBGPWRUPACK 
 CDBGPWRUPREQ : cmsdk_mcu_chip : wire
Connects down to:cortexm0_pmu:u_cortexm0_pmu:CDBGPWRUPREQ , cmsdk_mcu_system:u_cmsdk_mcu_system:CDBGPWRUPREQ 
 CDBGPWRUPREQ : cmsdk_mcu_system : output
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:CDBGPWRUPREQ 
Connects up to:cmsdk_mcu_chip:u_cmsdk_mcu_system:CDBGPWRUPREQ 
 CDBGPWRUPREQ : CORTEXM0INTEGRATION : output
Connects up to:cmsdk_mcu_system:u_cortex_m0_integration:CDBGPWRUPREQ 
 CDBGPWRUPREQ : cortexm0_pmu : input
Connects down to:cm0_pmu_sync_reset:u_dbg_pupreq_sync:SYNCDI 
Connects up to:cmsdk_mcu_chip:u_cortexm0_pmu:CDBGPWRUPREQ 
 cdbgpwrupreq_s : cortexm0_pmu : wire
Connects down to:cm0_pmu_sync_reset:u_dbg_pupreq_sync:SYNCDO 
 cdbg_pwrup_ack : CORTEXM0INTEGRATION : wire
Connects down to:CORTEXM0DAP:u_dap:CDBGPWRUPACK 
 cdbg_pwrup_req : CORTEXM0INTEGRATION : wire
Connects down to:CORTEXM0DAP:u_dap:CDBGPWRUPREQ 
 cfg_acg : cm0_pmu_acg : wire
 cfg_dbg : CORTEXM0INTEGRATION : wire
 cfg_present : cm0_dbg_reset_sync : wire
 cfg_wic : cortexm0_wic : wire
 cfg_wiclines : cortexm0_wic : wire
 CGBYPASS : cmsdk_mcu_clkctrl : input
Connects up to:cmsdk_mcu_chip:u_cmsdk_mcu_clkctrl:TESTMODE 
 CGBYPASS : cortexm0_pmu : input
Connects down to:cm0_pmu_acg:u_hclk:BYPASS , cm0_pmu_acg:u_dclk:BYPASS , cm0_pmu_acg:u_fclk:BYPASS 
Connects up to:cmsdk_mcu_chip:u_cortexm0_pmu:TESTMODE 
 ch : cmsdk_ft1248x1_adpio : integer
 channel_cfg : pl230_ahb_ctrl : reg
 channel_cfg_load : pl230_ahb_ctrl : wire
 channel_cfg_nxt : pl230_ahb_ctrl : wire
 channel_cfg_store : pl230_ahb_ctrl : wire
 char_received : cmsdk_uart_capture : wire
 chnl_ctrl_hprot3to1 : pl230_ahb_ctrl : input
Connects up to:pl230_udma:u_pl230_ahb_ctrl:chnl_ctrl_hprot3to1 
 chnl_ctrl_hprot3to1 : pl230_apb_regs : output
Connects up to:pl230_udma:u_pl230_apb_regs:chnl_ctrl_hprot3to1 
 chnl_ctrl_hprot3to1 : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:chnl_ctrl_hprot3to1 , pl230_ahb_ctrl:u_pl230_ahb_ctrl:chnl_ctrl_hprot3to1 
 chnl_enable_status : pl230_ahb_ctrl : input
Connects up to:pl230_udma:u_pl230_ahb_ctrl:chnl_enable_status 
 chnl_enable_status : pl230_apb_regs : output reg
Connects up to:pl230_udma:u_pl230_apb_regs:chnl_enable_status 
 chnl_enable_status : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:chnl_enable_status , pl230_ahb_ctrl:u_pl230_ahb_ctrl:chnl_enable_status 
 chnl_enable_status_nxt : pl230_apb_regs : reg
 chnl_enable_status_wen : pl230_apb_regs : wire
 chnl_priority_status : pl230_ahb_ctrl : input
Connects up to:pl230_udma:u_pl230_ahb_ctrl:chnl_priority_status 
 chnl_priority_status : pl230_apb_regs : output reg
Connects up to:pl230_udma:u_pl230_apb_regs:chnl_priority_status 
 chnl_priority_status : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:chnl_priority_status , pl230_ahb_ctrl:u_pl230_ahb_ctrl:chnl_priority_status 
 chnl_priority_status_nxt : pl230_apb_regs : wire
 chnl_priority_status_wen : pl230_apb_regs : wire
 chnl_pri_alt_status : pl230_ahb_ctrl : input
Connects up to:pl230_udma:u_pl230_ahb_ctrl:chnl_pri_alt_status 
 chnl_pri_alt_status : pl230_apb_regs : output reg
Connects up to:pl230_udma:u_pl230_apb_regs:chnl_pri_alt_status 
 chnl_pri_alt_status : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:chnl_pri_alt_status , pl230_ahb_ctrl:u_pl230_ahb_ctrl:chnl_pri_alt_status 
 chnl_pri_alt_status_nxt : pl230_apb_regs : reg
 chnl_pri_alt_status_wen : pl230_apb_regs : wire
 chnl_req_mask_status : pl230_ahb_ctrl : input
Connects up to:pl230_udma:u_pl230_ahb_ctrl:chnl_req_mask_status 
 chnl_req_mask_status : pl230_apb_regs : output reg
Connects up to:pl230_udma:u_pl230_apb_regs:chnl_req_mask_status 
 chnl_req_mask_status : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:chnl_req_mask_status , pl230_ahb_ctrl:u_pl230_ahb_ctrl:chnl_req_mask_status 
 chnl_req_mask_status_nxt : pl230_apb_regs : wire
 chnl_req_mask_status_wen : pl230_apb_regs : wire
 chnl_req_wait : pl230_ahb_ctrl : reg
 chnl_sw_request : pl230_ahb_ctrl : input
Connects up to:pl230_udma:u_pl230_ahb_ctrl:chnl_sw_request 
 chnl_sw_request : pl230_apb_regs : output reg
Connects up to:pl230_udma:u_pl230_apb_regs:chnl_sw_request 
 chnl_sw_request : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:chnl_sw_request , pl230_ahb_ctrl:u_pl230_ahb_ctrl:chnl_sw_request 
 chnl_sw_request_nxt : pl230_apb_regs : wire
 chnl_sw_request_wen : pl230_apb_regs : wire
 chnl_useburst_status : pl230_ahb_ctrl : input
Connects up to:pl230_udma:u_pl230_ahb_ctrl:chnl_useburst_status 
 chnl_useburst_status : pl230_apb_regs : output reg
Connects up to:pl230_udma:u_pl230_apb_regs:chnl_useburst_status 
 chnl_useburst_status : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:chnl_useburst_status , pl230_ahb_ctrl:u_pl230_ahb_ctrl:chnl_useburst_status 
 chnl_useburst_status_nxt : pl230_apb_regs : reg
 chnl_useburst_status_wen : pl230_apb_regs : wire
 cid0_en : cmsdk_ahb_cs_rom_table : wire
 cid1_en : cmsdk_ahb_cs_rom_table : wire
 cid2_en : cmsdk_ahb_cs_rom_table : wire
 cid3_en : cmsdk_ahb_cs_rom_table : wire
 CLK : bootrom : input (used in @posedge)
Connects up to:ahb_bootrom:u_bootrom:HCLK 
 CLK : cm0_dbg_reset_sync : input (used in @posedge)
Connects up to:CORTEXM0INTEGRATION:u_dpreset_sync:SWCLKTCK 
 CLK : cm0_rst_send_set : input (used in @posedge)
Connects up to:cortexm0_rst_ctl:u_hreset_req:FCLK , cortexm0_rst_ctl:u_dbgreset_req:FCLK 
 CLK : cm0_rst_sync : input (used in @posedge)
Connects up to:cortexm0_rst_ctl:u_dbgresetn_sync:DCLK , cortexm0_rst_ctl:u_poresetn_sync:FCLK , cortexm0_rst_ctl:u_hresetn_sync:HCLK 
 CLK : cmsdk_clkreset : output
Connects up to:tb_cmsdk_mcu:u_cmsdk_clkreset:XTAL1 
 CLK : cmsdk_debug_tester : input (used in @posedge)
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_int:FCLK , CORTEXM0INTEGRATION:u_cortex_m0_int:SCLK , CORTEXM0INTEGRATION:u_cortex_m0_int:HCLK , CORTEXM0INTEGRATION:u_cortex_m0_int:DCLK , cmsdk_ahb_rom:u_rom:HCLK , cmsdk_ahb_ram:u_ram:HCLK , cmsdk_debug_tester_ahb_interconnect:u_ahb_interconnect:HCLK , cmsdk_ahb_default_slave:u_ahb_def_slv:HCLK , cmsdk_ahb_gpio:u_gpio_0:HCLK , cmsdk_ahb_gpio:u_gpio_0:FCLK , cmsdk_ahb_gpio:u_gpio_1:HCLK , cmsdk_ahb_gpio:u_gpio_1:FCLK 
Connects up to:tb_cmsdk_mcu:u_cmsdk_debug_tester:XTAL1 
 clk : cmsdk_mcu_clkctrl : wire (used in @posedge)
 CLK : cmsdk_uart_capture : input (used in @posedge)
Connects up to:tb_cmsdk_mcu:u_cmsdk_uart_capture1:ft_clk2uart , tb_cmsdk_mcu:u_cmsdk_uart_capture2:ft_clk2uart , tb_cmsdk_mcu:u_cmsdk_uart_capture:uart_clk 
 CLKIN : cm0_pmu_acg : input
Connects up to:cortexm0_pmu:u_hclk:FCLK , cortexm0_pmu:u_dclk:FCLK , cortexm0_pmu:u_fclk:FCLK 
 CLKOUT : cm0_pmu_acg : output
Connects up to:cortexm0_pmu:u_dclk:DCLK , cortexm0_pmu:u_hclk:HCLK , cortexm0_pmu:u_fclk:SCLK 
 clk_ctrl_sys_reset_req : cmsdk_mcu_chip : wire
Connects down to:cmsdk_mcu_clkctrl:u_cmsdk_mcu_clkctrl:SYSRESETREQ 
 clk_en : cm0_pmu_acg : reg
 clk_en_nxt : cm0_pmu_acg : wire
 clk_out : cm0_pmu_acg : wire
 clock_q : cmsdk_clkreset : reg
 clr_sleepholdreq : cortexm0_pmu : wire
 clr_useburst : pl230_ahb_ctrl : output
Connects up to:pl230_udma:u_pl230_ahb_ctrl:clr_useburst 
 clr_useburst : pl230_apb_regs : input
Connects up to:pl230_udma:u_pl230_apb_regs:clr_useburst 
 clr_useburst : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:clr_useburst , pl230_ahb_ctrl:u_pl230_ahb_ctrl:clr_useburst 
 clr_wicreq : cortexm0_pmu : wire
 cm0_haddr : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HADDR 
 cm0_hburst : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HBURST 
 cm0_hmaster : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HMASTER 
 cm0_hmastlock : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HMASTLOCK 
 cm0_hprot : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HPROT 
 cm0_hrdata : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HRDATA 
 cm0_hready : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HREADY 
 cm0_hresp : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HRESP 
 cm0_hsize : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HSIZE 
 cm0_htrans : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HTRANS 
 cm0_hwdata : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HWDATA 
 cm0_hwrite : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:HWRITE 
 cmsdk_SYSRESETREQ : cmsdk_mcu_chip : wire
Connects down to:cortexm0_pmu:u_cortexm0_pmu:HRESETREQ , cortexm0_rst_ctl:u_rst_ctl:SYSRESETREQ 
 cm_haddr : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HADDRS0 
 cm_hburst : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HBURSTS0 
 cm_hmaster : cmsdk_mcu_system : wire
 cm_hmastlock : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HMASTLOCKS0 
 cm_hprot : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HPROTS0 
 cm_hrdata : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HRDATAS0 
 cm_hready : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HREADYS0 
 cm_hreadyout : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HREADYOUTS0 
 cm_hresp : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HRESPS0 
 cm_hsize : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HSIZES0 
 cm_htrans : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HTRANSS0 
 cm_hwdata : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HWDATAS0 
 cm_hwrite : cmsdk_mcu_system : wire
Connects down to:cmsdk_ahb_master_mux:u_ahb_master_mux:HWRITES0 
 CODEHINTDE : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:CODEHINTDE 
 CODEHINTDE : CORTEXM0INTEGRATION : output
Connects down to:CORTEXM0:u_cortexm0:CODEHINTDE 
Connects up to:cmsdk_mcu_system:u_cortex_m0_integration:CODEHINTDE 
 CODENSEQ : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:CODENSEQ 
 CODENSEQ : CORTEXM0INTEGRATION : output
Connects down to:CORTEXM0:u_cortexm0:CODENSEQ 
Connects up to:cmsdk_mcu_system:u_cortex_m0_integration:CODENSEQ 
 COMBINT : cmsdk_ahb_gpio : output
Connects down to:cmsdk_iop_gpio:u_iop_gpio:COMBINT 
Connects up to:cmsdk_mcu_system:u_ahb_gpio_0:gpio0_combintr , cmsdk_mcu_system:u_ahb_gpio_1:gpio1_combintr 
 COMBINT : cmsdk_iop_gpio : output
Connects up to:cmsdk_ahb_gpio:u_iop_gpio:COMBINT 
 comb_rst_n : cm0_rst_sync : wire (used in @negedge)
 comio_rx_data8 : cmsdk_mcu_chip : wire
Connects down to:ADPcontrol_v1_0:u_ADP:com_rx_tdata , ft1248_streamio_v1_0:u_ftdio_com:txd_tdata 
 comio_rx_ready : cmsdk_mcu_chip : wire
Connects down to:ADPcontrol_v1_0:u_ADP:com_rx_tready , ft1248_streamio_v1_0:u_ftdio_com:txd_tready 
 comio_rx_valid : cmsdk_mcu_chip : wire
Connects down to:ADPcontrol_v1_0:u_ADP:com_rx_tvalid , ft1248_streamio_v1_0:u_ftdio_com:txd_tvalid 
 comio_tx_data8 : cmsdk_mcu_chip : wire
Connects down to:ADPcontrol_v1_0:u_ADP:com_tx_tdata , ft1248_streamio_v1_0:u_ftdio_com:rxd_tdata 
 comio_tx_ready : cmsdk_mcu_chip : wire
Connects down to:ADPcontrol_v1_0:u_ADP:com_tx_tready , ft1248_streamio_v1_0:u_ftdio_com:rxd_tready 
 comio_tx_valid : cmsdk_mcu_chip : wire
Connects down to:ADPcontrol_v1_0:u_ADP:com_tx_tvalid , ft1248_streamio_v1_0:u_ftdio_com:rxd_tvalid 
 counter_decrement : pl230_ahb_ctrl : wire
 ctrl_base_ptr : pl230_ahb_ctrl : input
Connects up to:pl230_udma:u_pl230_ahb_ctrl:ctrl_base_ptr 
 ctrl_base_ptr : pl230_apb_regs : output reg
Connects up to:pl230_udma:u_pl230_apb_regs:ctrl_base_ptr 
 ctrl_base_ptr : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:ctrl_base_ptr , pl230_ahb_ctrl:u_pl230_ahb_ctrl:ctrl_base_ptr 
 ctrl_base_ptr_nxt : pl230_apb_regs : wire
 ctrl_base_ptr_wen : pl230_apb_regs : wire
 ctrl_dat_addr : pl230_ahb_ctrl : wire
 ctrl_dat_sel : pl230_ahb_ctrl : reg
 ctrl_offset : pl230_ahb_ctrl : reg
 ctrl_state : pl230_ahb_ctrl : output reg
Connects up to:pl230_udma:u_pl230_ahb_ctrl:ctrl_state 
 ctrl_state : pl230_apb_regs : input
Connects up to:pl230_udma:u_pl230_apb_regs:ctrl_state 
 ctrl_state : pl230_udma : wire
Connects down to:pl230_apb_regs:u_pl230_apb_regs:ctrl_state , pl230_ahb_ctrl:u_pl230_ahb_ctrl:ctrl_state 
 ctrl_state_nxt : pl230_ahb_ctrl : reg
 current_chnl_en : pl230_ahb_ctrl : wire
 current_chnl_onehot : pl230_ahb_ctrl : wire
 current_chnl_valid : pl230_ahb_ctrl : reg
 current_chnl_valid_nxt : pl230_ahb_ctrl : wire
 current_dout_padded : cmsdk_iop_gpio : wire
 current_slave_err : pl230_ahb_ctrl : reg
 current_slave_err_en : pl230_ahb_ctrl : wire
 current_slave_err_nxt : pl230_ahb_ctrl : wire
 cycle_ctrl : pl230_ahb_ctrl : wire
 cycle_ctrl_override : pl230_ahb_ctrl : wire
 cycle_ctrl_writeback : pl230_ahb_ctrl : wire
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