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Signals index

R
 r : pl230_ahb_ctrl : wire
 RDATA : bootrom : output reg
Connects up to:ahb_bootrom:u_bootrom:HRDATA 
 rdata : cmsdk_ahb_cs_rom_table : wire
 read_enable : cmsdk_apb_uart_streamio : wire
 read_mux : cmsdk_iop_gpio : reg
 read_mux : cmsdk_mcu_sysctrl : reg
 read_mux_byte0 : cmsdk_apb_uart_streamio : reg
 read_mux_byte0_reg : cmsdk_apb_uart_streamio : reg
 read_mux_le : cmsdk_iop_gpio : reg
 read_mux_le : cmsdk_mcu_sysctrl : reg
 read_mux_word : cmsdk_apb_uart_streamio : wire
 REGCLK : cm0_pmu_cdc_send_reset : input (used in @posedge)
Connects up to:cortexm0_pmu:u_sysisolaten:FCLK , cortexm0_pmu:u_sysretainn:FCLK , cortexm0_pmu:u_syspwrdown:FCLK , cortexm0_pmu:u_dbgisolaten:FCLK , cortexm0_pmu:u_cdbgpwrupack:FCLK 
 REGCLK : cm0_pmu_cdc_send_set : input (used in @posedge)
Connects up to:cortexm0_pmu:u_dbgpwrdown:FCLK 
 REGDI : cm0_pmu_cdc_send_reset : input
Connects up to:cortexm0_pmu:u_cdbgpwrupack:nxt_cdbgpwrupack , cortexm0_pmu:u_dbgisolaten:nxt_dbg_iso , cortexm0_pmu:u_sysisolaten:nxt_sys_iso , cortexm0_pmu:u_syspwrdown:nxt_sys_pdn , cortexm0_pmu:u_sysretainn:nxt_sys_rtn 
 REGDI : cm0_pmu_cdc_send_set : input
Connects up to:cortexm0_pmu:u_dbgpwrdown:nxt_dbg_pdn 
 REGDO : cm0_pmu_cdc_send_reset : output
Connects up to:cortexm0_pmu:u_cdbgpwrupack:CDBGPWRUPACK , cortexm0_pmu:u_dbgisolaten:DBGISOLATEn , cortexm0_pmu:u_sysisolaten:SYSISOLATEn , cortexm0_pmu:u_syspwrdown:SYSPWRDOWN , cortexm0_pmu:u_sysretainn:SYSRETAINn 
 REGDO : cm0_pmu_cdc_send_set : output
Connects up to:cortexm0_pmu:u_dbgpwrdown:DBGPWRDOWN 
 REGEN : cm0_pmu_cdc_send_reset : input
Connects up to:cortexm0_pmu:u_cdbgpwrupack:up_cdbgpwrupack , cortexm0_pmu:u_dbgisolaten:up_dbg_iso , cortexm0_pmu:u_sysisolaten:up_sys_iso , cortexm0_pmu:u_syspwrdown:up_sys_pdn , cortexm0_pmu:u_sysretainn:up_sys_rtn 
 REGEN : cm0_pmu_cdc_send_set : input
Connects up to:cortexm0_pmu:u_dbgpwrdown:up_dbg_pdn 
 REGRESETn : cm0_pmu_cdc_send_reset : input (used in @negedge)
Connects up to:cortexm0_pmu:u_sysisolaten:PORESETn , cortexm0_pmu:u_sysretainn:PORESETn , cortexm0_pmu:u_syspwrdown:PORESETn , cortexm0_pmu:u_dbgisolaten:PORESETn , cortexm0_pmu:u_cdbgpwrupack:PORESETn 
 REGSETn : cm0_pmu_cdc_send_set : input (used in @negedge)
Connects up to:cortexm0_pmu:u_dbgpwrdown:PORESETn 
 reg_addr : cmsdk_mcu_sysctrl : reg
 reg_altfunc : cmsdk_iop_gpio : wire
 reg_altfuncclr : cmsdk_iop_gpio : wire
 reg_altfuncset : cmsdk_iop_gpio : wire
 reg_altfunc_padded : cmsdk_iop_gpio : reg
 reg_aux_ctrl : cmsdk_uart_capture : reg
 reg_aux_ctrl_mode : cmsdk_uart_capture : reg
 reg_baud_cntr_f : cmsdk_apb_uart_streamio : reg
 reg_baud_cntr_i : cmsdk_apb_uart_streamio : reg
 reg_baud_div : cmsdk_apb_uart_streamio : reg
 reg_baud_tick : cmsdk_apb_uart_streamio : reg
 reg_be_swap_ctrl : cmsdk_apb_subsystem : reg
 reg_be_swap_ctrl_en : cmsdk_apb_subsystem : wire
 reg_byte_strobe : cmsdk_mcu_sysctrl : reg
 reg_clk_divider : cmsdk_mcu_stclkctrl : reg
 reg_clk_div_min1 : cmsdk_mcu_stclkctrl : wire
 reg_ctrl : cmsdk_apb_uart_streamio : reg
 reg_datain : cmsdk_iop_gpio : wire
 reg_datain32 : cmsdk_iop_gpio : wire
 reg_dbgtester_enable : cmsdk_uart_capture : reg
 reg_dout : cmsdk_iop_gpio : wire
 reg_douten : cmsdk_iop_gpio : wire
 reg_doutenclr : cmsdk_iop_gpio : wire
 reg_doutenset : cmsdk_iop_gpio : wire
 reg_douten_padded : cmsdk_iop_gpio : reg
 reg_dout_masked_write0 : cmsdk_iop_gpio : wire
 reg_dout_masked_write1 : cmsdk_iop_gpio : wire
 reg_dout_normal_write0 : cmsdk_iop_gpio : wire
 reg_dout_normal_write1 : cmsdk_iop_gpio : wire
 reg_dout_padded : cmsdk_iop_gpio : reg
 reg_end_simulation : cmsdk_debug_tester : reg
 reg_end_simulation : cmsdk_uart_capture : reg
 reg_esc_code_mode : cmsdk_uart_capture : reg
 reg_fixed_length_burst : cmsdk_ahb_master_mux : reg
 reg_fixed_length_burst_err : cmsdk_ahb_master_mux : reg
 reg_hsel : cmsdk_ahb_slave_mux : reg
 reg_hsize : cmsdk_mcu_sysctrl : reg
 reg_idle_flag : cmsdk_ahb_master_mux : reg
 reg_intclr_normal_write0 : cmsdk_iop_gpio : wire
 reg_intclr_normal_write1 : cmsdk_iop_gpio : wire
 reg_intclr_padded : cmsdk_iop_gpio : wire
 reg_inten : cmsdk_iop_gpio : wire
 reg_intenclr : cmsdk_iop_gpio : wire
 reg_intenset : cmsdk_iop_gpio : wire
 reg_inten_padded : cmsdk_iop_gpio : reg
 reg_intpol : cmsdk_iop_gpio : wire
 reg_intpolclr : cmsdk_iop_gpio : wire
 reg_intpolset : cmsdk_iop_gpio : wire
 reg_intpol_padded : cmsdk_iop_gpio : reg
 reg_intstat : cmsdk_iop_gpio : wire
 reg_intstat_padded : cmsdk_iop_gpio : reg
 reg_inttype : cmsdk_iop_gpio : wire
 reg_inttypeclr : cmsdk_iop_gpio : wire
 reg_inttypeset : cmsdk_iop_gpio : wire
 reg_inttype_padded : cmsdk_iop_gpio : reg
 reg_in_sync1 : cmsdk_iop_gpio : reg
 reg_in_sync2 : cmsdk_iop_gpio : reg
 reg_last_datain : cmsdk_iop_gpio : reg
 reg_lockupreset : cmsdk_mcu_sysctrl : reg
 reg_lockupreset_write : cmsdk_mcu_sysctrl : wire
 reg_pmuenable : cmsdk_mcu_sysctrl : reg
 reg_pmuenable_write : cmsdk_mcu_sysctrl : wire
 reg_rdata_cfg : cmsdk_ahb_to_apb : wire
 reg_read_enable : cmsdk_mcu_sysctrl : reg
 reg_remap : cmsdk_mcu_sysctrl : reg
 reg_remap_write : cmsdk_mcu_sysctrl : wire
 reg_resetinfo : cmsdk_mcu_sysctrl : reg
 reg_resetinfo_en : cmsdk_mcu_sysctrl : wire
 reg_resetinfo_write : cmsdk_mcu_sysctrl : wire
 reg_round_robin_state : cmsdk_ahb_master_mux : reg
 reg_rxintr : cmsdk_apb_uart_streamio : reg
 reg_rx_buf : cmsdk_apb_uart_streamio : reg
 reg_rx_overrun : cmsdk_apb_uart_streamio : reg
 reg_stclken : cmsdk_mcu_stclkctrl : reg
 reg_txd : cmsdk_apb_uart_streamio : reg
 reg_txintr : cmsdk_apb_uart_streamio : reg
 reg_tx_buf : cmsdk_apb_uart_streamio : reg
 reg_tx_overrun : cmsdk_apb_uart_streamio : reg
 reg_wdata_cfg : cmsdk_ahb_to_apb : wire
 reg_write_enable : cmsdk_mcu_sysctrl : reg
 reload_f : cmsdk_apb_uart_streamio : wire
 reload_i : cmsdk_apb_uart_streamio : wire
 REMAP : cmsdk_mcu_sysctrl : output
Connects up to:cmsdk_mcu_system:u_cmsdk_mcu_sysctrl:remap_ctrl 
 remap_ctrl : cmsdk_mcu_addr_decode : input
Connects up to:cmsdk_mcu_system:u_addr_decode:remap_ctrl 
 remap_ctrl : cmsdk_mcu_system : wire
Connects down to:cmsdk_mcu_addr_decode:u_addr_decode:remap_ctrl , cmsdk_mcu_sysctrl:u_cmsdk_mcu_sysctrl:REMAP 
 request : pl230_ahb_ctrl : reg
 req_delay : pl230_ahb_ctrl : reg
 req_delay_nxt : pl230_ahb_ctrl : wire
 req_wait : pl230_ahb_ctrl : wire
 RESETn : cmsdk_uart_capture : input (used in @negedge)
Connects up to:tb_cmsdk_mcu:u_cmsdk_uart_capture:NRST , tb_cmsdk_mcu:u_cmsdk_uart_capture1:NRST , tb_cmsdk_mcu:u_cmsdk_uart_capture2:NRST 
 reset_n : cmsdk_mcu_clkctrl : wire (used in @negedge)
 reset_n_q : cmsdk_clkreset : reg
 reset_sync_reg : cmsdk_mcu_clkctrl : reg
 resp_state : cmsdk_ahb_default_slave : reg
 rise_edge_int : cmsdk_iop_gpio : wire
 RSTBYPASS : cm0_dbg_reset_sync : input
Connects up to:CORTEXM0INTEGRATION:u_dpreset_sync:RSTBYPASS 
 RSTBYPASS : cm0_rst_sync : input
Connects up to:cortexm0_rst_ctl:u_poresetn_sync:RSTBYPASS , cortexm0_rst_ctl:u_hresetn_sync:RSTBYPASS , cortexm0_rst_ctl:u_dbgresetn_sync:RSTBYPASS 
 RSTBYPASS : cmsdk_mcu_clkctrl : input
Connects up to:cmsdk_mcu_chip:u_cmsdk_mcu_clkctrl:TESTMODE 
 RSTBYPASS : cmsdk_mcu_system : input
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:RSTBYPASS 
Connects up to:cmsdk_mcu_chip:u_cmsdk_mcu_system:TESTMODE 
 RSTBYPASS : CORTEXM0INTEGRATION : input
Connects down to:cm0_dbg_reset_sync:u_dpreset_sync:RSTBYPASS 
Connects up to:cmsdk_mcu_system:u_cortex_m0_integration:RSTBYPASS 
 RSTBYPASS : cortexm0_rst_ctl : input
Connects down to:cm0_rst_sync:u_poresetn_sync:RSTBYPASS , cm0_rst_sync:u_hresetn_sync:RSTBYPASS , cm0_rst_sync:u_dbgresetn_sync:RSTBYPASS 
 RSTIN : cm0_dbg_reset_sync : input (used in @negedge)
Connects up to:CORTEXM0INTEGRATION:u_dpreset_sync:PORESETn 
 RSTINn : cm0_rst_sync : input
Connects up to:cortexm0_rst_ctl:u_poresetn_sync:GLOBALRESETn , cortexm0_rst_ctl:u_hresetn_sync:GLOBALRESETn , cortexm0_rst_ctl:u_dbgresetn_sync:GLOBALRESETn 
 RSTn : cm0_rst_send_set : input (used in @negedge)
Connects up to:cortexm0_rst_ctl:u_hreset_req:PORESETn , cortexm0_rst_ctl:u_dbgreset_req:PORESETn 
 RSTOUT : cm0_dbg_reset_sync : output
Connects up to:CORTEXM0INTEGRATION:u_dpreset_sync:dp_reset_n 
 RSTOUTn : cm0_rst_sync : output
Connects up to:cortexm0_rst_ctl:u_dbgresetn_sync:DBGRESETn , cortexm0_rst_ctl:u_hresetn_sync:HRESETn , cortexm0_rst_ctl:u_poresetn_sync:PORESETn 
 RSTREQ : cm0_rst_sync : input
Connects up to:cortexm0_rst_ctl:u_hresetn_sync:HRESETREQ , cortexm0_rst_ctl:u_dbgresetn_sync:dbg_reset_req_sync 
 RSTREQIN : cm0_rst_send_set : input
Connects up to:cortexm0_rst_ctl:u_dbgreset_req:PMUDBGRESETREQ , cortexm0_rst_ctl:u_hreset_req:h_reset_req_in 
 RSTREQOUT : cm0_rst_send_set : output
Connects up to:cortexm0_rst_ctl:u_hreset_req:HRESETREQ , cortexm0_rst_ctl:u_dbgreset_req:dbg_reset_req_sync 
 rst_sync0 : cm0_dbg_reset_sync : reg
 rst_sync0_n : cm0_rst_sync : reg
 rst_sync1 : cm0_dbg_reset_sync : reg
 rst_sync1_n : cm0_rst_sync : reg
 rst_sync2 : cm0_dbg_reset_sync : reg
 rst_sync2_n : cm0_rst_sync : reg
 rwdata_reg : cmsdk_ahb_to_apb : reg
 rxbuf_sample : cmsdk_apb_uart_streamio : wire
 RXD : cmsdk_apb_uart_streamio : input
 RXD : cmsdk_uart_capture : input
Connects up to:tb_cmsdk_mcu:u_cmsdk_uart_capture:UARTXD , tb_cmsdk_mcu:u_cmsdk_uart_capture1:ft_rxd2uart , tb_cmsdk_mcu:u_cmsdk_uart_capture2:ft_txd2uart 
 rxd_lpf : cmsdk_apb_uart_streamio : reg
 rxd_sync_1 : cmsdk_apb_uart_streamio : reg
 rxd_sync_2 : cmsdk_apb_uart_streamio : reg
 RXEV : cmsdk_mcu_system : wire
Connects down to:CORTEXM0INTEGRATION:u_cortex_m0_integration:RXEV 
 RXEV : CORTEXM0INTEGRATION : input
Connects up to:cmsdk_mcu_system:u_cortex_m0_integration:RXEV 
 rxev_pend : CORTEXM0INTEGRATION : wire
Connects down to:CORTEXM0:u_cortexm0:RXEV 
 RXINT : cmsdk_apb_uart_streamio : output
 RXOVRINT : cmsdk_apb_uart_streamio : output
 rx_buf_full : cmsdk_apb_uart_streamio : reg
 RX_DATA8_i : cmsdk_apb_uart_streamio : input
Connects up to:cmsdk_mcu_chip:u_apb_uart_com:stdio_tx_data8 
 rx_data_read : cmsdk_apb_uart_streamio : wire
 rx_overflow_intr : cmsdk_apb_uart_streamio : wire
 rx_overrun : cmsdk_apb_uart_streamio : wire
 RX_READY_o : cmsdk_apb_uart_streamio : output
Connects up to:cmsdk_mcu_chip:u_apb_uart_com:stdio_tx_ready 
 rx_shift_buf : cmsdk_apb_uart_streamio : reg
 rx_shift_in : cmsdk_apb_uart_streamio : wire
 rx_shift_reg : cmsdk_uart_capture : reg
 rx_state : cmsdk_apb_uart_streamio : reg
 rx_state_inc : cmsdk_apb_uart_streamio : wire
 rx_state_update : cmsdk_apb_uart_streamio : wire
 rx_tick_cnt : cmsdk_apb_uart_streamio : reg
 RX_VALID_i : cmsdk_apb_uart_streamio : input
Connects up to:cmsdk_mcu_chip:u_apb_uart_com:stdio_tx_valid 
 r_override : pl230_ahb_ctrl : wire
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