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//-----------------------------------------------------------------------------
// The confidential and proprietary information contained in this file may
// only be used by a person authorised under and to the extent permitted
// by a subsisting licensing agreement from Arm Limited or its affiliates.
//
//            (C) COPYRIGHT 2010-2013 Arm Limited or its affiliates.
//                ALL RIGHTS RESERVED
//
// This entire notice must be reproduced on all copies of this file
// and copies of this file may only be made by a person if such person is
// permitted to do so under the terms of a subsisting license agreement
// from Arm Limited or its affiliates.
//
//      SVN Information
//
//      Checked In          : $Date: 2017-10-10 15:55:38 +0100 (Tue, 10 Oct 2017) $
//
//      Revision            : $Revision: 371321 $
//
//      Release Information : Cortex-M System Design Kit-r1p1-00rel0
//
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// Abstract : Memory model definitions
//-----------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Memory types
//------------------------------------------------------------------------------
// Constants for ROM types - Match to cmsdk_ahb_rom.v
  //  0) AHB_ROM_NONE             - memory not present
  //  1) AHB_ROM_BEH_MODEL        - behavioral ROM memory
  //  2) AHB_ROM_FPGA_SRAM_MODEL  - behavioral FPGA SRAM model with SRAM wrapper
  //  3) AHB_ROM_FLASH32_MODEL    - behavioral 32-bit flash memory
  //  4) AHB_ROM_FLASH16_MODEL    - behavioral 16-bit flash memory

`define AHB_ROM_NONE             0
`define AHB_ROM_BEH_MODEL        1
`define AHB_ROM_FPGA_SRAM_MODEL  2
`define AHB_ROM_FLASH32_MODEL    3
`define AHB_ROM_FLASH16_MODEL    4


// Constants for RAM types - Match to cmsdk_ahb_ram.v
  //  0) AHB_RAM_NONE             - memory not present
  //  1) AHB_RAM_BEH_MODEL        - behavioral RAM memory
  //  2) AHB_RAM_FPGA_SRAM_MODEL  - behavioral SRAM model with SRAM wrapper
  //  3) AHB_RAM_EXT_SRAM16_MODEL - for benchmarking using 16-bit external asynchronous SRAM
  //  4) AHB_RAM_EXT_SRAM8_MODEL - for benchmarking using 8-bit external asynchronous SRAM

`define AHB_RAM_NONE             0
`define AHB_RAM_BEH_MODEL        1
`define AHB_RAM_FPGA_SRAM_MODEL  2
`define AHB_RAM_EXT_SRAM16_MODEL 3
`define AHB_RAM_EXT_SRAM8_MODEL  4

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This page: Created:Wed Nov 24 14:08:44 2021
From: ../../../../../../arm-AAA-ip/Corstone-101_Foundation_IP/BP210-BU-00000-r1p1-00rel0/logical/models/memories/cmsdk_ahb_memory_models_defs.v

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