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    .HREADYOUT        (sram_hreadyout), // Outputs
    .HRDATA           (sram_hrdata),
    .HRESP            (sram_hresp)
  );

//----------------------------------------
// MTB SRAM Memory
//----------------------------------------
`ifdef CORTEX_M0PLUS
`ifdef ARM_CMSDK_INCLUDE_MTB

  cm0p_ik_sram
   #(.MEMNAME         ("MTB SRAM"),
     .DATAWIDTH       (32),
     .ADDRWIDTH       (AWIDTH-2),
     .MEMBASE         (BASEADDR_MTBSRAM))
    u_mtbram
    (//Output
     .RDATA           (RAMRD),
     //Inputs
     .CLK             (RAMHCLK),
     .ADDRESS         (RAMAD[AWIDTH-3:0]),
     .CS              (RAMCS),
     .WE              (RAMWE),
     .WDATA           (RAMWD));

`endif
`endif

//----------------------------------------
// I/O port pin muxing and tristate
//----------------------------------------

  assign        i_swclktck    =  swdclk_in;
  assign        i_swditms     =  swdio_in;
  assign        swdio_out     =  i_swdo;
  assign        swdio_out_en  =  i_swdoen;
  assign        swdio_out_nen = !i_swdoen;

  cmsdk_mcu_pin_mux
    u_pin_mux (
    // UART
    .uart0_rxd        (uart0_rxd),
    .uart0_txd        (uart0_txd),
    .uart0_txen       (uart0_txen),
    .uart1_rxd        (uart1_rxd),
    .uart1_txd        (uart1_txd),
    .uart1_txen       (uart1_txen),
    .uart2_rxd        (uart2_rxd),
    .uart2_txd        (uart2_txd),
    .uart2_txen       (uart2_txen),

    // Timer
    .timer0_extin     (timer0_extin),
    .timer1_extin     (timer1_extin),

`ifdef CORTEX_M0PLUS
`ifdef ARM_CMSDK_INCLUDE_MTB
    // MTB CONTROL
    .TSTART           (TSTART),
    .TSTOP            (TSTOP),
`endif
`endif

    // IO Ports
    .p0_in            ( ), // was (p0_in) now from pad inputs),
    .p0_out           (p0_out),
    .p0_outen         (p0_out_en),
    .p0_altfunc       (p0_altfunc),

    .p1_in            ( ), // was(p1_in) now from pad inputs),
    .p1_out           (p1_out),
    .p1_outen         (p1_out_en),
    .p1_altfunc       (p1_altfunc),

    // Debug
    .i_trst_n         (i_trst_n),
    .i_swditms        ( ), //i_swditms),
    .i_swclktck       ( ), //i_swclktck),
    .i_tdi            (i_tdi),
    .i_tdo            (i_tdo),
    .i_tdoen_n        (i_tdoen_n),
    .i_swdo           (i_swdo),
    .i_swdoen         (i_swdoen),

    // IO pads
    .p1_out_mux       (p1_out_mux),
    .p1_out_en_mux    (p1_out_en_mux),
    .P0               ( ), //P0),
    .P1               ( ), //P1),

    .nTRST            (nTRST),  // Not needed if serial-wire debug is used
    .TDI              (TDI),    // Not needed if serial-wire debug is used
    .SWDIOTMS         ( ), //SWDIOTMS),
    .SWCLKTCK         ( ), //SWCLKTCK),
    .TDO              (TDO)     // Not needed if serial-wire debug is used

  );

endmodule




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From: ../verilog/cmsdk_mcu_chip.v

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