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@@ -22,6 +22,8 @@ Maintaining and validating all of this is extremely time consuming and error-pro
 
 TODO add figure
 
+![vgen](https://github.com/whatmough/CHIPKIT/blob/master/tools/vgen/vgen%20(1).pdf "VGEN")
+
 Fig.~\ref{fig:vgen} gives an outline of the VGEN flow, which operates in two stages.
 The first step is to update a CSR database with signals from the design, which can be done periodically as the RTL is developed.  
 The VGEN tool automatically updates the database (\texttt{vgen -update}) by parsing RTL modules to find signal names with a matching prefix or postfix that indicates a CSR should be attached to the signal.