From 904f72a3cad99f56c5f04061f50607c0333f5bac Mon Sep 17 00:00:00 2001
From: whatmough <pwhatmough@seas.harvard.edu>
Date: Sun, 24 May 2020 12:17:08 -0400
Subject: [PATCH] Update README.md

---
 tools/rtl-coding/README.md | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/rtl-coding/README.md b/tools/rtl-coding/README.md
index 7d4a356..f6f76bd 100644
--- a/tools/rtl-coding/README.md
+++ b/tools/rtl-coding/README.md
@@ -32,7 +32,7 @@ The vast majority of RTL modules do not require more than one clock and reset.
 Any logic that *requires* multiple clocks should be careful contained in a special module.
 
 * **Use the `logic` type exclusively.**
-Replaces both the older \texttt{wire} and (very confusing) \texttt{reg} types.
+Replaces both the older `wire` and (very confusing) `reg` types.
 Provides compile-time checking for multiple drivers.
 
 * **Use the `always_comb` keyword for logic.**
@@ -191,6 +191,7 @@ endmodule  // my_module
 
 ### Tutorial Material
 
+* [CHIPKIT IEEE Micro paper](https://ieeexplore.ieee.org/document/9096507)
 * [Migrating from AHB to AXI based SoC Designs](https://www.doulos.com/knowhow/arm/Migrating_from_AHB_to_AXI/)
 
 
-- 
GitLab