diff --git a/.gitignore b/.gitignore
index ab28e7102cf8b134b2bd798a278f811ddcc00602..de5aa9130ce2e4159093dfe46cdea7cbdfec1168 100644
--- a/.gitignore
+++ b/.gitignore
@@ -4,6 +4,7 @@
 simulate/sim/*
 lint/*
 .socinit
+.dma350_configured
 accelerator/html/*
 wrapper/html/*
 system/src/bootrom/*
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index b37f3d97c76a8e88133f44faf90a52fa8e4fad40..422eb502f4db099d09215d472ee5d0735cf82e91 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -48,7 +48,7 @@ simulate-hello:
   script:
     - echo "Simulation phase started"
     - source set_env.sh
-    - socsim test_aes128 TESTNAME=hello
+    - socsim test_nanosoc TESTNAME=hello
   tags:
     - VLAB-ZCU
     
diff --git a/asic_lib_tech b/asic_lib_tech
new file mode 160000
index 0000000000000000000000000000000000000000..39deacc600317d7c68df33421c1e49521818f69f
--- /dev/null
+++ b/asic_lib_tech
@@ -0,0 +1 @@
+Subproject commit 39deacc600317d7c68df33421c1e49521818f69f
diff --git a/env/dependency_env.sh b/env/dependency_env.sh
index 85bb93e135785458827ff6909166560a1e85fb48..5b610bd59d574aa53b493d724159897fe0f52481 100755
--- a/env/dependency_env.sh
+++ b/env/dependency_env.sh
@@ -31,6 +31,7 @@ export SOCLABS_SLCOREM0_TECH_DIR="$SOCLABS_PROJECT_DIR/nanosoc_tech/nanosoc/slco
 
 # SLDMA-230
 export SOCLABS_SLDMA230_TECH_DIR="$SOCLABS_PROJECT_DIR/nanosoc_tech/nanosoc/sldma230_tech"
+export SOCLABS_SLDMA350_TECH_DIR="$SOCLABS_PROJECT_DIR/nanosoc_tech/nanosoc/sldma350_tech"
 
 # Primtives
 export SOCLABS_PRIMITIVES_TECH_DIR="$SOCLABS_PROJECT_DIR/rtl_primitives_tech"
diff --git a/nanosoc_tech b/nanosoc_tech
index 244a49f4e1c7465d72e4f26d2faf7f4f8311b94f..1e23e6d5295a5ec8f597c5f4fac346d66fc2d426 160000
--- a/nanosoc_tech
+++ b/nanosoc_tech
@@ -1 +1 @@
-Subproject commit 244a49f4e1c7465d72e4f26d2faf7f4f8311b94f
+Subproject commit 1e23e6d5295a5ec8f597c5f4fac346d66fc2d426
diff --git a/projbranch b/projbranch
index 822a736b9428c89bb5d4726f21ee944275d6064b..1d14a8b18cb92593334ba4e09dfca1ddfada4ac2 100644
--- a/projbranch
+++ b/projbranch
@@ -19,3 +19,4 @@ fpga_lib_tech: main
 generic_lib_tech: main
 rtl_primitives_tech: main
 soctools_flow: main
+asic_lib_tech: main
diff --git a/set_env.sh b/set_env.sh
index 4f2410a3bbf7070f887de314a48b0431f0bc3a77..65e91156666bd7c04f23a219ce882459002875f2 100755
--- a/set_env.sh
+++ b/set_env.sh
@@ -12,3 +12,7 @@
 
 # Source set_env script from soctools_flow
 source soctools_flow/bin/project_setup.sh $@
+if [ ! -f .dma350_configured ]; then
+    make -C nanosoc_tech/nanosoc/sldma350_tech/ config_dma_ahb
+    touch .dma350_configured
+fi
\ No newline at end of file
diff --git a/soctools_flow b/soctools_flow
index 7e49a11b40b02c7879275a95c0b174cffa5f413d..eb193b3aa83a65cf3a510a171ea919bfa84cc348 160000
--- a/soctools_flow
+++ b/soctools_flow
@@ -1 +1 @@
-Subproject commit 7e49a11b40b02c7879275a95c0b174cffa5f413d
+Subproject commit eb193b3aa83a65cf3a510a171ea919bfa84cc348
diff --git a/system/src/accelerator_subsystem.v b/system/src/accelerator_subsystem.v
index 6e68edad48b81fb3e96af758649229329eaf826c..6cb2d42f704edf34ad20f3280efda98f917bf7a7 100644
--- a/system/src/accelerator_subsystem.v
+++ b/system/src/accelerator_subsystem.v
@@ -9,6 +9,7 @@
 //
 // Copyright (C) 2023; SoC Labs (www.soclabs.org)
 //-----------------------------------------------------------------------------
+`include "gen_defines.v"
 
 module accelerator_subsystem #(
   parameter SYS_ADDR_W = 32,
@@ -36,7 +37,35 @@ module accelerator_subsystem #(
   // Data Request Signal to DMAC
   output wire   [1:0]              EXP_DRQ,
   input  wire   [1:0]              EXP_DLAST,
-  
+   // DMAC Stream interfaces
+`ifdef DMAC_1_DMA350
+  input  wire                      EXP_STR_IN_0_TVALID,
+  output wire                      EXP_STR_IN_0_TREADY,
+  input  wire [SYS_DATA_W-1:0]     EXP_STR_IN_0_TDATA,
+  input  wire [15:0]               EXP_STR_IN_0_TSTRB,
+  input  wire                      EXP_STR_IN_0_TLAST,
+
+  output wire                      EXP_STR_OUT_0_TVALID,
+  input  wire                      EXP_STR_OUT_0_TREADY,
+  output wire [SYS_DATA_W-1:0]     EXP_STR_OUT_0_TDATA,
+  output wire [15:0]               EXP_STR_OUT_0_TSTRB,
+  output wire                      EXP_STR_OUT_0_TLAST,
+  input  wire                      EXP_STR_OUT_0_FLUSH,
+
+  input  wire                      EXP_STR_IN_1_TVALID,
+  output wire                      EXP_STR_IN_1_TREADY,
+  input  wire [SYS_DATA_W-1:0]     EXP_STR_IN_1_TDATA,
+  input  wire [15:0]               EXP_STR_IN_1_TSTRB,
+  input  wire                      EXP_STR_IN_1_TLAST,
+
+  output wire                      EXP_STR_OUT_1_TVALID,
+  input  wire                      EXP_STR_OUT_1_TREADY,
+  output wire [SYS_DATA_W-1:0]     EXP_STR_OUT_1_TDATA,
+  output wire [15:0]               EXP_STR_OUT_1_TSTRB,
+  output wire                      EXP_STR_OUT_1_TLAST,
+  input  wire                      EXP_STR_OUT_1_FLUSH,
+`endif 
+
   // Interrupts
   output wire   [IRQ_NUM-1:0]      EXP_IRQ
 );