diff --git a/flist/wrapper_ip.flist b/flist/wrapper_ip.flist
index 865ac08e34467f6eece7db7a29558f371fea2374..b5af8f2bfe12431f3f567d38c3e324fc369ec211 100644
--- a/flist/wrapper_ip.flist
+++ b/flist/wrapper_ip.flist
@@ -22,6 +22,7 @@
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_packet_constructor.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_packet_deconstructor.sv
+$(ACC_WRAPPER_DIR)/hdl/src/wrapper_read_addr_calc.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_data_req.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_reg_interface.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_vr_interface.sv
diff --git a/hdl/src/wrapper_ahb_packet_deconstructor.sv b/hdl/src/wrapper_ahb_packet_deconstructor.sv
index 408cee32360b22d627dd88109eee058ec58870c1..c582f7e0eacdf852a4eff4a168f92ecf1b2c4d57 100644
--- a/hdl/src/wrapper_ahb_packet_deconstructor.sv
+++ b/hdl/src/wrapper_ahb_packet_deconstructor.sv
@@ -30,15 +30,22 @@ module wrapper_ahb_packet_deconstructor #(
output logic [31:0] hrdatas,
// Valid/Ready Input Port
- input logic [PACKETWIDTH-1:0] packet_data,
- input logic packet_data_last,
- input logic packet_data_valid,
- output logic packet_data_ready,
+ input logic [PACKETWIDTH-1:0] packet_data,
+ input logic packet_data_last,
+ input logic [PACKETSPACEWIDTH-1:0] packet_data_remain, // Number of remaining packets after this transfer
+ input logic packet_data_valid,
+ output logic packet_data_ready,
// Data Request Signal
- output logic data_req
+ output logic data_req,
+
+ // Start Read Address for Current Block
+ output logic [ADDRWIDTH-1:0] block_read_addr
);
+ localparam PACKETBYTEWIDTH = $clog2(PACKETWIDTH/8); // Number of Bytes in Packet
+ localparam PACKETSPACEWIDTH = ADDRWIDTH-PACKETBYTEWIDTH; // Number of Bits to represent all Packets in Address Space
+
// Register Interface Connections
logic [ADDRWIDTH-1:0] addr;
logic read_en;
@@ -51,6 +58,9 @@ module wrapper_ahb_packet_deconstructor #(
// Deconstructor Ready for more Data
logic deconstructor_ready;
+
+ // Number of Packets in Block
+ logic [PACKETSPACEWIDTH:0] block_packet_count;
// AHB Interface Instantiation
wrapper_ahb_reg_interface #(
@@ -104,6 +114,16 @@ module wrapper_ahb_packet_deconstructor #(
.data_req (data_req)
);
+ // Relative Read Address Calculator
+ wrapper_read_addr_calc #(
+ ADDRWIDTH, // Only half address map allocated to this device
+ PACKETWIDTH // Packet Width
+ ) u_wrapper_read_addr_calc (
+ // Address Interfaces
+ .block_packet_count (block_packet_count),
+ .block_read_addr (block_read_addr)
+ );
+
// Valid/Ready Packet Generator
wrapper_packet_deconstruct #(
ADDRWIDTH, // Only half address map allocated to this device
@@ -125,9 +145,13 @@ module wrapper_ahb_packet_deconstructor #(
// Valid/Ready Interface
.packet_data (packet_data),
.packet_data_last (packet_data_last),
+ .packet_data_remain (packet_data_remain),
.packet_data_valid (packet_data_valid),
.packet_data_ready (packet_data_ready),
+ // Block Packet Count
+ .block_packet_count (block_packet_count),
+
// Data Request
.deconstructor_ready (deconstructor_ready)
);
diff --git a/hdl/src/wrapper_packet_deconstruct.sv b/hdl/src/wrapper_packet_deconstruct.sv
index cfc95bf306a8ebcee243f4c5748ee9f195ffe25c..0a0b76299a529307a6fe5a2738236bd1382c1b77 100644
--- a/hdl/src/wrapper_packet_deconstruct.sv
+++ b/hdl/src/wrapper_packet_deconstruct.sv
@@ -27,14 +27,21 @@ module wrapper_packet_deconstruct #(
output logic rready,
// Valid/Ready interface
- input logic [PACKETWIDTH-1:0] packet_data,
- input logic packet_data_last,
- input logic packet_data_valid,
- output logic packet_data_ready,
+ input logic [PACKETWIDTH-1:0] packet_data,
+ input logic packet_data_last,
+ input logic [PACKETSPACEWIDTH-1:0] packet_data_remain, // Number of remaining packets after this transfer
+ input logic packet_data_valid,
+ output logic packet_data_ready,
+
+ // Number of Packets in Current
+ output logic [PACKETSPACEWIDTH:0] block_packet_count,
- output logic deconstructor_ready
+ output logic deconstructor_ready
);
+localparam PACKETBYTEWIDTH = $clog2(PACKETWIDTH/8); // Number of Bytes in Packet
+localparam PACKETSPACEWIDTH = ADDRWIDTH-PACKETBYTEWIDTH; // Number of Bits to represent all Packets in Address Space
+
// Create Deconstruction Buffer
logic [(PACKETWIDTH/32)-1:0][31:0] deconst_buf;
assign deconst_buf = packet_data;
@@ -56,6 +63,10 @@ assign deconst_buf_flag_reduced = &(deconst_buf_flag | (cur_deconst_buf_flag));
logic deconst_buf_valid;
assign deconstructor_ready = deconst_buf_valid;
+
+// Previous Packet Last
+logic prev_packet_last;
+
// Dump data on one of two conditions
// - An address ends [5:0] in 0x3C i.e. [5:2] == 0xF
// - Address Moved to different 512 bit word
@@ -63,9 +74,11 @@ assign deconstructor_ready = deconst_buf_valid;
always_ff @(posedge hclk or negedge hresetn) begin
if (~hresetn) begin
// Reset Values
+ block_packet_count <= {(PACKETSPACEWIDTH+1){1'b0}};
packet_data_ready <= 1'b0;
deconst_buf_valid <= 1'b0;
deconst_buf_flag <= {(PACKETWIDTH/32){1'b0}};
+ prev_packet_last <= 1'b1;
end else begin
if (packet_data_valid && packet_data_ready) begin
packet_data_ready <= 1'b0;
@@ -75,6 +88,8 @@ always_ff @(posedge hclk or negedge hresetn) begin
deconst_buf_valid <= 1'b1;
deconst_buf_flag <= {(PACKETWIDTH/32){1'b0}};
packet_data_ready <= 1'b0;
+ // Update block_packet_count
+ block_packet_count <= prev_packet_last ? ({1'b0, packet_data_remain} + 'b1) : block_packet_count;
end
if (read_en) begin
// Register which words in the Deconstruction buffer have been read
@@ -83,6 +98,7 @@ always_ff @(posedge hclk or negedge hresetn) begin
// Set Ready High To Get more Data into Buffer
deconst_buf_valid <= 1'b0;
packet_data_ready <= 1'b1;
+ prev_packet_last <= packet_data_last;
end else begin
deconst_buf_flag <= deconst_buf_flag | cur_deconst_buf_flag;
end
diff --git a/hdl/src/wrapper_read_addr_calc.sv b/hdl/src/wrapper_read_addr_calc.sv
new file mode 100644
index 0000000000000000000000000000000000000000..9049c9f742b5f9bd675f7ea14306c579b27395ff
--- /dev/null
+++ b/hdl/src/wrapper_read_addr_calc.sv
@@ -0,0 +1,36 @@
+//-----------------------------------------------------------------------------
+// SoC Labs Relative Read Address Calculator
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// David Mapstone (d.a.mapstone@soton.ac.uk)
+//
+// Copyright 2023, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
+module wrapper_read_addr_calc #(
+ //parameter for address width
+ parameter ADDRWIDTH=11,
+ parameter PACKETWIDTH=256
+)(
+ // Number of Packets in Current Block
+ input logic [PACKETSPACEWIDTH:0] block_packet_count,
+
+ // Start Read Address
+ output logic [ADDRWIDTH-1:0] block_read_addr
+);
+
+ localparam PACKETBYTES = (PACKETWIDTH+7)/8; // Number of Bytes in Packet
+ localparam PACKETBYTEWIDTH = $clog2(PACKETBYTES); // Number of Bits to represent Bytes in Packet
+ localparam PACKETSPACEWIDTH = ADDRWIDTH-PACKETBYTEWIDTH; // Number of Bits to represent all Packets in Address Space
+
+ logic [ADDRWIDTH-1:0] block_byte_count; // Number of Bytes taken up by Block
+ logic [ADDRWIDTH:0] end_word_addr; // First Address at start of next region
+ logic [ADDRWIDTH:0] block_read_addr_ext; // Relative Read Address extended by 1 bit
+
+ assign block_byte_count = block_packet_count * PACKETBYTES;
+ assign end_word_addr = {1'b1,{(ADDRWIDTH){1'b0}}};
+ assign block_read_addr_ext = end_word_addr - block_byte_count;
+ assign block_read_addr = block_read_addr_ext[ADDRWIDTH-1:0];
+
+endmodule
\ No newline at end of file