diff --git a/flist/corstone-101/corstone-101_ip.flist b/flist/corstone-101/corstone-101_ip.flist
index 4420f2649ab6a49aeec2d7e054c212667c448a04..06d9fcc13b2d834ff3095575db324317f176e5c5 100644
--- a/flist/corstone-101/corstone-101_ip.flist
+++ b/flist/corstone-101/corstone-101_ip.flist
@@ -15,7 +15,7 @@
// ============= Verilog library extensions ===========
+libext+.v+.vlib
-// ============= DMA-230 search path =============
+// ============= Corstone-101 search path =============
+incdir+$(PROJECT_DIR)/system/defines/corstone101
+incdir+$(ARM_IP_LIBRARY_PATH)/latest/Corstone-101/logical/cmsdk_apb_dualtimers/verilog
diff --git a/flist/nanosoc/nanosoc_chip_ip.flist b/flist/nanosoc/nanosoc_chip_ip.flist
index f45acfcbdd5b8ee946abdcc31c9169de967f15b5..980e004e4de9c828be93ae84d18580cb39e880e2 100644
--- a/flist/nanosoc/nanosoc_chip_ip.flist
+++ b/flist/nanosoc/nanosoc_chip_ip.flist
@@ -16,18 +16,18 @@
+libext+.v+.vlib
// ============= NanoSoC Bus Matrix IP search path =============
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/nanosoc_chip.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/nanosoc_chip_pads.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/nanosoc_chip.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/nanosoc_chip_pads.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/nanosoc_cpu.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/nanosoc_sysio.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/nanosoc_sys_ahb_decode.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/cmsdk_ahb_cs_rom_table.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/nanosoc_cpu.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/nanosoc_sysio.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/nanosoc_sys_ahb_decode.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/cmsdk_mcu_pin_mux.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/cmsdk_mcu_stclkctrl.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/cmsdk_mcu_clkctrl.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/cmsdk_mcu_sysctrl.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/cmsdk_ahb_cs_rom_table.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/cmsdk_mcu_pin_mux.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/cmsdk_mcu_stclkctrl.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/cmsdk_mcu_clkctrl.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/cmsdk_mcu_sysctrl.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/bootrom.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/ahb_bootrom.v
\ No newline at end of file
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/bootrom.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/ahb_bootrom.v
\ No newline at end of file
diff --git a/flist/nanosoc/nanosoc_matrix_ip.flist b/flist/nanosoc/nanosoc_matrix_ip.flist
index 409d0b4f84afcb6b701e34defcb3f4b23925dc14..3566bf5977c5b4d6cabc0d3f7ac2daae57f1c276 100644
--- a/flist/nanosoc/nanosoc_matrix_ip.flist
+++ b/flist/nanosoc/nanosoc_matrix_ip.flist
@@ -16,6 +16,6 @@
+libext+.v+.vlib
// ============= NanoSoC Bus Matrix IP search path =============
-+incdir+$(NANOSOC_TECH_DIR)/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix
++incdir+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix
--y $(NANOSOC_TECH_DIR)/systems/mcu/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix
\ No newline at end of file
+-y $(NANOSOC_TECH_DIR)/systems/nanososc/verilog/gen_ahb_busmatrix/verilog/built/soclabs_4x7_AhbMatrix
\ No newline at end of file
diff --git a/flist/nanosoc/nanosoc_tb.flist b/flist/nanosoc/nanosoc_tb.flist
index 98c2d83b61c3ee6005c197b65d0918e31e89d0b9..6574d465f63210acad34c1268da743c732084e77 100644
--- a/flist/nanosoc/nanosoc_tb.flist
+++ b/flist/nanosoc/nanosoc_tb.flist
@@ -16,18 +16,18 @@
+libext+.v+.vlib
// ============= DMA-230 search path =============
-+incdir+$(NANOSOC_TECH_DIR)/systems/mcu/verilog/
++incdir+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/
// - Top-level testbench
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/tb_nanosoc.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/tb_nanosoc.v
// - Testbench components
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/cmsdk_clkreset.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/cmsdk_uart_capture.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/axi_streamio8_txd_from_file.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/ft1248x1_to_axi_streamio_v1_0.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/axi_streamio8_rxd_to_file.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/track_tb_iostream.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/ft1248x1_track.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/dma_log_to_file.v
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/aes128_log_to_file.v
\ No newline at end of file
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/cmsdk_clkreset.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/cmsdk_uart_capture.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/axi_stream_io_8_txd_from_file.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/ft1248x1_to_axi_streamio_v1_0.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/axi_stream_io_8_rxd_to_file.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/track_tb_iostream.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/ft1248x1_track.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/dma_log_to_file.v
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/aes128_log_to_file.v
\ No newline at end of file
diff --git a/flist/test_io/usrt_ip.flist b/flist/test_io/usrt_ip.flist
index 3f8b0bb71618262cf832d825683402c1ab508117..4558f3f712a7129e83cbe47fb0a184d31634616b 100644
--- a/flist/test_io/usrt_ip.flist
+++ b/flist/test_io/usrt_ip.flist
@@ -16,4 +16,4 @@
+libext+.v+.vlib
// ============= APB USRT search path =============
-$(NANOSOC_TECH_DIR)/systems/mcu/verilog/cmsdk_apb_usrt.v
\ No newline at end of file
+$(NANOSOC_TECH_DIR)/systems/nanososc/verilog/cmsdk_apb_usrt.v
\ No newline at end of file
diff --git a/generic-lib b/generic-lib
index 1c51bdc9f94ff66bc8434aa97c397bc9c06d14ab..f5886f46ad61255996214720ab13e0b006530699 160000
--- a/generic-lib
+++ b/generic-lib
@@ -1 +1 @@
-Subproject commit 1c51bdc9f94ff66bc8434aa97c397bc9c06d14ab
+Subproject commit f5886f46ad61255996214720ab13e0b006530699
diff --git a/nanosoc b/nanosoc
index 743692b2f1e8b803290cf60f379681db3e6c9517..ab2f30d5531ee4ea52b932317b5c223800c84798 160000
--- a/nanosoc
+++ b/nanosoc
@@ -1 +1 @@
-Subproject commit 743692b2f1e8b803290cf60f379681db3e6c9517
+Subproject commit ab2f30d5531ee4ea52b932317b5c223800c84798
diff --git a/set_env.sh b/set_env.sh
index ca7d40aeccd0811f1504003e0633976ac6b6494d..102f446418b8c0b2af04000db63fa557ea3757d0 100755
--- a/set_env.sh
+++ b/set_env.sh
@@ -61,15 +61,6 @@ if [ ! -f $PROJECT_DIR/.socinit ]; then
echo "Running First Time Repository Initialisation"
# Source environment variables for all submodules
cd $DESIGN_ROOT
- for d in $PROJECT_DIR/* ; do
- if [ -e "$d/.git" ]; then
- if [ -f "$d/set_env.sh" ]; then
- # If .git file exists - submodule
- # git config -f .gitmodules submodule.$d.branch main
- git submodule set-branch --branch main $d
- fi
- fi
- done
git submodule update --remote --recursive
git submodule foreach --recursive git checkout main
# Read proj-branch file to find out which branch each subrepo needs to be on
diff --git a/simulate/socsim/system_secworks_sha256.sh b/simulate/socsim/system_secworks_sha256.sh
index 8d282fbc2625d3cbdf3e15959b49f7388ef2cce3..c537f4cfbf6725f0cf0a9a10ab792e2d4efeb669 100755
--- a/simulate/socsim/system_secworks_sha256.sh
+++ b/simulate/socsim/system_secworks_sha256.sh
@@ -11,10 +11,6 @@
#!/usr/bin/env bash
-# Generate Stimulus from stimulus generation Script
-# python3 $SECWORKS_SHA2_TECH_DIR/flow/stimgen.py
-# Create Simulatiom Directory to Run in
-
# Get simulation name from name of script
SIM_NAME=`basename -s .sh "$0"`
@@ -23,9 +19,13 @@ SIM_DIR=$PROJECT_DIR/simulate/sim/$SIM_NAME
# Create Directory to put simulation files
mkdir -p $SIM_DIR
-
cd $PROJECT_DIR/simulate/sim/system_secworks_sha256
+
# Compile Simulation
# Call makefile in NanoSoC Repo with options
-make -C $NANOSOC_TECH_DIR/systems/mcu/rtl_sim compile_xm \
- SIM_DIR=$SIM_DIR
+echo ${2}
+make -C $NANOSOC_TECH_DIR/systems/mcu run_xm \
+ SIM_DIR=$SIM_DIR \
+ ADP_FILE=$PROJECT_DIR/system/stimulus/adp_hash_stim.cmd \
+ ${@:2}
+