diff --git a/hdl/registers/config.yml b/hdl/registers/config.yml
new file mode 100644
index 0000000000000000000000000000000000000000..446767e17c2cc28f41f6058c460768698a7c7a44
--- /dev/null
+++ b/hdl/registers/config.yml
@@ -0,0 +1,3 @@
+bus_width: 32
+address_width: 4
+protocol: apb
\ No newline at end of file
diff --git a/hdl/registers/out/status_regs.h b/hdl/registers/out/status_regs.h
new file mode 100644
index 0000000000000000000000000000000000000000..f16e7c6d7a4160a737ec5d648760acd10756b384
--- /dev/null
+++ b/hdl/registers/out/status_regs.h
@@ -0,0 +1,31 @@
+#ifndef STATUS_REGS_H
+#define STATUS_REGS_H
+#include "stdint.h"
+#define STATUS_REGS_STATUS_0_STATUS_ID_BIT_WIDTH 6
+#define STATUS_REGS_STATUS_0_STATUS_ID_BIT_MASK 0x3f
+#define STATUS_REGS_STATUS_0_STATUS_ID_BIT_OFFSET 0
+#define STATUS_REGS_STATUS_0_STATUS_BUFFERED_IDS_BIT_WIDTH 3
+#define STATUS_REGS_STATUS_0_STATUS_BUFFERED_IDS_BIT_MASK 0x7
+#define STATUS_REGS_STATUS_0_STATUS_BUFFERED_IDS_BIT_OFFSET 6
+#define STATUS_REGS_STATUS_0_STATUS_ERR_BUFFER_BIT_WIDTH 1
+#define STATUS_REGS_STATUS_0_STATUS_ERR_BUFFER_BIT_MASK 0x1
+#define STATUS_REGS_STATUS_0_STATUS_ERR_BUFFER_BIT_OFFSET 9
+#define STATUS_REGS_STATUS_0_STATUS_ERR_PACKET_BIT_WIDTH 1
+#define STATUS_REGS_STATUS_0_STATUS_ERR_PACKET_BIT_MASK 0x1
+#define STATUS_REGS_STATUS_0_STATUS_ERR_PACKET_BIT_OFFSET 10
+#define STATUS_REGS_STATUS_0_STATUS_ERR_CLEAR_BIT_WIDTH 1
+#define STATUS_REGS_STATUS_0_STATUS_ERR_CLEAR_BIT_MASK 0x1
+#define STATUS_REGS_STATUS_0_STATUS_ERR_CLEAR_BIT_OFFSET 11
+#define STATUS_REGS_STATUS_0_STATUS_PACKET_COUNT_BIT_WIDTH 10
+#define STATUS_REGS_STATUS_0_STATUS_PACKET_COUNT_BIT_MASK 0x3ff
+#define STATUS_REGS_STATUS_0_STATUS_PACKET_COUNT_BIT_OFFSET 12
+#define STATUS_REGS_STATUS_0_BYTE_WIDTH 4
+#define STATUS_REGS_STATUS_0_BYTE_SIZE 4
+#define STATUS_REGS_STATUS_0_BYTE_OFFSET 0x0
+typedef struct {
+ uint32_t status_0;
+ uint32_t __reserved_0x4;
+ uint32_t __reserved_0x8;
+ uint32_t __reserved_0xc;
+} status_regs_t;
+#endif
diff --git a/hdl/registers/out/status_regs.md b/hdl/registers/out/status_regs.md
new file mode 100644
index 0000000000000000000000000000000000000000..2b36b17f7ef19ce14de0b96030afe998b003b396
--- /dev/null
+++ b/hdl/registers/out/status_regs.md
@@ -0,0 +1,24 @@
+## status_regs
+
+* byte_size
+ * 16
+
+|name|offset_address|
+|:--|:--|
+|[status_0](#status_regs-status_0)|0x0|
+
+### <div id="status_regs-status_0"></div>status_0
+
+* offset_address
+ * 0x0
+* type
+ * default
+
+|name|bit_assignments|type|initial_value|reference|labels|comment|
+|:--|:--|:--|:--|:--|:--|:--|
+|status_id|[5:0]|ro|0x00|||Contains last ID Value in ID Buffer|
+|status_buffered_ids|[8:6]|ro|0x0|||Number of IDs in ID Buffer|
+|status_err_buffer|[9]|ro|0x0|||ID Buffer Error|
+|status_err_packet|[10]|ro|0x0|||Dropped Packet Error|
+|status_err_clear|[11]|wo|0x0|||Clear Error Flags|
+|status_packet_count|[21:12]|ro|0x000|||Number of Packets Passed Through|
diff --git a/hdl/registers/out/status_regs.sv b/hdl/registers/out/status_regs.sv
new file mode 100644
index 0000000000000000000000000000000000000000..006211faf39012606ee9fb7c51424cd1cdc98872
--- /dev/null
+++ b/hdl/registers/out/status_regs.sv
@@ -0,0 +1,233 @@
+`ifndef rggen_connect_bit_field_if
+ `define rggen_connect_bit_field_if(RIF, FIF, LSB, WIDTH) \
+ assign FIF.valid = RIF.valid; \
+ assign FIF.read_mask = RIF.read_mask[LSB+:WIDTH]; \
+ assign FIF.write_mask = RIF.write_mask[LSB+:WIDTH]; \
+ assign FIF.write_data = RIF.write_data[LSB+:WIDTH]; \
+ assign RIF.read_data[LSB+:WIDTH] = FIF.read_data; \
+ assign RIF.value[LSB+:WIDTH] = FIF.value;
+`endif
+`ifndef rggen_tie_off_unused_signals
+ `define rggen_tie_off_unused_signals(WIDTH, VALID_BITS, RIF) \
+ if (1) begin : __g_tie_off \
+ genvar __i; \
+ for (__i = 0;__i < WIDTH;++__i) begin : g \
+ if (!(((VALID_BITS) >> __i) & 1'b1)) begin : g \
+ assign RIF.read_data[__i] = 1'b0; \
+ assign RIF.value[__i] = 1'b0; \
+ end \
+ end \
+ end
+`endif
+module status_regs
+ import rggen_rtl_pkg::*;
+#(
+ parameter int ADDRESS_WIDTH = 4,
+ parameter bit PRE_DECODE = 0,
+ parameter bit [ADDRESS_WIDTH-1:0] BASE_ADDRESS = '0,
+ parameter bit ERROR_STATUS = 0,
+ parameter bit [31:0] DEFAULT_READ_DATA = '0
+)(
+ input logic i_clk,
+ input logic i_rst_n,
+ rggen_apb_if.slave apb_if,
+ input logic [5:0] i_status_0_status_id,
+ input logic [2:0] i_status_0_status_buffered_ids,
+ input logic i_status_0_status_err_buffer,
+ input logic i_status_0_status_err_packet,
+ output logic o_status_0_status_err_clear,
+ input logic [9:0] i_status_0_status_packet_count
+);
+ rggen_register_if #(4, 32, 32) register_if[1]();
+ rggen_apb_adapter #(
+ .ADDRESS_WIDTH (ADDRESS_WIDTH),
+ .LOCAL_ADDRESS_WIDTH (4),
+ .BUS_WIDTH (32),
+ .REGISTERS (1),
+ .PRE_DECODE (PRE_DECODE),
+ .BASE_ADDRESS (BASE_ADDRESS),
+ .BYTE_SIZE (16),
+ .ERROR_STATUS (ERROR_STATUS),
+ .DEFAULT_READ_DATA (DEFAULT_READ_DATA)
+ ) u_adapter (
+ .i_clk (i_clk),
+ .i_rst_n (i_rst_n),
+ .apb_if (apb_if),
+ .register_if (register_if)
+ );
+ generate if (1) begin : g_status_0
+ rggen_bit_field_if #(32) bit_field_if();
+ `rggen_tie_off_unused_signals(32, 32'h003fffff, bit_field_if)
+ rggen_default_register #(
+ .READABLE (1),
+ .WRITABLE (1),
+ .ADDRESS_WIDTH (4),
+ .OFFSET_ADDRESS (4'h0),
+ .BUS_WIDTH (32),
+ .DATA_WIDTH (32),
+ .REGISTER_INDEX (0)
+ ) u_register (
+ .i_clk (i_clk),
+ .i_rst_n (i_rst_n),
+ .register_if (register_if[0]),
+ .bit_field_if (bit_field_if)
+ );
+ if (1) begin : g_status_id
+ localparam bit [5:0] INITIAL_VALUE = 6'h00;
+ rggen_bit_field_if #(6) bit_field_sub_if();
+ `rggen_connect_bit_field_if(bit_field_if, bit_field_sub_if, 0, 6)
+ rggen_bit_field #(
+ .WIDTH (6),
+ .STORAGE (0),
+ .EXTERNAL_READ_DATA (1),
+ .TRIGGER (0)
+ ) u_bit_field (
+ .i_clk (i_clk),
+ .i_rst_n (i_rst_n),
+ .bit_field_if (bit_field_sub_if),
+ .o_write_trigger (),
+ .o_read_trigger (),
+ .i_sw_write_enable ('0),
+ .i_hw_write_enable ('0),
+ .i_hw_write_data ('0),
+ .i_hw_set ('0),
+ .i_hw_clear ('0),
+ .i_value (i_status_0_status_id),
+ .i_mask ('1),
+ .o_value (),
+ .o_value_unmasked ()
+ );
+ end
+ if (1) begin : g_status_buffered_ids
+ localparam bit [2:0] INITIAL_VALUE = 3'h0;
+ rggen_bit_field_if #(3) bit_field_sub_if();
+ `rggen_connect_bit_field_if(bit_field_if, bit_field_sub_if, 6, 3)
+ rggen_bit_field #(
+ .WIDTH (3),
+ .STORAGE (0),
+ .EXTERNAL_READ_DATA (1),
+ .TRIGGER (0)
+ ) u_bit_field (
+ .i_clk (i_clk),
+ .i_rst_n (i_rst_n),
+ .bit_field_if (bit_field_sub_if),
+ .o_write_trigger (),
+ .o_read_trigger (),
+ .i_sw_write_enable ('0),
+ .i_hw_write_enable ('0),
+ .i_hw_write_data ('0),
+ .i_hw_set ('0),
+ .i_hw_clear ('0),
+ .i_value (i_status_0_status_buffered_ids),
+ .i_mask ('1),
+ .o_value (),
+ .o_value_unmasked ()
+ );
+ end
+ if (1) begin : g_status_err_buffer
+ localparam bit INITIAL_VALUE = 1'h0;
+ rggen_bit_field_if #(1) bit_field_sub_if();
+ `rggen_connect_bit_field_if(bit_field_if, bit_field_sub_if, 9, 1)
+ rggen_bit_field #(
+ .WIDTH (1),
+ .STORAGE (0),
+ .EXTERNAL_READ_DATA (1),
+ .TRIGGER (0)
+ ) u_bit_field (
+ .i_clk (i_clk),
+ .i_rst_n (i_rst_n),
+ .bit_field_if (bit_field_sub_if),
+ .o_write_trigger (),
+ .o_read_trigger (),
+ .i_sw_write_enable ('0),
+ .i_hw_write_enable ('0),
+ .i_hw_write_data ('0),
+ .i_hw_set ('0),
+ .i_hw_clear ('0),
+ .i_value (i_status_0_status_err_buffer),
+ .i_mask ('1),
+ .o_value (),
+ .o_value_unmasked ()
+ );
+ end
+ if (1) begin : g_status_err_packet
+ localparam bit INITIAL_VALUE = 1'h0;
+ rggen_bit_field_if #(1) bit_field_sub_if();
+ `rggen_connect_bit_field_if(bit_field_if, bit_field_sub_if, 10, 1)
+ rggen_bit_field #(
+ .WIDTH (1),
+ .STORAGE (0),
+ .EXTERNAL_READ_DATA (1),
+ .TRIGGER (0)
+ ) u_bit_field (
+ .i_clk (i_clk),
+ .i_rst_n (i_rst_n),
+ .bit_field_if (bit_field_sub_if),
+ .o_write_trigger (),
+ .o_read_trigger (),
+ .i_sw_write_enable ('0),
+ .i_hw_write_enable ('0),
+ .i_hw_write_data ('0),
+ .i_hw_set ('0),
+ .i_hw_clear ('0),
+ .i_value (i_status_0_status_err_packet),
+ .i_mask ('1),
+ .o_value (),
+ .o_value_unmasked ()
+ );
+ end
+ if (1) begin : g_status_err_clear
+ localparam bit INITIAL_VALUE = 1'h0;
+ rggen_bit_field_if #(1) bit_field_sub_if();
+ `rggen_connect_bit_field_if(bit_field_if, bit_field_sub_if, 11, 1)
+ rggen_bit_field #(
+ .WIDTH (1),
+ .INITIAL_VALUE (INITIAL_VALUE),
+ .SW_READ_ACTION (RGGEN_READ_NONE),
+ .SW_WRITE_ONCE (0),
+ .TRIGGER (0)
+ ) u_bit_field (
+ .i_clk (i_clk),
+ .i_rst_n (i_rst_n),
+ .bit_field_if (bit_field_sub_if),
+ .o_write_trigger (),
+ .o_read_trigger (),
+ .i_sw_write_enable ('1),
+ .i_hw_write_enable ('0),
+ .i_hw_write_data ('0),
+ .i_hw_set ('0),
+ .i_hw_clear ('0),
+ .i_value ('0),
+ .i_mask ('1),
+ .o_value (o_status_0_status_err_clear),
+ .o_value_unmasked ()
+ );
+ end
+ if (1) begin : g_status_packet_count
+ localparam bit [9:0] INITIAL_VALUE = 10'h000;
+ rggen_bit_field_if #(10) bit_field_sub_if();
+ `rggen_connect_bit_field_if(bit_field_if, bit_field_sub_if, 12, 10)
+ rggen_bit_field #(
+ .WIDTH (10),
+ .STORAGE (0),
+ .EXTERNAL_READ_DATA (1),
+ .TRIGGER (0)
+ ) u_bit_field (
+ .i_clk (i_clk),
+ .i_rst_n (i_rst_n),
+ .bit_field_if (bit_field_sub_if),
+ .o_write_trigger (),
+ .o_read_trigger (),
+ .i_sw_write_enable ('0),
+ .i_hw_write_enable ('0),
+ .i_hw_write_data ('0),
+ .i_hw_set ('0),
+ .i_hw_clear ('0),
+ .i_value (i_status_0_status_packet_count),
+ .i_mask ('1),
+ .o_value (),
+ .o_value_unmasked ()
+ );
+ end
+ end endgenerate
+endmodule
diff --git a/hdl/registers/out/status_regs_ral_pkg.sv b/hdl/registers/out/status_regs_ral_pkg.sv
new file mode 100644
index 0000000000000000000000000000000000000000..e9a85a7ab829d098a86b82637ad2c160394d6288
--- /dev/null
+++ b/hdl/registers/out/status_regs_ral_pkg.sv
@@ -0,0 +1,34 @@
+package status_regs_ral_pkg;
+ import uvm_pkg::*;
+ import rggen_ral_pkg::*;
+ `include "uvm_macros.svh"
+ `include "rggen_ral_macros.svh"
+ class status_0_reg_model extends rggen_ral_reg;
+ rand rggen_ral_field status_id;
+ rand rggen_ral_field status_buffered_ids;
+ rand rggen_ral_field status_err_buffer;
+ rand rggen_ral_field status_err_packet;
+ rand rggen_ral_field status_err_clear;
+ rand rggen_ral_field status_packet_count;
+ function new(string name);
+ super.new(name, 32, 0);
+ endfunction
+ function void build();
+ `rggen_ral_create_field(status_id, 0, 6, "RO", 1, 6'h00, 1, -1, "")
+ `rggen_ral_create_field(status_buffered_ids, 6, 3, "RO", 1, 3'h0, 1, -1, "")
+ `rggen_ral_create_field(status_err_buffer, 9, 1, "RO", 1, 1'h0, 1, -1, "")
+ `rggen_ral_create_field(status_err_packet, 10, 1, "RO", 1, 1'h0, 1, -1, "")
+ `rggen_ral_create_field(status_err_clear, 11, 1, "WO", 0, 1'h0, 1, -1, "")
+ `rggen_ral_create_field(status_packet_count, 12, 10, "RO", 1, 10'h000, 1, -1, "")
+ endfunction
+ endclass
+ class status_regs_block_model extends rggen_ral_block;
+ rand status_0_reg_model status_0;
+ function new(string name);
+ super.new(name, 4, 0);
+ endfunction
+ function void build();
+ `rggen_ral_create_reg(status_0, '{}, 4'h0, "RW", "g_status_0.u_register")
+ endfunction
+ endclass
+endpackage
diff --git a/hdl/registers/out/status_regs_rtl_pkg.sv b/hdl/registers/out/status_regs_rtl_pkg.sv
new file mode 100644
index 0000000000000000000000000000000000000000..e5b57358c2d4a85f1d396dc74bb03085991a59b7
--- /dev/null
+++ b/hdl/registers/out/status_regs_rtl_pkg.sv
@@ -0,0 +1,23 @@
+package status_regs_rtl_pkg;
+ localparam int STATUS_0_BYTE_WIDTH = 4;
+ localparam int STATUS_0_BYTE_SIZE = 4;
+ localparam bit [3:0] STATUS_0_BYTE_OFFSET = 4'h0;
+ localparam int STATUS_0_STATUS_ID_BIT_WIDTH = 6;
+ localparam bit [5:0] STATUS_0_STATUS_ID_BIT_MASK = 6'h3f;
+ localparam int STATUS_0_STATUS_ID_BIT_OFFSET = 0;
+ localparam int STATUS_0_STATUS_BUFFERED_IDS_BIT_WIDTH = 3;
+ localparam bit [2:0] STATUS_0_STATUS_BUFFERED_IDS_BIT_MASK = 3'h7;
+ localparam int STATUS_0_STATUS_BUFFERED_IDS_BIT_OFFSET = 6;
+ localparam int STATUS_0_STATUS_ERR_BUFFER_BIT_WIDTH = 1;
+ localparam bit STATUS_0_STATUS_ERR_BUFFER_BIT_MASK = 1'h1;
+ localparam int STATUS_0_STATUS_ERR_BUFFER_BIT_OFFSET = 9;
+ localparam int STATUS_0_STATUS_ERR_PACKET_BIT_WIDTH = 1;
+ localparam bit STATUS_0_STATUS_ERR_PACKET_BIT_MASK = 1'h1;
+ localparam int STATUS_0_STATUS_ERR_PACKET_BIT_OFFSET = 10;
+ localparam int STATUS_0_STATUS_ERR_CLEAR_BIT_WIDTH = 1;
+ localparam bit STATUS_0_STATUS_ERR_CLEAR_BIT_MASK = 1'h1;
+ localparam int STATUS_0_STATUS_ERR_CLEAR_BIT_OFFSET = 11;
+ localparam int STATUS_0_STATUS_PACKET_COUNT_BIT_WIDTH = 10;
+ localparam bit [9:0] STATUS_0_STATUS_PACKET_COUNT_BIT_MASK = 10'h3ff;
+ localparam int STATUS_0_STATUS_PACKET_COUNT_BIT_OFFSET = 12;
+endpackage
diff --git a/hdl/registers/status_regs.yml b/hdl/registers/status_regs.yml
new file mode 100644
index 0000000000000000000000000000000000000000..13a3ca47c9db4094d3dfc5d9f19b2d2d1c733528
--- /dev/null
+++ b/hdl/registers/status_regs.yml
@@ -0,0 +1,12 @@
+register_blocks:
+ - name: status_regs
+ byte_size: 16
+ registers:
+ - name: status_0
+ bit_fields:
+ - { name: status_id, bit_assignment: { width: 6 }, type: ro , initial_value: 0, comment: Contains last ID Value in ID Buffer }
+ - { name: status_buffered_ids, bit_assignment: { width: 3 }, type: ro , initial_value: 0, comment: Number of IDs in ID Buffer }
+ - { name: status_err_buffer, bit_assignment: { width: 1 }, type: ro , initial_value: 0, comment: ID Buffer Error }
+ - { name: status_err_packet, bit_assignment: { width: 1 }, type: ro , initial_value: 0, comment: Dropped Packet Error }
+ - { name: status_err_clear, bit_assignment: { width: 1 }, type: wo , initial_value: 0, comment: Clear Error Flags }
+ - { name: status_packet_count, bit_assignment: { width: 10 }, type: ro , initial_value: 0, comment: Number of Packets Passed Through }
\ No newline at end of file
diff --git a/hdl/src/sha256_config_sync.sv b/hdl/src/sha256_config_sync.sv
index 3c4a1d7186e1380fe9deaca2ab508406f7bd2817..6f75f98ae86da5359655d8c0ba6ff360ccac2651 100644
--- a/hdl/src/sha256_config_sync.sv
+++ b/hdl/src/sha256_config_sync.sv
@@ -40,8 +40,7 @@ module sha256_config_sync (
// Status Out - Gets updated after every hash
// - outputs size and then clears size to 0
// - status regs are looking for non-zero size
- output logic [63:0] status_size,
- input logic status_clear
+ output logic [63:0] status_size
);
logic [1:0] state, next_state;
@@ -109,9 +108,7 @@ module sha256_config_sync (
2'd1: begin
// Handle Status Signals
- if (status_clear) begin
- next_status_size = 64'd0;
- end
+ next_status_size = 64'd0;
// Check outputs can be written to
if (cfg_out_valid && !cfg_out_ready) begin
// If data out is valid and ready is low, there is already data waiting to be transferred
@@ -158,9 +155,7 @@ module sha256_config_sync (
2'd2: begin // Cfg already handshaked - wait for ID handshake
// Handle Status Signals
- if (status_clear) begin
- next_status_size = 64'd0;
- end
+ next_status_size = 64'd0;
// These can be overloaded later if data is written to the outputs
next_cfg_out_valid = 1'b0;
next_cfg_in_ready = 1'b0;
@@ -182,9 +177,7 @@ module sha256_config_sync (
2'd3: begin // ID already handshaked - wait for config handshake
// Handle Status Signals
- if (status_clear) begin
- next_status_size = 64'd0;
- end
+ next_status_size = 64'd0;
// These can be overloaded later if data is written to the outputs
next_cfg_out_valid = 1'b0;
next_cfg_in_ready = 1'b1;
diff --git a/hdl/src/sha256_packet_manager.sv b/hdl/src/sha256_packet_manager.sv
new file mode 100644
index 0000000000000000000000000000000000000000..be8170d8f6c37ac91af60dd6d700778fe2af2841
--- /dev/null
+++ b/hdl/src/sha256_packet_manager.sv
@@ -0,0 +1,147 @@
+//-----------------------------------------------------------------------------
+// SoC Labs Basic SHA-256 Packet Manager
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// David Mapstone (d.a.mapstone@soton.ac.uk)
+//
+// Copyright 2023, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
+`include "sha256_id_buf.sv"
+`include "sha256_id_issue.sv"
+`include "sha256_id_validator.sv"
+`include "sha256_config_sync.sv"
+
+module sha256_packet_manager (
+ // Clocking Signals
+ input logic clk,
+ input logic nrst,
+ input logic en,
+
+ // Synchronous, localised reset
+ input logic sync_rst,
+
+ // Config data and Handshaking
+ input logic [63:0] cfg_in_size,
+ input logic [1:0] cfg_in_scheme,
+ input logic cfg_in_last,
+ input logic cfg_in_valid,
+ output logic cfg_in_ready,
+
+ // Hash IN
+ input logic [255:0] hash_in,
+ input logic [5:0] hash_in_id,
+ input logic hash_in_last,
+ input logic hash_in_valid,
+ output logic hash_in_ready,
+
+ // Hash Out
+ output logic [255:0] hash_out,
+ output logic hash_out_err,
+ output logic hash_out_last,
+ output logic hash_out_valid,
+ input logic hash_out_ready,
+
+ // Status Signals
+ output logic [5:0] status_id,
+ output logic [1:0] status_err,
+ output logic [9:0] status_packet_count,
+ output logic [2:0] status_buffered_ids,
+ output logic [63:0] status_size,
+ input logic status_err_clear
+);
+
+ logic [5:0] issue_id;
+ logic issue_id_last;
+ logic issue_id_buf_ready, issue_id_buf_valid;
+ logic issue_id_cfg_ready, issue_id_cfg_valid;
+
+ logic [5:0] id_buf_id;
+ logic id_buf_id_last;
+ logic id_buf_id_ready, id_buf_id_valid;
+
+ logic [63:0] cfg_size;
+ logic [1:0] cfg_scheme;
+ logic [5:0] cfg_id;
+ logic cfg_last;
+ logic cfg_ready, cfg_valid;
+
+ sha256_id_issue id_issuer (
+ .clk (clk),
+ .nrst (nrst),
+ .en (en),
+ .sync_rst (sync_rst),
+ .id_out (issue_id),
+ .id_out_last (issue_id_last),
+ .id_out_cfg_valid (issue_id_cfg_valid),
+ .id_out_cfg_ready (issue_id_cfg_ready),
+ .id_out_buf_valid (issue_id_buf_valid),
+ .id_out_buf_ready (issue_id_buf_ready)
+ );
+
+ sha256_config_sync config_synchroniser (
+ .clk (clk),
+ .nrst (nrst),
+ .en (en),
+ .sync_rst (sync_rst),
+ .id_in (issue_id),
+ .id_in_last (issue_id_last),
+ .id_in_valid (issue_id_cfg_valid),
+ .id_in_ready (issue_id_cfg_ready),
+ .cfg_in_size (cfg_in_size),
+ .cfg_in_scheme (cfg_in_scheme),
+ .cfg_in_last (cfg_in_last),
+ .cfg_in_valid (cfg_in_valid),
+ .cfg_in_ready (cfg_in_ready),
+ .cfg_out_size (cfg_size),
+ .cfg_out_scheme (cfg_scheme),
+ .cfg_out_id (cfg_id),
+ .cfg_out_last (cfg_last),
+ .cfg_out_valid (cfg_valid),
+ .cfg_out_ready (cfg_ready),
+ .status_size (status_size)
+ );
+
+ sha256_id_buf id_buffer (
+ .clk (clk),
+ .nrst (nrst),
+ .en (en),
+ .sync_rst (sync_rst),
+ .id_in (issue_id),
+ .id_in_last (issue_id_last),
+ .id_in_valid (issue_id_buf_valid),
+ .id_in_ready (issue_id_buf_ready),
+ .id_out (id_buf_id),
+ .id_out_last (id_buf_id_last),
+ .id_out_valid (id_buf_id_valid),
+ .id_out_ready (id_buf_id_ready),
+ .status_id (status_id),
+ .status_buffered_ids (status_buffered_ids)
+ );
+
+ sha256_id_validator id_validator (
+ .clk (clk),
+ .nrst (nrst),
+ .en (en),
+ .sync_rst (sync_rst),
+ .id_in_buf (id_buf_id),
+ .id_in_buf_last (id_buf_id_last),
+ .id_in_buf_valid (id_buf_id_valid),
+ .id_in_buf_ready (id_buf_id_ready),
+ .hash_in (hash_in),
+ .hash_in_id (hash_in_id),
+ .hash_in_last (hash_in_last),
+ .hash_in_valid (hash_in_valid),
+ .hash_in_ready (hash_in_ready),
+ .hash_out (hash_out),
+ .hash_out_err (hash_out_err),
+ .hash_out_last (hash_out_last),
+ .hash_out_valid (hash_out_valid),
+ .hash_out_ready (hash_out_ready),
+ .status_err (status_err),
+ .status_packet_count (status_packet_count),
+ .status_clear (status_err_clear)
+ );
+
+endmodule
\ No newline at end of file